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@Oberon00
Created December 6, 2015 22:00
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From d6bc063f086bbd736fea6e386ec73b6b50b1b35d Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Christian=20Neum=C3=BCller?= <[email protected]>
Date: Fri, 4 Dec 2015 08:26:42 +0100
Subject: [PATCH 1/2] Logging in exynos4_set_frequency.
Change-Id: I2de17ea99ee1ce8b077c551679955867c7e45f06
---
arch/arm/mach-exynos/cpufreq-4210.c | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-exynos/cpufreq-4210.c b/arch/arm/mach-exynos/cpufreq-4210.c
index 7b93045..504ea12 100644
--- a/arch/arm/mach-exynos/cpufreq-4210.c
+++ b/arch/arm/mach-exynos/cpufreq-4210.c
@@ -24,6 +24,8 @@
#include <plat/clock.h>
+extern unsigned int exynos_getspeed(unsigned int cpu);
+
#define CPUFREQ_LEVEL_END L6
static int max_support_idx;
@@ -252,10 +254,12 @@ static void exynos4210_set_frequency(unsigned int old_index,
unsigned int new_index)
{
unsigned int tmp;
+ unsigned int oldfreq = exynos_getspeed(0);
- sec_debug_aux_log(SEC_DEBUG_AUXLOG_CPU_BUS_CLOCK_CHANGE,
- "%s: old_index=%d, new_index=%d(%ps)",
- __func__, old_index, new_index,
+ pr_info("%s: old_index=%u (%u, r=%u), new_index=%u (%u) (%ps)",
+ __func__,
+ old_index, exynos4210_freq_table[old_index].frequency, oldfreq,
+ new_index, exynos4210_freq_table[new_index].frequency,
__builtin_return_address(0));
if (old_index > new_index) {
@@ -292,6 +296,8 @@ static void exynos4210_set_frequency(unsigned int old_index,
set_clkdiv(new_index);
}
}
+
+ pr_info("%s: %u->%u: new real freq: %u", __func__, old_index, new_index, exynos_getspeed(0));
}
static void __init set_volt_table(void)
--
1.9.1
From 82839af1ee6190e04dba535ef58c54362fa286e0 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Christian=20Neum=C3=BCller?= <[email protected]>
Date: Fri, 4 Dec 2015 19:17:17 +0100
Subject: [PATCH 2/2] cpufreq: panic on freeze.
Change-Id: I415bbe5649e1f7f6cfb1a464ca34c6880a49bb3b
---
arch/arm/mach-exynos/cpufreq-4210.c | 49 ++++++++++++++++++++++++++++++-------
1 file changed, 40 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-exynos/cpufreq-4210.c b/arch/arm/mach-exynos/cpufreq-4210.c
index 504ea12..a3cfbaa 100644
--- a/arch/arm/mach-exynos/cpufreq-4210.c
+++ b/arch/arm/mach-exynos/cpufreq-4210.c
@@ -15,6 +15,7 @@
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/cpufreq.h>
+#include <linux/delay.h>
#include <mach/map.h>
#include <mach/regs-clock.h>
@@ -250,17 +251,10 @@ bool exynos4210_pms_change(unsigned int old_index, unsigned int new_index)
return (old_pm == new_pm) ? 0 : 1;
}
-static void exynos4210_set_frequency(unsigned int old_index,
+static void exynos4210_do_set_frequency(unsigned int old_index,
unsigned int new_index)
{
unsigned int tmp;
- unsigned int oldfreq = exynos_getspeed(0);
-
- pr_info("%s: old_index=%u (%u, r=%u), new_index=%u (%u) (%ps)",
- __func__,
- old_index, exynos4210_freq_table[old_index].frequency, oldfreq,
- new_index, exynos4210_freq_table[new_index].frequency,
- __builtin_return_address(0));
if (old_index > new_index) {
if (!exynos4210_pms_change(old_index, new_index)) {
@@ -297,7 +291,44 @@ static void exynos4210_set_frequency(unsigned int old_index,
}
}
- pr_info("%s: %u->%u: new real freq: %u", __func__, old_index, new_index, exynos_getspeed(0));
+}
+
+static void exynos4210_set_frequency(unsigned int old_index,
+ unsigned int new_index)
+{
+ unsigned int freq = exynos_getspeed(0);
+ unsigned int dstfreq = exynos4210_freq_table[new_index].frequency;
+
+ pr_info("%s: old_index=%u (%u, r=%u), new_index=%u (%u) (%ps)",
+ __func__,
+ old_index, exynos4210_freq_table[old_index].frequency, freq,
+ new_index, dstfreq,
+ __builtin_return_address(0));
+
+ exynos4210_do_set_frequency(old_index, new_index);
+ freq = exynos_getspeed(0);
+ pr_info("%s: %u->%u: new real freq: %u", __func__, old_index, new_index, freq);
+ if (freq < dstfreq) {
+ pr_warn("Actual CPU frequency below target frequency!");
+ mdelay(5);
+ exynos4210_do_set_frequency(old_index, new_index); // Retry once
+ freq = exynos_getspeed(0);
+ if (freq < dstfreq) {
+ pr_emerg("CPU freq wont go above %u!", freq);
+ pr_emerg("CLKDIV_CPU: %x; CLKDIV_CPU1: %x",
+ __raw_readl(EXYNOS4_CLKDIV_CPU),
+ __raw_readl(EXYNOS4_CLKDIV_CPU1));
+ pr_emerg("APLL_LOCK: %x; APLL_CON0: %x",
+ __raw_readl(EXYNOS4_APLL_LOCK),
+ __raw_readl(EXYNOS4_APLL_CON0));
+ pr_emerg("cpu_clk: %lu; moutcore: %lu; mout_mpll: %lu; mout_apll: %lu",
+ clk_get_rate(cpu_clk),
+ clk_get_rate(moutcore),
+ clk_get_rate(mout_mpll),
+ clk_get_rate(mout_apll));
+ panic("CPU frequency froze!");
+ }
+ }
}
static void __init set_volt_table(void)
--
1.9.1
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