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; Assembly listing for method _1020.MethodBelow:RaiseValue(double):this | |
; Emitting BLENDED_CODE for generic X86 CPU | |
; optimized code | |
; ebp based frame | |
; partially interruptible | |
; Final local variable assignments | |
; | |
; V00 this [V00,T00] ( 6, 6 ) ref -> ecx this class-hnd | |
; V01 arg1 [V01,T04] ( 2, 2 ) double -> mm0 | |
; V02 tmp0 [V02,T01] ( 4, 8 ) double -> mm2 | |
; V03 tmp1 [V03,T02] ( 4, 8 ) double -> mm0 | |
; V04 cse0 [V04,T03] ( 6, 6 ) double -> mm1 | |
; | |
; Lcl frame size = 0 | |
G_M58179_IG01: | |
55 push ebp | |
8BEC mov ebp, esp | |
C5F877 vzeroupper | |
C4E17B104508 vmovsd xmm0, qword ptr [ebp+08H] | |
G_M58179_IG02: | |
C4E17B104904 vmovsd xmm1, qword ptr [ecx+4] | |
C4E17828D1 vmovaps xmm2, xmm1 | |
C4E17B5E05580D2105 vdivsd xmm0, qword ptr [@RWD00] | |
C4E17359C8 vmulsd xmm1, xmm0 | |
C4E17828C1 vmovaps xmm0, xmm1 | |
C4E17B58C2 vaddsd xmm0, xmm2 | |
C4E17B114104 vmovsd qword ptr [ecx+4], xmm0 | |
G_M58179_IG03: | |
5D pop ebp | |
C20800 ret 8 | |
; Total bytes of code 57, prolog size 6 for method _1020.MethodBelow:RaiseValue(double):this | |
; ============================================================ | |
; Assembly listing for method _1020.MethodAbove:RaiseValue(double):this | |
; Emitting BLENDED_CODE for generic X86 CPU | |
; optimized code | |
; ebp based frame | |
; partially interruptible | |
; Final local variable assignments | |
; | |
; V00 this [V00,T00] ( 6, 6 ) ref -> ecx this class-hnd | |
; V01 arg1 [V01,T04] ( 2, 2 ) double -> mm0 | |
; V02 tmp0 [V02,T01] ( 4, 8 ) double -> mm2 | |
; V03 tmp1 [V03,T02] ( 4, 8 ) double -> mm0 | |
; V04 cse0 [V04,T03] ( 6, 6 ) double -> mm1 | |
; | |
; Lcl frame size = 0 | |
G_M31631_IG01: | |
55 push ebp | |
8BEC mov ebp, esp | |
C5F877 vzeroupper | |
C4E17B104508 vmovsd xmm0, qword ptr [ebp+08H] | |
G_M31631_IG02: | |
C4E17B104904 vmovsd xmm1, qword ptr [ecx+4] | |
C4E17828D1 vmovaps xmm2, xmm1 | |
C4E17B5E05B00D2105 vdivsd xmm0, qword ptr [@RWD00] | |
C4E17359C8 vmulsd xmm1, xmm0 | |
C4E17828C1 vmovaps xmm0, xmm1 | |
C4E17B58C2 vaddsd xmm0, xmm2 | |
C4E17B114104 vmovsd qword ptr [ecx+4], xmm0 | |
G_M31631_IG03: | |
5D pop ebp | |
C20800 ret 8 | |
; Total bytes of code 57, prolog size 6 for method _1020.MethodAbove:RaiseValue(double):this | |
; ============================================================ | |
fin |
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****** START compiling _1020.MethodBelow:RaiseValue(double):this (MethodHash=aa0b1cbf) | |
Generating code for Windows x64 | |
OPTIONS: compCodeOpt = BLENDED_CODE | |
OPTIONS: compDbgCode = false | |
OPTIONS: compDbgInfo = true | |
OPTIONS: compDbgEnC = false | |
OPTIONS: compProcedureSplitting = false | |
OPTIONS: compProcedureSplittingEH = false | |
OPTIONS: Stack probing is DISABLED | |
IL to import: | |
IL_0000 02 ldarg.0 | |
IL_0001 02 ldarg.0 | |
IL_0002 28 02 00 00 06 call 0x6000002 | |
IL_0007 02 ldarg.0 | |
IL_0008 28 02 00 00 06 call 0x6000002 | |
IL_000d 03 ldarg.1 | |
IL_000e 23 00 00 00 00 00 00 59 40 ldc.r8 100.000000 | |
IL_0017 5b div | |
IL_0018 5a mul | |
IL_0019 58 add | |
IL_001a 28 03 00 00 06 call 0x6000003 | |
IL_001f 2a ret | |
lvaSetClass: setting class for V00 to (00007FFC5C5565D8) _1020.MethodBelow | |
Set preferred register for V00 to [rcx] | |
'this' passed in register rcx | |
Set preferred register for V01 to [mm1] | |
Arg #1 passed in register(s) mm1 | |
; Initial local variable assignments | |
; | |
; V00 this ref this class-hnd | |
; V01 arg1 double | |
*************** In compInitDebuggingInfo() for _1020.MethodBelow:RaiseValue(double):this | |
getVars() returned cVars = 0, extendOthers = true | |
info.compVarScopesCount = 2 | |
VarNum LVNum Name Beg End | |
0: 00h 00h V00 this 000h 020h | |
1: 01h 01h V01 arg1 000h 020h | |
info.compStmtOffsetsCount = 0 | |
info.compStmtOffsetsImplicit = 0005h ( STACK_EMPTY CALL_SITE ) | |
*************** In fgFindBasicBlocks() for _1020.MethodBelow:RaiseValue(double):this | |
Jump targets: | |
none | |
New Basic Block BB01 [0000] created. | |
BB01 [000..020) | |
IL Code Size,Instr 32, 12, Basic Block count 1, Local Variable Num,Ref count 2, 4 for method _1020.MethodBelow:RaiseValue(double):this | |
OPTIONS: opts.MinOpts() == false | |
Basic block list for '_1020.MethodBelow:RaiseValue(double):this' | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In impImport() for _1020.MethodBelow:RaiseValue(double):this | |
impImportBlockPending for BB01 | |
Importing BB01 (PC=000) of '_1020.MethodBelow:RaiseValue(double):this' | |
[ 0] 0 (0x000) ldarg.0 | |
[ 1] 1 (0x001) ldarg.0 | |
[ 2] 2 (0x002) call 06000002 | |
In Compiler::impImportCall: opcode is call, kind=0, callRetType is double, structSize is 0 | |
[000004] ------------ * STMT void (IL 0x000... ???) | |
[000003] I-C-G------- \--* CALL double _1020.MethodBelow.get_Value (exactContextHnd=0x00007FFC5C5565D9) | |
[000002] ------------ this in rcx \--* LCL_VAR ref V00 this | |
[ 2] 7 (0x007) ldarg.0 | |
[ 3] 8 (0x008) call 06000002 | |
In Compiler::impImportCall: opcode is call, kind=0, callRetType is double, structSize is 0 | |
lvaGrabTemp returning 2 (V02 tmp0) called for impAppendStmt. | |
[000011] ------------ * STMT void (IL ???... ???) | |
[000005] --C--------- | /--* RET_EXPR double(inl return from call [000003]) | |
[000010] -AC--------- \--* ASG double | |
[000009] D------N---- \--* LCL_VAR double V02 tmp0 | |
[000008] ------------ * STMT void (IL ???... ???) | |
[000007] I-C-G------- \--* CALL double _1020.MethodBelow.get_Value (exactContextHnd=0x00007FFC5C5565D9) | |
[000006] ------------ this in rcx \--* LCL_VAR ref V00 this | |
[ 3] 13 (0x00d) ldarg.1 | |
[ 4] 14 (0x00e) ldc.r8 100.00000000000000 | |
[ 5] 23 (0x017) div | |
[ 4] 24 (0x018) mul | |
[ 3] 25 (0x019) add | |
[ 2] 26 (0x01a) call 06000003 (Implicit Tail call: prefixFlags |= PREFIX_TAILCALL_IMPLICIT) | |
In Compiler::impImportCall: opcode is call, kind=0, callRetType is void, structSize is 0 | |
info.compCompHnd->canTailCall returned false for call [000019] | |
[000021] ------------ * STMT void (IL ???... ???) | |
[000019] I-C-G------- \--* CALL void _1020.MethodBelow.set_Value (exactContextHnd=0x00007FFC5C5565D9) | |
[000001] ------------ this in rcx +--* LCL_VAR ref V00 this | |
[000015] ------------ | /--* CNS_DBL double 100.00000000000000 | |
[000016] ------------ | /--* DIV double | |
[000014] ------------ | | \--* LCL_VAR double V01 arg1 | |
[000017] --C--------- | /--* MUL double | |
[000013] --C--------- | | \--* RET_EXPR double(inl return from call [000007]) | |
[000018] --C--------- arg1 \--* ADD double | |
[000012] ------------ \--* LCL_VAR double V02 tmp0 | |
[ 0] 31 (0x01f) ret | |
[000023] ------------ * STMT void (IL 0x01F... ???) | |
[000022] ------------ \--* RETURN void | |
New BlockSet epoch 1, # of blocks (including unused BB00): 2, bitset array size: 1 (short) | |
*************** In fgMorph() | |
*************** In fgDebugCheckBBlist | |
*************** In fgInline() | |
Expanding INLINE_CANDIDATE in statement [000004] in BB01: | |
[000004] ------------ * STMT void (IL 0x000...0x01F) | |
[000003] I-C-G------- \--* CALL double _1020.MethodBelow.get_Value (exactContextHnd=0x00007FFC5C5565D9) | |
[000002] ------------ this in rcx \--* LCL_VAR ref V00 this | |
thisArg: is a local var | |
[000002] ------------ * LCL_VAR ref V00 this | |
INLINER: inlineInfo.tokenLookupContextHandle for _1020.MethodBelow:get_Value():double:this set to 0x00007FFC5C5565D9: | |
Invoking compiler for the inlinee method _1020.MethodBelow:get_Value():double:this : | |
IL to import: | |
IL_0000 02 ldarg.0 | |
IL_0001 7b 01 00 00 04 ldfld 0x4000001 | |
IL_0006 2a ret | |
INLINER impTokenLookupContextHandle for _1020.MethodBelow:get_Value():double:this is 0x00007FFC5C5565D9. | |
*************** In fgFindBasicBlocks() for _1020.MethodBelow:get_Value():double:this | |
Jump targets: | |
none | |
New Basic Block BB02 [0001] created. | |
BB02 [000..007) | |
Basic block list for '_1020.MethodBelow:get_Value():double:this' | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB02 [0001] 1 1 [000..007) (return) | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In impImport() for _1020.MethodBelow:get_Value():double:this | |
impImportBlockPending for BB02 | |
Importing BB02 (PC=000) of '_1020.MethodBelow:get_Value():double:this' | |
[ 0] 0 (0x000) ldarg.0 | |
[ 1] 1 (0x001) ldfld 04000001 | |
[ 1] 6 (0x006) ret | |
Inlinee Return expression (before normalization) => | |
[000025] ---XG------- * FIELD double _value | |
[000002] ------------ \--* LCL_VAR ref V00 this | |
Inlinee Return expression (after normalization) => | |
[000025] ---XG------- * FIELD double _value | |
[000002] ------------ \--* LCL_VAR ref V00 this | |
----------- Statements (and blocks) added due to the inlining of call [000003] ----------- | |
Arguments setup: | |
Inlinee method body:fgInlineAppendStatements: no gc ref inline locals. | |
Return expression for call at [000003] is | |
[000025] ---XG------- * FIELD double _value | |
[000002] ------------ \--* LCL_VAR ref V00 this | |
Successfully inlined _1020.MethodBelow:get_Value():double:this (7 IL bytes) (depth 1) [below ALWAYS_INLINE size] | |
-------------------------------------------------------------------------------------------- | |
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for '_1020.MethodBelow:RaiseValue(double):this' calling '_1020.MethodBelow:get_Value():double:this' | |
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' | |
Replacing the return expression placeholder [000005] with [000025] | |
[000005] --C--------- * RET_EXPR double(inl return from call [000025]) | |
Inserting the inline return expression | |
[000025] ---XG------- * FIELD double _value | |
[000002] ------------ \--* LCL_VAR ref V00 this | |
Expanding INLINE_CANDIDATE in statement [000008] in BB01: | |
[000008] ------------ * STMT void (IL ???... ???) | |
[000007] I-C-G------- \--* CALL double _1020.MethodBelow.get_Value (exactContextHnd=0x00007FFC5C5565D9) | |
[000006] ------------ this in rcx \--* LCL_VAR ref V00 this | |
thisArg: is a local var | |
[000006] ------------ * LCL_VAR ref V00 this | |
INLINER: inlineInfo.tokenLookupContextHandle for _1020.MethodBelow:get_Value():double:this set to 0x00007FFC5C5565D9: | |
Invoking compiler for the inlinee method _1020.MethodBelow:get_Value():double:this : | |
IL to import: | |
IL_0000 02 ldarg.0 | |
IL_0001 7b 01 00 00 04 ldfld 0x4000001 | |
IL_0006 2a ret | |
INLINER impTokenLookupContextHandle for _1020.MethodBelow:get_Value():double:this is 0x00007FFC5C5565D9. | |
*************** In fgFindBasicBlocks() for _1020.MethodBelow:get_Value():double:this | |
Jump targets: | |
none | |
New Basic Block BB03 [0002] created. | |
BB03 [000..007) | |
Basic block list for '_1020.MethodBelow:get_Value():double:this' | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB03 [0002] 1 1 [000..007) (return) | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In impImport() for _1020.MethodBelow:get_Value():double:this | |
impImportBlockPending for BB03 | |
Importing BB03 (PC=000) of '_1020.MethodBelow:get_Value():double:this' | |
[ 0] 0 (0x000) ldarg.0 | |
[ 1] 1 (0x001) ldfld 04000001 | |
[ 1] 6 (0x006) ret | |
Inlinee Return expression (before normalization) => | |
[000028] ---XG------- * FIELD double _value | |
[000006] ------------ \--* LCL_VAR ref V00 this | |
Inlinee Return expression (after normalization) => | |
[000028] ---XG------- * FIELD double _value | |
[000006] ------------ \--* LCL_VAR ref V00 this | |
----------- Statements (and blocks) added due to the inlining of call [000007] ----------- | |
Arguments setup: | |
Inlinee method body:fgInlineAppendStatements: no gc ref inline locals. | |
Return expression for call at [000007] is | |
[000028] ---XG------- * FIELD double _value | |
[000006] ------------ \--* LCL_VAR ref V00 this | |
Successfully inlined _1020.MethodBelow:get_Value():double:this (7 IL bytes) (depth 1) [below ALWAYS_INLINE size] | |
-------------------------------------------------------------------------------------------- | |
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for '_1020.MethodBelow:RaiseValue(double):this' calling '_1020.MethodBelow:get_Value():double:this' | |
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' | |
Expanding INLINE_CANDIDATE in statement [000021] in BB01: | |
[000021] ------------ * STMT void (IL ???... ???) | |
[000019] I-C-G------- \--* CALL void _1020.MethodBelow.set_Value (exactContextHnd=0x00007FFC5C5565D9) | |
[000001] ------------ this in rcx +--* LCL_VAR ref V00 this | |
[000015] ------------ | /--* CNS_DBL double 100.00000000000000 | |
[000016] ------------ | /--* DIV double | |
[000014] ------------ | | \--* LCL_VAR double V01 arg1 | |
[000017] --C--------- | /--* MUL double | |
[000013] --C--------- | | \--* RET_EXPR double(inl return from call [000028]) | |
[000018] --C--------- arg1 \--* ADD double | |
[000012] ------------ \--* LCL_VAR double V02 tmp0 | |
thisArg: is a local var | |
[000001] ------------ * LCL_VAR ref V00 this | |
Argument #1: has side effects | |
[000015] ------------ /--* CNS_DBL double 100.00000000000000 | |
[000016] ------------ /--* DIV double | |
[000014] ------------ | \--* LCL_VAR double V01 arg1 | |
[000017] --C--------- /--* MUL double | |
[000013] --C--------- | \--* RET_EXPR double(inl return from call [000028]) | |
[000018] --C--------- * ADD double | |
[000012] ------------ \--* LCL_VAR double V02 tmp0 | |
INLINER: inlineInfo.tokenLookupContextHandle for _1020.MethodBelow:set_Value(double):this set to 0x00007FFC5C5565D9: | |
Invoking compiler for the inlinee method _1020.MethodBelow:set_Value(double):this : | |
IL to import: | |
IL_0000 02 ldarg.0 | |
IL_0001 03 ldarg.1 | |
IL_0002 7d 01 00 00 04 stfld 0x4000001 | |
IL_0007 2a ret | |
INLINER impTokenLookupContextHandle for _1020.MethodBelow:set_Value(double):this is 0x00007FFC5C5565D9. | |
*************** In fgFindBasicBlocks() for _1020.MethodBelow:set_Value(double):this | |
Jump targets: | |
none | |
New Basic Block BB04 [0003] created. | |
BB04 [000..008) | |
Basic block list for '_1020.MethodBelow:set_Value(double):this' | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB04 [0003] 1 1 [000..008) (return) | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In impImport() for _1020.MethodBelow:set_Value(double):this | |
impImportBlockPending for BB04 | |
Importing BB04 (PC=000) of '_1020.MethodBelow:set_Value(double):this' | |
[ 0] 0 (0x000) ldarg.0 | |
[ 1] 1 (0x001) ldarg.1 | |
lvaGrabTemp returning 3 (V03 tmp1) called for Inlining Arg. | |
[ 2] 2 (0x002) stfld 04000001 | |
[000034] ------------ * STMT void | |
[000031] ------------ | /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG------- \--* ASG double | |
[000032] ---XG--N---- \--* FIELD double _value | |
[000001] ------------ \--* LCL_VAR ref V00 this | |
[ 0] 7 (0x007) ret | |
----------- Statements (and blocks) added due to the inlining of call [000019] ----------- | |
Arguments setup: | |
[000037] ------------ * STMT void (IL ???... ???) | |
[000015] ------------ | /--* CNS_DBL double 100.00000000000000 | |
[000016] ------------ | /--* DIV double | |
[000014] ------------ | | \--* LCL_VAR double V01 arg1 | |
[000017] --C--------- | /--* MUL double | |
[000013] --C--------- | | \--* RET_EXPR double(inl return from call [000028]) | |
[000018] --C--------- | /--* ADD double | |
[000012] ------------ | | \--* LCL_VAR double V02 tmp0 | |
[000036] -AC--------- \--* ASG double | |
[000035] D------N---- \--* LCL_VAR double V03 tmp1 | |
Inlinee method body: | |
[000034] ------------ * STMT void (IL ???... ???) | |
[000031] ------------ | /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG------- \--* ASG double | |
[000032] ---XG--N---- \--* FIELD double _value | |
[000001] ------------ \--* LCL_VAR ref V00 this | |
fgInlineAppendStatements: no gc ref inline locals. | |
Successfully inlined _1020.MethodBelow:set_Value(double):this (8 IL bytes) (depth 1) [below ALWAYS_INLINE size] | |
-------------------------------------------------------------------------------------------- | |
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for '_1020.MethodBelow:RaiseValue(double):this' calling '_1020.MethodBelow:set_Value(double):this' | |
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' | |
Replacing the return expression placeholder [000013] with [000028] | |
[000013] --C--------- * RET_EXPR double(inl return from call [000028]) | |
Inserting the inline return expression | |
[000028] ---XG------- * FIELD double _value | |
[000006] ------------ \--* LCL_VAR ref V00 this | |
*************** After fgInline() | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
[000011] ------------ * STMT void (IL ???... ???) | |
[000025] ---XG------- | /--* FIELD double _value | |
[000002] ------------ | | \--* LCL_VAR ref V00 this | |
[000010] -AC--------- \--* ASG double | |
[000009] D------N---- \--* LCL_VAR double V02 tmp0 | |
***** BB01, stmt 2 | |
[000037] ------------ * STMT void (IL ???... ???) | |
[000015] ------------ | /--* CNS_DBL double 100.00000000000000 | |
[000016] ------------ | /--* DIV double | |
[000014] ------------ | | \--* LCL_VAR double V01 arg1 | |
[000017] --C--------- | /--* MUL double | |
[000028] ---XG------- | | \--* FIELD double _value | |
[000006] ------------ | | \--* LCL_VAR ref V00 this | |
[000018] --C--------- | /--* ADD double | |
[000012] ------------ | | \--* LCL_VAR double V02 tmp0 | |
[000036] -AC--------- \--* ASG double | |
[000035] D------N---- \--* LCL_VAR double V03 tmp1 | |
***** BB01, stmt 3 | |
[000034] ------------ * STMT void (IL ???... ???) | |
[000031] ------------ | /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG------- \--* ASG double | |
[000032] ---XG--N---- \--* FIELD double _value | |
[000001] ------------ \--* LCL_VAR ref V00 this | |
***** BB01, stmt 4 | |
[000023] ------------ * STMT void (IL 0x01F... ???) | |
[000022] ------------ \--* RETURN void | |
------------------------------------------------------------------------------------------------------------------- | |
*************** Exception Handling table is empty | |
**************** Inline Tree | |
Inlines into 06000004 _1020.MethodBelow:RaiseValue(double):this | |
[1 IL=0002 TR=000003 06000002] [below ALWAYS_INLINE size] _1020.MethodBelow:get_Value():double:this | |
[2 IL=0008 TR=000007 06000002] [below ALWAYS_INLINE size] _1020.MethodBelow:get_Value():double:this | |
[3 IL=0026 TR=000019 06000003] [below ALWAYS_INLINE size] _1020.MethodBelow:set_Value(double):this | |
Budget: initialTime=156, finalTime=158, initialBudget=1560, currentBudget=1560 | |
Budget: initialSize=860, finalSize=860 | |
*************** After fgAddInternal() | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** Exception Handling table is empty | |
*************** In fgDebugCheckBBlist | |
*************** In fgRemoveEmptyTry() | |
No EH in this method, nothing to remove. | |
*************** In fgRemoveEmptyFinally() | |
No EH in this method, nothing to remove. | |
*************** In fgMergeFinallyChains() | |
No EH in this method, nothing to merge. | |
*************** In fgCloneFinally() | |
No EH in this method, no cloning. | |
*************** In fgMarkImplicitByRefs() | |
*************** In fgPromoteStructs() | |
lvaTable before fgPromoteStructs | |
; Initial local variable assignments | |
; | |
; V00 this ref this class-hnd | |
; V01 arg1 double | |
; V02 tmp0 double | |
; V03 tmp1 double | |
lvaTable after fgPromoteStructs | |
; Initial local variable assignments | |
; | |
; V00 this ref this class-hnd | |
; V01 arg1 double | |
; V02 tmp0 double | |
; V03 tmp1 double | |
*************** In fgMarkAddressExposedLocals() | |
*************** In fgRetypeImplicitByRefArgs() | |
*************** In fgMorphBlocks() | |
Morphing BB01 of '_1020.MethodBelow:RaiseValue(double):this' | |
fgMorphTree BB01, stmt 1 (before) | |
[000025] ---XG------- /--* FIELD double _value | |
[000002] ------------ | \--* LCL_VAR ref V00 this | |
[000010] -AC--------- * ASG double | |
[000009] D------N---- \--* LCL_VAR double V02 tmp0 | |
GenTreeNode creates assertion: | |
[000025] ---XG------- * IND double | |
In BB01 New Local Constant Assertion: V00 != null index=#01, mask=0000000000000001 | |
fgMorphTree BB01, stmt 1 (after) | |
[000025] ---XG+------ /--* IND double | |
[000039] -----+------ | | /--* CNS_INT long 8 field offset Fseq[_value] | |
[000040] -----+------ | \--* ADD byref | |
[000002] -----+------ | \--* LCL_VAR ref V00 this | |
[000010] -A-XG+------ * ASG double | |
[000009] D----+-N---- \--* LCL_VAR double V02 tmp0 | |
fgMorphTree BB01, stmt 2 (before) | |
[000015] ------------ /--* CNS_DBL double 100.00000000000000 | |
[000016] ------------ /--* DIV double | |
[000014] ------------ | \--* LCL_VAR double V01 arg1 | |
[000017] --C--------- /--* MUL double | |
[000028] ---XG------- | \--* FIELD double _value | |
[000006] ------------ | \--* LCL_VAR ref V00 this | |
[000018] --C--------- /--* ADD double | |
[000012] ------------ | \--* LCL_VAR double V02 tmp0 | |
[000036] -AC--------- * ASG double | |
[000035] D------N---- \--* LCL_VAR double V03 tmp1 | |
fgMorphTree BB01, stmt 2 (after) | |
[000015] -----+------ /--* CNS_DBL double 100.00000000000000 | |
[000016] -----+------ /--* DIV double | |
[000014] -----+------ | \--* LCL_VAR double V01 arg1 | |
[000017] ---XG+------ /--* MUL double | |
[000028] ---XG+------ | \--* IND double | |
[000041] -----+------ | | /--* CNS_INT long 8 field offset Fseq[_value] | |
[000042] -----+------ | \--* ADD byref | |
[000006] -----+------ | \--* LCL_VAR ref V00 this | |
[000018] ---XG+------ /--* ADD double | |
[000012] -----+------ | \--* LCL_VAR double V02 tmp0 | |
[000036] -A-XG+------ * ASG double | |
[000035] D----+-N---- \--* LCL_VAR double V03 tmp1 | |
fgMorphTree BB01, stmt 3 (before) | |
[000031] ------------ /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG------- * ASG double | |
[000032] ---XG--N---- \--* FIELD double _value | |
[000001] ------------ \--* LCL_VAR ref V00 this | |
fgMorphTree BB01, stmt 3 (after) | |
[000031] -----+------ /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG+------ * ASG double | |
[000032] ---XG+-N---- \--* IND double | |
[000043] -----+------ | /--* CNS_INT long 8 field offset Fseq[_value] | |
[000044] -----+------ \--* ADD byref | |
[000001] -----+------ \--* LCL_VAR ref V00 this | |
fgMorphTree BB01, stmt 4 (before) | |
[000022] ------------ * RETURN void | |
Renumbering the basic blocks for fgComputePred | |
*************** Before renumbering the basic blocks | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** Exception Handling table is empty | |
*************** After renumbering the basic blocks | |
=============== No blocks renumbered! | |
New BlockSet epoch 2, # of blocks (including unused BB00): 2, bitset array size: 1 (short) | |
*************** In fgComputePreds() | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** After fgComputePreds() | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In fgComputeEdgeWeights() | |
fgComputeEdgeWeights() we do not have any profile data so we are not using the edge weights | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
fgComputeEdgeWeights() was able to compute exact edge weights for all of the 0 edges, using 1 passes. | |
*************** In fgCreateFunclets() | |
After fgCreateFunclets() | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** Exception Handling table is empty | |
*************** In fgDebugCheckBBlist | |
*************** In optOptimizeLayout() | |
*************** Exception Handling table is empty | |
*************** In fgDebugCheckBBlist | |
*************** In fgUpdateFlowGraph() | |
Before updating the flow graph: | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
*************** In fgUpdateFlowGraph() | |
Before updating the flow graph: | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
*************** In fgComputeReachability | |
*************** In fgDebugCheckBBlist | |
Renumbering the basic blocks for fgComputeReachability pass #1 | |
*************** Before renumbering the basic blocks | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** Exception Handling table is empty | |
*************** After renumbering the basic blocks | |
=============== No blocks renumbered! | |
Enter blocks: BB01 | |
After computing reachability sets: | |
------------------------------------------------ | |
BBnum Reachable by | |
------------------------------------------------ | |
BB01 : BB01 | |
After computing reachability: | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
*************** In fgComputeDoms | |
*************** In fgDebugCheckBBlist | |
Dominator computation start blocks (those blocks with no incoming edges): | |
BB01 | |
------------------------------------------------ | |
BBnum Dominated by | |
------------------------------------------------ | |
BB01: BB01 | |
Inside fgBuildDomTree | |
After computing the Dominance Tree: | |
*************** In Allocate Objects | |
Trees before Allocate Objects | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
[000011] ------------ * STMT void (IL ???... ???) | |
[000025] ---XG+------ | /--* IND double | |
[000039] -----+------ | | | /--* CNS_INT long 8 field offset Fseq[_value] | |
[000040] -----+------ | | \--* ADD byref | |
[000002] -----+------ | | \--* LCL_VAR ref V00 this | |
[000010] -A-XG+------ \--* ASG double | |
[000009] D----+-N---- \--* LCL_VAR double V02 tmp0 | |
***** BB01, stmt 2 | |
[000037] ------------ * STMT void (IL ???... ???) | |
[000015] -----+------ | /--* CNS_DBL double 100.00000000000000 | |
[000016] -----+------ | /--* DIV double | |
[000014] -----+------ | | \--* LCL_VAR double V01 arg1 | |
[000017] ---XG+------ | /--* MUL double | |
[000028] ---XG+------ | | \--* IND double | |
[000041] -----+------ | | | /--* CNS_INT long 8 field offset Fseq[_value] | |
[000042] -----+------ | | \--* ADD byref | |
[000006] -----+------ | | \--* LCL_VAR ref V00 this | |
[000018] ---XG+------ | /--* ADD double | |
[000012] -----+------ | | \--* LCL_VAR double V02 tmp0 | |
[000036] -A-XG+------ \--* ASG double | |
[000035] D----+-N---- \--* LCL_VAR double V03 tmp1 | |
***** BB01, stmt 3 | |
[000034] ------------ * STMT void (IL ???... ???) | |
[000031] -----+------ | /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG+------ \--* ASG double | |
[000032] ---XG+-N---- \--* IND double | |
[000043] -----+------ | /--* CNS_INT long 8 field offset Fseq[_value] | |
[000044] -----+------ \--* ADD byref | |
[000001] -----+------ \--* LCL_VAR ref V00 this | |
***** BB01, stmt 4 | |
[000023] ------------ * STMT void (IL 0x01F... ???) | |
[000022] -----+------ \--* RETURN void | |
------------------------------------------------------------------------------------------------------------------- | |
*************** Exiting Allocate Objects | |
Trees after Allocate Objects | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
[000011] ------------ * STMT void (IL ???... ???) | |
[000025] ---XG+------ | /--* IND double | |
[000039] -----+------ | | | /--* CNS_INT long 8 field offset Fseq[_value] | |
[000040] -----+------ | | \--* ADD byref | |
[000002] -----+------ | | \--* LCL_VAR ref V00 this | |
[000010] -A-XG+------ \--* ASG double | |
[000009] D----+-N---- \--* LCL_VAR double V02 tmp0 | |
***** BB01, stmt 2 | |
[000037] ------------ * STMT void (IL ???... ???) | |
[000015] -----+------ | /--* CNS_DBL double 100.00000000000000 | |
[000016] -----+------ | /--* DIV double | |
[000014] -----+------ | | \--* LCL_VAR double V01 arg1 | |
[000017] ---XG+------ | /--* MUL double | |
[000028] ---XG+------ | | \--* IND double | |
[000041] -----+------ | | | /--* CNS_INT long 8 field offset Fseq[_value] | |
[000042] -----+------ | | \--* ADD byref | |
[000006] -----+------ | | \--* LCL_VAR ref V00 this | |
[000018] ---XG+------ | /--* ADD double | |
[000012] -----+------ | | \--* LCL_VAR double V02 tmp0 | |
[000036] -A-XG+------ \--* ASG double | |
[000035] D----+-N---- \--* LCL_VAR double V03 tmp1 | |
***** BB01, stmt 3 | |
[000034] ------------ * STMT void (IL ???... ???) | |
[000031] -----+------ | /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG+------ \--* ASG double | |
[000032] ---XG+-N---- \--* IND double | |
[000043] -----+------ | /--* CNS_INT long 8 field offset Fseq[_value] | |
[000044] -----+------ \--* ADD byref | |
[000001] -----+------ \--* LCL_VAR ref V00 this | |
***** BB01, stmt 4 | |
[000023] ------------ * STMT void (IL 0x01F... ???) | |
[000022] -----+------ \--* RETURN void | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
*************** In optOptimizeLoops() | |
*************** In fgDebugCheckBBlist | |
*************** In optCloneLoops() | |
*************** In lvaMarkLocalVars() | |
lvaGrabTemp returning 4 (V04 tmp2) (a long lifetime temp) called for OutgoingArgSpace. | |
*** marking local variables in block BB01 (weight=1 ) | |
[000011] ------------ * STMT void (IL ???... ???) | |
[000025] ---XG+------ | /--* IND double | |
[000039] -----+------ | | | /--* CNS_INT long 8 field offset Fseq[_value] | |
[000040] -----+------ | | \--* ADD byref | |
[000002] -----+------ | | \--* LCL_VAR ref V00 this | |
[000010] -A-XG+------ \--* ASG double | |
[000009] D----+-N---- \--* LCL_VAR double V02 tmp0 | |
New refCnts for V02: refCnt = 1, refCntWtd = 2 | |
New refCnts for V00: refCnt = 1, refCntWtd = 1 | |
[000037] ------------ * STMT void (IL ???... ???) | |
[000015] -----+------ | /--* CNS_DBL double 100.00000000000000 | |
[000016] -----+------ | /--* DIV double | |
[000014] -----+------ | | \--* LCL_VAR double V01 arg1 | |
[000017] ---XG+------ | /--* MUL double | |
[000028] ---XG+------ | | \--* IND double | |
[000041] -----+------ | | | /--* CNS_INT long 8 field offset Fseq[_value] | |
[000042] -----+------ | | \--* ADD byref | |
[000006] -----+------ | | \--* LCL_VAR ref V00 this | |
[000018] ---XG+------ | /--* ADD double | |
[000012] -----+------ | | \--* LCL_VAR double V02 tmp0 | |
[000036] -A-XG+------ \--* ASG double | |
[000035] D----+-N---- \--* LCL_VAR double V03 tmp1 | |
New refCnts for V03: refCnt = 1, refCntWtd = 2 | |
New refCnts for V02: refCnt = 2, refCntWtd = 4 | |
New refCnts for V00: refCnt = 2, refCntWtd = 2 | |
New refCnts for V01: refCnt = 1, refCntWtd = 1 | |
[000034] ------------ * STMT void (IL ???... ???) | |
[000031] -----+------ | /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG+------ \--* ASG double | |
[000032] ---XG+-N---- \--* IND double | |
[000043] -----+------ | /--* CNS_INT long 8 field offset Fseq[_value] | |
[000044] -----+------ \--* ADD byref | |
[000001] -----+------ \--* LCL_VAR ref V00 this | |
New refCnts for V00: refCnt = 3, refCntWtd = 3 | |
New refCnts for V03: refCnt = 2, refCntWtd = 4 | |
[000023] ------------ * STMT void (IL 0x01F... ???) | |
[000022] -----+------ \--* RETURN void | |
New refCnts for V00: refCnt = 4, refCntWtd = 4 | |
New refCnts for V00: refCnt = 5, refCntWtd = 5 | |
New refCnts for V01: refCnt = 2, refCntWtd = 2 | |
New refCnts for V01: refCnt = 3, refCntWtd = 3 | |
*************** In optAddCopies() | |
refCnt table for 'RaiseValue': | |
V00 this [ ref]: refCnt = 5, refCntWtd = 5 pref [rcx] | |
V01 arg1 [double]: refCnt = 3, refCntWtd = 3 pref [mm1] | |
V02 tmp0 [double]: refCnt = 2, refCntWtd = 4 | |
V03 tmp1 [double]: refCnt = 2, refCntWtd = 4 | |
V04 OutArgs [lclBlk]: refCnt = 1, refCntWtd = 1 | |
*************** In optOptimizeBools() | |
*************** In fgDebugCheckBBlist | |
*************** In fgFindOperOrder() | |
*************** In fgSetBlockOrder() | |
The biggest BB has 12 tree nodes | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
( 5, 4) [000011] ------------ * STMT void (IL ???... ???) | |
N004 ( 5, 4) [000025] ---XG------- | /--* IND double | |
N002 ( 1, 1) [000039] ------------ | | | /--* CNS_INT long 8 field offset Fseq[_value] | |
N003 ( 2, 2) [000040] -------N---- | | \--* ADD byref | |
N001 ( 1, 1) [000002] ------------ | | \--* LCL_VAR ref V00 this | |
N006 ( 5, 4) [000010] -A-XG---R--- \--* ASG double | |
N005 ( 1, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 | |
***** BB01, stmt 2 | |
( 56, 24) [000037] ------------ * STMT void (IL ???... ???) | |
N009 ( 1, 2) [000012] ------------ | /--* LCL_VAR double V02 tmp0 | |
N010 ( 56, 24) [000018] ---XG------- | /--* ADD double | |
N006 ( 3, 4) [000015] ------------ | | | /--* CNS_DBL double 100.00000000000000 | |
N007 ( 40, 10) [000016] ------------ | | | /--* DIV double | |
N005 ( 1, 2) [000014] ------------ | | | | \--* LCL_VAR double V01 arg1 | |
N008 ( 50, 18) [000017] ---XG------- | | \--* MUL double | |
N004 ( 5, 4) [000028] ---XG------- | | \--* IND double | |
N002 ( 1, 1) [000041] ------------ | | | /--* CNS_INT long 8 field offset Fseq[_value] | |
N003 ( 2, 2) [000042] -------N---- | | \--* ADD byref | |
N001 ( 1, 1) [000006] ------------ | | \--* LCL_VAR ref V00 this | |
N012 ( 56, 24) [000036] -A-XG---R--- \--* ASG double | |
N011 ( 1, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 | |
***** BB01, stmt 3 | |
( 7, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 1, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 | |
N006 ( 7, 7) [000033] -A-XG------- \--* ASG double | |
N004 ( 5, 4) [000032] ---XG--N---- \--* IND double | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT long 8 field offset Fseq[_value] | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this | |
***** BB01, stmt 4 | |
( 0, 0) [000023] ------------ * STMT void (IL 0x01F... ???) | |
N001 ( 0, 0) [000022] ------------ \--* RETURN void | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In SsaBuilder::Build() | |
[SsaBuilder] Max block count is 2. | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** Exception Handling table is empty | |
[SsaBuilder] Topologically sorted the graph. | |
[SsaBuilder::ComputeImmediateDom] | |
*************** In SsaBuilder::ComputeDominators(BasicBlock** postOrder, int count, ...) | |
*************** In SsaBuilder::InsertPhiFunctions() | |
*************** In fgLocalVarLiveness() | |
*************** In fgPerBlockLocalVarLiveness() | |
BB01 USE(2)={V00 V01 } + ByrefExposed + GcHeap | |
DEF(2)={ V02 V03} + ByrefExposed + GcHeap | |
** Memory liveness computed, GcHeap states and ByrefExposed states match | |
*************** In fgInterBlockLocalVarLiveness() | |
BB liveness after fgLiveVarAnalysis(): | |
BB01 IN (2)={V00 V01} + ByrefExposed + GcHeap | |
OUT(0)={ } | |
Inserting phi functions: | |
*************** In SsaBuilder::RenameVariables() | |
After fgSsaBuild: | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
( 5, 4) [000011] ------------ * STMT void (IL ???... ???) | |
N004 ( 5, 4) [000025] ---XG------- | /--* IND double | |
N002 ( 1, 1) [000039] ------------ | | | /--* CNS_INT long 8 field offset Fseq[_value] | |
N003 ( 2, 2) [000040] -------N---- | | \--* ADD byref | |
N001 ( 1, 1) [000002] ------------ | | \--* LCL_VAR ref V00 this u:2 | |
N006 ( 5, 4) [000010] -A-XG---R--- \--* ASG double | |
N005 ( 1, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 | |
***** BB01, stmt 2 | |
( 56, 24) [000037] ------------ * STMT void (IL ???... ???) | |
N009 ( 1, 2) [000012] ------------ | /--* LCL_VAR double V02 tmp0 u:2 (last use) | |
N010 ( 56, 24) [000018] ---XG------- | /--* ADD double | |
N006 ( 3, 4) [000015] ------------ | | | /--* CNS_DBL double 100.00000000000000 | |
N007 ( 40, 10) [000016] ------------ | | | /--* DIV double | |
N005 ( 1, 2) [000014] ------------ | | | | \--* LCL_VAR double V01 arg1 u:2 (last use) | |
N008 ( 50, 18) [000017] ---XG------- | | \--* MUL double | |
N004 ( 5, 4) [000028] ---XG------- | | \--* IND double | |
N002 ( 1, 1) [000041] ------------ | | | /--* CNS_INT long 8 field offset Fseq[_value] | |
N003 ( 2, 2) [000042] -------N---- | | \--* ADD byref | |
N001 ( 1, 1) [000006] ------------ | | \--* LCL_VAR ref V00 this u:2 | |
N012 ( 56, 24) [000036] -A-XG---R--- \--* ASG double | |
N011 ( 1, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 | |
***** BB01, stmt 3 | |
( 7, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 1, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 u:2 (last use) | |
N006 ( 7, 7) [000033] -A-XG------- \--* ASG double | |
N004 ( 5, 4) [000032] ---XG--N---- \--* IND double | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT long 8 field offset Fseq[_value] | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) | |
***** BB01, stmt 4 | |
( 0, 0) [000023] ------------ * STMT void (IL 0x01F... ???) | |
N001 ( 0, 0) [000022] ------------ \--* RETURN void | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In optEarlyProp() | |
*************** In fgValueNumber() | |
Memory Initial Value in BB01 is: $81 | |
The SSA definition for ByrefExposed (#2) at start of BB01 is $81 {InitVal($42)} | |
The SSA definition for GcHeap (#2) at start of BB01 is $81 {InitVal($42)} | |
***** BB01, stmt 1 (before) | |
N004 ( 5, 4) [000025] ---XG------- /--* IND double | |
N002 ( 1, 1) [000039] ------------ | | /--* CNS_INT long 8 field offset Fseq[_value] | |
N003 ( 2, 2) [000040] -------N---- | \--* ADD byref | |
N001 ( 1, 1) [000002] ------------ | \--* LCL_VAR ref V00 this u:2 | |
N006 ( 5, 4) [000010] -A-XG---R--- * ASG double | |
N005 ( 1, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 | |
N001 [000002] LCL_VAR V00 this u:2 => $80 {InitVal($40)} | |
N002 [000039] CNS_INT 8 field offset Fseq[_value] => $100 {LngCns: 8} | |
N003 [000040] ADD => $140 {ADD($80, $100)} | |
VNApplySelectors: | |
VNForHandle(Fseq[_value]) is $180, fieldType is double | |
VNForMapSelect($81, $180):double returns $1c0 {$81[$180]} | |
VNForMapSelect($1c0, $80):double returns $1c1 {$1c0[$80]} | |
N004 [000025] IND => <l:$1c1 {$1c0[$80]}, c:$200 {200}> | |
N005 [000009] LCL_VAR V02 tmp0 d:2 => <l:$1c1 {$1c0[$80]}, c:$200 {200}> | |
N006 [000010] ASG => <l:$1c1 {$1c0[$80]}, c:$200 {200}> | |
***** BB01, stmt 1 (after) | |
N004 ( 5, 4) [000025] ---XG------- /--* IND double <l:$1c1, c:$200> | |
N002 ( 1, 1) [000039] ------------ | | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000040] -------N---- | \--* ADD byref $140 | |
N001 ( 1, 1) [000002] ------------ | \--* LCL_VAR ref V00 this u:2 $80 | |
N006 ( 5, 4) [000010] -A-XG---R--- * ASG double <l:$1c1, c:$200> | |
N005 ( 1, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 <l:$1c1, c:$200> | |
--------- | |
***** BB01, stmt 2 (before) | |
N009 ( 1, 2) [000012] ------------ /--* LCL_VAR double V02 tmp0 u:2 (last use) | |
N010 ( 56, 24) [000018] ---XG------- /--* ADD double | |
N006 ( 3, 4) [000015] ------------ | | /--* CNS_DBL double 100.00000000000000 | |
N007 ( 40, 10) [000016] ------------ | | /--* DIV double | |
N005 ( 1, 2) [000014] ------------ | | | \--* LCL_VAR double V01 arg1 u:2 (last use) | |
N008 ( 50, 18) [000017] ---XG------- | \--* MUL double | |
N004 ( 5, 4) [000028] ---XG------- | \--* IND double | |
N002 ( 1, 1) [000041] ------------ | | /--* CNS_INT long 8 field offset Fseq[_value] | |
N003 ( 2, 2) [000042] -------N---- | \--* ADD byref | |
N001 ( 1, 1) [000006] ------------ | \--* LCL_VAR ref V00 this u:2 | |
N012 ( 56, 24) [000036] -A-XG---R--- * ASG double | |
N011 ( 1, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 | |
N001 [000006] LCL_VAR V00 this u:2 => $80 {InitVal($40)} | |
N002 [000041] CNS_INT 8 field offset Fseq[_value] => $100 {LngCns: 8} | |
N003 [000042] ADD => $140 {ADD($80, $100)} | |
VNApplySelectors: | |
VNForHandle(Fseq[_value]) is $180, fieldType is double | |
VNForMapSelect($81, $180):double returns $1c0 {$81[$180]} | |
VNForMapSelect($1c0, $80):double returns $1c1 {$1c0[$80]} | |
N004 [000028] IND => <l:$1c1 {$1c0[$80]}, c:$202 {202}> | |
N005 [000014] LCL_VAR V01 arg1 u:2 (last use) => $c0 {InitVal($41)} | |
N006 [000015] CNS_DBL 100.00000000000000 => $240 {DblCns[100.000000]} | |
N007 [000016] DIV => $1c2 {DIV($c0, $240)} | |
N008 [000017] MUL => <l:$1c4 {MUL($1c1, $1c2)}, c:$1c3 {MUL($1c2, $202)}> | |
N009 [000012] LCL_VAR V02 tmp0 u:2 (last use) => <l:$1c1 {$1c0[$80]}, c:$200 {200}> | |
N010 [000018] ADD => <l:$1c6 {ADD($1c1, $1c4)}, c:$1c5 {ADD($1c3, $200)}> | |
N011 [000035] LCL_VAR V03 tmp1 d:2 => <l:$1c6 {ADD($1c1, $1c4)}, c:$1c5 {ADD($1c3, $200)}> | |
N012 [000036] ASG => <l:$1c6 {ADD($1c1, $1c4)}, c:$1c5 {ADD($1c3, $200)}> | |
***** BB01, stmt 2 (after) | |
N009 ( 1, 2) [000012] ------------ /--* LCL_VAR double V02 tmp0 u:2 (last use) <l:$1c1, c:$200> | |
N010 ( 56, 24) [000018] ---XG------- /--* ADD double <l:$1c6, c:$1c5> | |
N006 ( 3, 4) [000015] ------------ | | /--* CNS_DBL double 100.00000000000000 $240 | |
N007 ( 40, 10) [000016] ------------ | | /--* DIV double $1c2 | |
N005 ( 1, 2) [000014] ------------ | | | \--* LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N008 ( 50, 18) [000017] ---XG------- | \--* MUL double <l:$1c4, c:$1c3> | |
N004 ( 5, 4) [000028] ---XG------- | \--* IND double <l:$1c1, c:$202> | |
N002 ( 1, 1) [000041] ------------ | | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000042] -------N---- | \--* ADD byref $140 | |
N001 ( 1, 1) [000006] ------------ | \--* LCL_VAR ref V00 this u:2 $80 | |
N012 ( 56, 24) [000036] -A-XG---R--- * ASG double <l:$1c6, c:$1c5> | |
N011 ( 1, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 <l:$1c6, c:$1c5> | |
--------- | |
***** BB01, stmt 3 (before) | |
N005 ( 1, 2) [000031] ------------ /--* LCL_VAR double V03 tmp1 u:2 (last use) | |
N006 ( 7, 7) [000033] -A-XG------- * ASG double | |
N004 ( 5, 4) [000032] ---XG--N---- \--* IND double | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT long 8 field offset Fseq[_value] | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) | |
N001 [000001] LCL_VAR V00 this u:2 (last use) => $80 {InitVal($40)} | |
N002 [000043] CNS_INT 8 field offset Fseq[_value] => $100 {LngCns: 8} | |
N003 [000044] ADD => $140 {ADD($80, $100)} | |
N005 [000031] LCL_VAR V03 tmp1 u:2 (last use) => <l:$1c6 {ADD($1c1, $1c4)}, c:$1c5 {ADD($1c3, $200)}> | |
VNApplySelectors: | |
VNForHandle(Fseq[_value]) is $180, fieldType is double | |
VNForMapSelect($81, $180):double returns $1c0 {$81[$180]} | |
VNForMapSelect($1c0, $80):double returns $1c1 {$1c0[$80]} | |
VNForMapStore($1c0, $80, $1c6):double returns $280 {$1c0[$80 := $1c6]} | |
fgCurMemoryVN assigned: | |
fieldHnd $180 is {Hnd const: 0x00007FFC5C556478} | |
fieldSeq $2c0 is {_value} | |
VNForMapStore($81, $180, $280):double returns $281 {$81[$180 := $280]} | |
fgCurMemoryVN[GcHeap] assigned by StoreField at [000033] to VN: $281. | |
N006 [000033] ASG => $VN.Void | |
***** BB01, stmt 3 (after) | |
N005 ( 1, 2) [000031] ------------ /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$1c6, c:$1c5> | |
N006 ( 7, 7) [000033] -A-XG------- * ASG double $VN.Void | |
N004 ( 5, 4) [000032] ---XG--N---- \--* IND double $1c6 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $140 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
--------- | |
***** BB01, stmt 4 (before) | |
N001 ( 0, 0) [000022] ------------ * RETURN void | |
N001 [000022] RETURN => $300 {300} | |
***** BB01, stmt 4 (after) | |
N001 ( 0, 0) [000022] ------------ * RETURN void $300 | |
finish(BB01). | |
*************** In optVnCopyProp() | |
*************** In SsaBuilder::ComputeDominators(Compiler*, ...) | |
Copy Assertion for BB01 | |
Live vars: {V00 V01} => {V00 V01 V02} | |
Live vars: {V00 V01 V02} => {V00 V02} | |
Live vars: {V00 V02} => {V00} | |
Live vars: {V00} => {V00 V03} | |
Live vars: {V00 V03} => {V03} | |
Live vars: {V03} => {} | |
*************** In optOptimizeCSEs() | |
Blocks/Trees at start of optOptimizeCSE phase | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
( 5, 4) [000011] ------------ * STMT void (IL ???... ???) | |
N004 ( 5, 4) [000025] ---XG------- | /--* IND double <l:$1c1, c:$200> | |
N002 ( 1, 1) [000039] ------------ | | | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000040] -------N---- | | \--* ADD byref $140 | |
N001 ( 1, 1) [000002] ------------ | | \--* LCL_VAR ref V00 this u:2 $80 | |
N006 ( 5, 4) [000010] -A-XG---R--- \--* ASG double <l:$1c1, c:$200> | |
N005 ( 1, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 <l:$1c1, c:$200> | |
***** BB01, stmt 2 | |
( 56, 24) [000037] ------------ * STMT void (IL ???... ???) | |
N009 ( 1, 2) [000012] ------------ | /--* LCL_VAR double V02 tmp0 u:2 (last use) <l:$1c1, c:$200> | |
N010 ( 56, 24) [000018] ---XG------- | /--* ADD double <l:$1c6, c:$1c5> | |
N006 ( 3, 4) [000015] ------------ | | | /--* CNS_DBL double 100.00000000000000 $240 | |
N007 ( 40, 10) [000016] ------------ | | | /--* DIV double $1c2 | |
N005 ( 1, 2) [000014] ------------ | | | | \--* LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N008 ( 50, 18) [000017] ---XG------- | | \--* MUL double <l:$1c4, c:$1c3> | |
N004 ( 5, 4) [000028] ---XG------- | | \--* IND double <l:$1c1, c:$202> | |
N002 ( 1, 1) [000041] ------------ | | | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000042] -------N---- | | \--* ADD byref $140 | |
N001 ( 1, 1) [000006] ------------ | | \--* LCL_VAR ref V00 this u:2 $80 | |
N012 ( 56, 24) [000036] -A-XG---R--- \--* ASG double <l:$1c6, c:$1c5> | |
N011 ( 1, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 <l:$1c6, c:$1c5> | |
***** BB01, stmt 3 | |
( 7, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 1, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$1c6, c:$1c5> | |
N006 ( 7, 7) [000033] -A-XG------- \--* ASG double $VN.Void | |
N004 ( 5, 4) [000032] ---XG--N---- \--* IND double $1c6 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $140 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
***** BB01, stmt 4 | |
( 0, 0) [000023] ------------ * STMT void (IL 0x01F... ???) | |
N001 ( 0, 0) [000022] ------------ \--* RETURN void $300 | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In optOptimizeValnumCSEs() | |
CSE candidate #01, vn=$1c1 cseMask=0000000000000001 in BB01, [cost= 5, size= 4]: | |
N004 ( 5, 4) CSE #01 (use)[000028] ---XG------- * IND double <l:$1c1, c:$202> | |
N002 ( 1, 1) [000041] ------------ | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000042] -------N---- \--* ADD byref $140 | |
N001 ( 1, 1) [000006] ------------ \--* LCL_VAR ref V00 this u:2 $80 | |
Blocks that generate CSE def/uses | |
BB01 cseGen = 0000000000000001 | |
After performing DataFlow for ValnumCSE's | |
BB01 cseIn = 0000000000000000 cseOut = 0000000000000001 | |
Labeling the CSEs with Use/Def information | |
BB01 [000025] Def of CSE #01 [weight=1 ] | |
BB01 [000028] Use of CSE #01 [weight=1 ] | |
************ Trees at start of optValnumCSE_Heuristic() | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
( 5, 4) [000011] ------------ * STMT void (IL ???... ???) | |
N004 ( 5, 4) CSE #01 (def)[000025] ---XG------- | /--* IND double <l:$1c1, c:$200> | |
N002 ( 1, 1) [000039] ------------ | | | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000040] -------N---- | | \--* ADD byref $140 | |
N001 ( 1, 1) [000002] ------------ | | \--* LCL_VAR ref V00 this u:2 $80 | |
N006 ( 5, 4) [000010] -A-XG---R--- \--* ASG double <l:$1c1, c:$200> | |
N005 ( 1, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 <l:$1c1, c:$200> | |
***** BB01, stmt 2 | |
( 56, 24) [000037] ------------ * STMT void (IL ???... ???) | |
N009 ( 1, 2) [000012] ------------ | /--* LCL_VAR double V02 tmp0 u:2 (last use) <l:$1c1, c:$200> | |
N010 ( 56, 24) [000018] ---XG------- | /--* ADD double <l:$1c6, c:$1c5> | |
N006 ( 3, 4) [000015] ------------ | | | /--* CNS_DBL double 100.00000000000000 $240 | |
N007 ( 40, 10) [000016] ------------ | | | /--* DIV double $1c2 | |
N005 ( 1, 2) [000014] ------------ | | | | \--* LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N008 ( 50, 18) [000017] ---XG------- | | \--* MUL double <l:$1c4, c:$1c3> | |
N004 ( 5, 4) CSE #01 (use)[000028] ---XG------- | | \--* IND double <l:$1c1, c:$202> | |
N002 ( 1, 1) [000041] ------------ | | | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000042] -------N---- | | \--* ADD byref $140 | |
N001 ( 1, 1) [000006] ------------ | | \--* LCL_VAR ref V00 this u:2 $80 | |
N012 ( 56, 24) [000036] -A-XG---R--- \--* ASG double <l:$1c6, c:$1c5> | |
N011 ( 1, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 <l:$1c6, c:$1c5> | |
***** BB01, stmt 3 | |
( 7, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 1, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$1c6, c:$1c5> | |
N006 ( 7, 7) [000033] -A-XG------- \--* ASG double $VN.Void | |
N004 ( 5, 4) [000032] ---XG--N---- \--* IND double $1c6 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $140 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
***** BB01, stmt 4 | |
( 0, 0) [000023] ------------ * STMT void (IL 0x01F... ???) | |
N001 ( 0, 0) [000022] ------------ \--* RETURN void $300 | |
------------------------------------------------------------------------------------------------------------------- | |
Aggressive CSE Promotion cutoff is 100 | |
Moderate CSE Promotion cutoff is 50 | |
Framesize estimate is 0x0000 | |
We have a small frame | |
Sorted CSE candidates: | |
CSE #01,cseMask=0000000000000001,useCnt=1: [def=100, use=100] :: N004 ( 5, 4) CSE #01 (def)[000025] ---XG------- * IND double <l:$1c1, c:$200> | |
Considering CSE #01 [def=100, use=100, cost= 5] CSE Expression: | |
N004 ( 5, 4) CSE #01 (def)[000025] ---XG------- * IND double <l:$1c1, c:$200> | |
N002 ( 1, 1) [000039] ------------ | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000040] -------N---- \--* ADD byref $140 | |
N001 ( 1, 1) [000002] ------------ \--* LCL_VAR ref V00 this u:2 $80 | |
Aggressive CSE Promotion (300 >= 100) | |
cseRefCnt=300, aggressiveRefCnt=100, moderateRefCnt=50 | |
defCnt=100, useCnt=100, cost=5, size=4 | |
def_cost=1, use_cost=1, extra_no_cost=6, extra_yes_cost=0 | |
CSE cost savings check (506 >= 200) passes | |
Promoting CSE: | |
lvaGrabTemp returning 5 (V05 rat0) (a long lifetime temp) called for ValNumCSE. | |
CSE #01 def at [000025] replaced in BB01 with def of V05 | |
New refCnts for V05: refCnt = 1, refCntWtd = 1 | |
New refCnts for V05: refCnt = 2, refCntWtd = 2 | |
New refCnts for V02: refCnt = 3, refCntWtd = 6 | |
New refCnts for V05: refCnt = 3, refCntWtd = 3 | |
New refCnts for V00: refCnt = 6, refCntWtd = 6 | |
New refCnts for V05: refCnt = 4, refCntWtd = 4 | |
optValnumCSE morphed tree: | |
N007 ( 1, 2) [000047] ------------ /--* LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N008 ( 6, 6) [000048] -A-XG------- /--* COMMA double <l:$1c1, c:$200> | |
N004 ( 5, 4) [000025] ---XG------- | | /--* IND double <l:$1c1, c:$200> | |
N002 ( 1, 1) [000039] ------------ | | | | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000040] -------N---- | | | \--* ADD byref $140 | |
N001 ( 1, 1) [000002] ------------ | | | \--* LCL_VAR ref V00 this u:2 $80 | |
N006 ( 5, 4) [000046] -A-XG---R--- | \--* ASG double $VN.Void | |
N005 ( 1, 2) [000045] D------N---- | \--* LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N010 ( 6, 6) [000010] -A-XG---R--- * ASG double <l:$1c1, c:$200> | |
N009 ( 1, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 <l:$1c1, c:$200> | |
CSE #01 use at [000028] replaced in BB01 with temp use. | |
New refCnts for V00: refCnt = 5, refCntWtd = 5 | |
New refCnts for V05: refCnt = 5, refCntWtd = 5 | |
New refCnts for V03: refCnt = 3, refCntWtd = 6 | |
New refCnts for V05: refCnt = 6, refCntWtd = 6 | |
New refCnts for V01: refCnt = 4, refCntWtd = 4 | |
New refCnts for V02: refCnt = 4, refCntWtd = 8 | |
optValnumCSE morphed tree: | |
N006 ( 1, 2) [000012] ------------ /--* LCL_VAR double V02 tmp0 u:2 (last use) <l:$1c1, c:$200> | |
N007 ( 52, 22) [000018] ----G------- /--* ADD double <l:$1c6, c:$1c5> | |
N003 ( 3, 4) [000015] ------------ | | /--* CNS_DBL double 100.00000000000000 $240 | |
N004 ( 40, 10) [000016] ------------ | | /--* DIV double $1c2 | |
N002 ( 1, 2) [000014] ------------ | | | \--* LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N005 ( 46, 16) [000017] ----G------- | \--* MUL double <l:$1c4, c:$1c3> | |
N001 ( 1, 2) [000049] ------------ | \--* LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N009 ( 52, 22) [000036] -A--G---R--- * ASG double <l:$1c6, c:$1c5> | |
N008 ( 1, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 <l:$1c6, c:$1c5> | |
*************** In optAssertionPropMain() | |
Blocks/Trees at start of phase | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
( 6, 6) [000011] ------------ * STMT void (IL ???... ???) | |
N007 ( 1, 2) [000047] ------------ | /--* LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N008 ( 6, 6) [000048] -A-XG------- | /--* COMMA double <l:$1c1, c:$200> | |
N004 ( 5, 4) [000025] ---XG------- | | | /--* IND double <l:$1c1, c:$200> | |
N002 ( 1, 1) [000039] ------------ | | | | | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000040] -------N---- | | | | \--* ADD byref $140 | |
N001 ( 1, 1) [000002] ------------ | | | | \--* LCL_VAR ref V00 this u:2 $80 | |
N006 ( 5, 4) [000046] -A-XG---R--- | | \--* ASG double $VN.Void | |
N005 ( 1, 2) [000045] D------N---- | | \--* LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N010 ( 6, 6) [000010] -A-XG---R--- \--* ASG double <l:$1c1, c:$200> | |
N009 ( 1, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 <l:$1c1, c:$200> | |
***** BB01, stmt 2 | |
( 52, 22) [000037] ------------ * STMT void (IL ???... ???) | |
N006 ( 1, 2) [000012] ------------ | /--* LCL_VAR double V02 tmp0 u:2 (last use) <l:$1c1, c:$200> | |
N007 ( 52, 22) [000018] ----G------- | /--* ADD double <l:$1c6, c:$1c5> | |
N003 ( 3, 4) [000015] ------------ | | | /--* CNS_DBL double 100.00000000000000 $240 | |
N004 ( 40, 10) [000016] ------------ | | | /--* DIV double $1c2 | |
N002 ( 1, 2) [000014] ------------ | | | | \--* LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N005 ( 46, 16) [000017] ----G------- | | \--* MUL double <l:$1c4, c:$1c3> | |
N001 ( 1, 2) [000049] ------------ | | \--* LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N009 ( 52, 22) [000036] -A--G---R--- \--* ASG double <l:$1c6, c:$1c5> | |
N008 ( 1, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 <l:$1c6, c:$1c5> | |
***** BB01, stmt 3 | |
( 7, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 1, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$1c6, c:$1c5> | |
N006 ( 7, 7) [000033] -A-XG------- \--* ASG double $VN.Void | |
N004 ( 5, 4) [000032] ---XG--N---- \--* IND double $1c6 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $140 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
***** BB01, stmt 4 | |
( 0, 0) [000023] ------------ * STMT void (IL 0x01F... ???) | |
N001 ( 0, 0) [000022] ------------ \--* RETURN void $300 | |
------------------------------------------------------------------------------------------------------------------- | |
GenTreeNode creates assertion: | |
N004 ( 5, 4) [000025] ---XG------- * IND double <l:$1c1, c:$200> | |
In BB01 New Global Constant Assertion: (128, 0) ($80,$0) V00.02 != null index=#01, mask=0000000000000001 | |
BB01 valueGen = 0000000000000001AssertionPropCallback::StartMerge: BB01 in -> 0000000000000000 | |
AssertionPropCallback::EndMerge : BB01 in -> 0000000000000000 | |
AssertionPropCallback::Changed : BB01 before out -> 0000000000000001; after out -> 0000000000000001; | |
jumpDest before out -> 0000000000000001; jumpDest after out -> 0000000000000000; | |
BB01 valueIn = 0000000000000000 valueOut = 0000000000000001 | |
Propagating 0000000000000000 assertions for BB01, stmt [000011], tree [000002], tree -> 0 | |
Propagating 0000000000000000 assertions for BB01, stmt [000011], tree [000039], tree -> 0 | |
Propagating 0000000000000000 assertions for BB01, stmt [000011], tree [000040], tree -> 0 | |
Propagating 0000000000000000 assertions for BB01, stmt [000011], tree [000025], tree -> 1 | |
Propagating 0000000000000001 assertions for BB01, stmt [000011], tree [000045], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000011], tree [000046], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000011], tree [000047], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000011], tree [000048], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000011], tree [000009], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000011], tree [000010], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000049], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000014], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000015], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000016], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000017], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000012], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000018], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000035], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000036], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000034], tree [000001], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000034], tree [000043], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000034], tree [000044], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000034], tree [000032], tree -> 1 | |
Non-null prop for index #01 in BB01: | |
N004 ( 5, 4) [000032] ---XG--N---- * IND double $1c6 | |
Propagating 0000000000000001 assertions for BB01, stmt [000034], tree [000031], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000034], tree [000033], tree -> 0 | |
Re-morphing this stmt: | |
( 7, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 1, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$1c6, c:$1c5> | |
N006 ( 7, 7) [000033] -A-XG------- \--* ASG double $VN.Void | |
N004 ( 5, 4) [000032] x---GO-N---- \--* IND double $1c6 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $140 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
New refCnts for V00: refCnt = 6, refCntWtd = 6 | |
New refCnts for V03: refCnt = 4, refCntWtd = 8 | |
optAssertionPropMain morphed tree: | |
N005 ( 1, 2) [000031] ------------ /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$1c6, c:$1c5> | |
N006 ( 7, 7) [000033] -A--GO------ * ASG double $VN.Void | |
N004 ( 5, 4) [000032] x---GO-N---- \--* IND double $1c6 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $140 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
Propagating 0000000000000001 assertions for BB01, stmt [000023], tree [000022], tree -> 0 | |
*************** In fgDebugCheckBBlist | |
*************** In OptimizeRangeChecks() | |
Blocks/trees before phase | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
( 6, 6) [000011] ------------ * STMT void (IL ???... ???) | |
N007 ( 1, 2) [000047] ------------ | /--* LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N008 ( 6, 6) [000048] -A-XG------- | /--* COMMA double <l:$1c1, c:$200> | |
N004 ( 5, 4) [000025] ---XG------- | | | /--* IND double <l:$1c1, c:$200> | |
N002 ( 1, 1) [000039] ------------ | | | | | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000040] -------N---- | | | | \--* ADD byref $140 | |
N001 ( 1, 1) [000002] ------------ | | | | \--* LCL_VAR ref V00 this u:2 $80 | |
N006 ( 5, 4) [000046] -A-XG---R--- | | \--* ASG double $VN.Void | |
N005 ( 1, 2) [000045] D------N---- | | \--* LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N010 ( 6, 6) [000010] -A-XG---R--- \--* ASG double <l:$1c1, c:$200> | |
N009 ( 1, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 <l:$1c1, c:$200> | |
***** BB01, stmt 2 | |
( 52, 22) [000037] ------------ * STMT void (IL ???... ???) | |
N006 ( 1, 2) [000012] ------------ | /--* LCL_VAR double V02 tmp0 u:2 (last use) <l:$1c1, c:$200> | |
N007 ( 52, 22) [000018] ----G------- | /--* ADD double <l:$1c6, c:$1c5> | |
N003 ( 3, 4) [000015] ------------ | | | /--* CNS_DBL double 100.00000000000000 $240 | |
N004 ( 40, 10) [000016] ------------ | | | /--* DIV double $1c2 | |
N002 ( 1, 2) [000014] ------------ | | | | \--* LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N005 ( 46, 16) [000017] ----G------- | | \--* MUL double <l:$1c4, c:$1c3> | |
N001 ( 1, 2) [000049] ------------ | | \--* LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N009 ( 52, 22) [000036] -A--G---R--- \--* ASG double <l:$1c6, c:$1c5> | |
N008 ( 1, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 <l:$1c6, c:$1c5> | |
***** BB01, stmt 3 | |
( 7, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 1, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$1c6, c:$1c5> | |
N006 ( 7, 7) [000033] -A--GO------ \--* ASG double $VN.Void | |
N004 ( 5, 4) [000032] x---GO-N---- \--* IND double $1c6 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $140 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
***** BB01, stmt 4 | |
( 0, 0) [000023] ------------ * STMT void (IL 0x01F... ???) | |
N001 ( 0, 0) [000022] ------------ \--* RETURN void $300 | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDetermineFirstColdBlock() | |
No procedure splitting will be done for this method | |
*************** In IR Rationalize | |
Trees before IR Rationalize | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
( 6, 6) [000011] ------------ * STMT void (IL ???... ???) | |
N007 ( 1, 2) [000047] ------------ | /--* LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N008 ( 6, 6) [000048] -A-XG------- | /--* COMMA double <l:$1c1, c:$200> | |
N004 ( 5, 4) [000025] ---XG------- | | | /--* IND double <l:$1c1, c:$200> | |
N002 ( 1, 1) [000039] ------------ | | | | | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000040] -------N---- | | | | \--* ADD byref $140 | |
N001 ( 1, 1) [000002] ------------ | | | | \--* LCL_VAR ref V00 this u:2 $80 | |
N006 ( 5, 4) [000046] -A-XG---R--- | | \--* ASG double $VN.Void | |
N005 ( 1, 2) [000045] D------N---- | | \--* LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N010 ( 6, 6) [000010] -A-XG---R--- \--* ASG double <l:$1c1, c:$200> | |
N009 ( 1, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 <l:$1c1, c:$200> | |
***** BB01, stmt 2 | |
( 52, 22) [000037] ------------ * STMT void (IL ???... ???) | |
N006 ( 1, 2) [000012] ------------ | /--* LCL_VAR double V02 tmp0 u:2 (last use) <l:$1c1, c:$200> | |
N007 ( 52, 22) [000018] ----G------- | /--* ADD double <l:$1c6, c:$1c5> | |
N003 ( 3, 4) [000015] ------------ | | | /--* CNS_DBL double 100.00000000000000 $240 | |
N004 ( 40, 10) [000016] ------------ | | | /--* DIV double $1c2 | |
N002 ( 1, 2) [000014] ------------ | | | | \--* LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N005 ( 46, 16) [000017] ----G------- | | \--* MUL double <l:$1c4, c:$1c3> | |
N001 ( 1, 2) [000049] ------------ | | \--* LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N009 ( 52, 22) [000036] -A--G---R--- \--* ASG double <l:$1c6, c:$1c5> | |
N008 ( 1, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 <l:$1c6, c:$1c5> | |
***** BB01, stmt 3 | |
( 7, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 1, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$1c6, c:$1c5> | |
N006 ( 7, 7) [000033] -A--GO------ \--* ASG double $VN.Void | |
N004 ( 5, 4) [000032] x---GO-N---- \--* IND double $1c6 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $140 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
***** BB01, stmt 4 | |
( 0, 0) [000023] ------------ * STMT void (IL 0x01F... ???) | |
N001 ( 0, 0) [000022] ------------ \--* RETURN void $300 | |
------------------------------------------------------------------------------------------------------------------- | |
rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) | |
N006 ( 5, 4) [000046] DA-XG------- * STORE_LCL_VAR double V05 cse0 | |
rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) | |
N010 ( 6, 6) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 | |
rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) | |
N009 ( 52, 22) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 | |
*************** Exiting IR Rationalize | |
Trees after IR Rationalize | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
N001 ( 1, 1) [000002] ------------ t2 = LCL_VAR ref V00 this u:2 $80 | |
N002 ( 1, 1) [000039] ------------ t39 = CNS_INT long 8 field offset Fseq[_value] $100 | |
/--* t2 ref | |
+--* t39 long | |
N003 ( 2, 2) [000040] -------N---- t40 = * ADD byref $140 | |
/--* t40 byref | |
N004 ( 5, 4) [000025] ---XG------- t25 = * IND double <l:$1c1, c:$200> | |
/--* t25 double | |
N006 ( 5, 4) [000046] DA-XG------- * STORE_LCL_VAR double V05 cse0 | |
N007 ( 1, 2) [000047] ------------ t47 = LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
/--* t47 double | |
N010 ( 6, 6) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 | |
N001 ( 1, 2) [000049] ------------ t49 = LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N002 ( 1, 2) [000014] ------------ t14 = LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N003 ( 3, 4) [000015] ------------ t15 = CNS_DBL double 100.00000000000000 $240 | |
/--* t14 double | |
+--* t15 double | |
N004 ( 40, 10) [000016] ------------ t16 = * DIV double $1c2 | |
/--* t49 double | |
+--* t16 double | |
N005 ( 46, 16) [000017] ----G------- t17 = * MUL double <l:$1c4, c:$1c3> | |
N006 ( 1, 2) [000012] ------------ t12 = LCL_VAR double V02 tmp0 u:2 (last use) <l:$1c1, c:$200> | |
/--* t17 double | |
+--* t12 double | |
N007 ( 52, 22) [000018] ----G------- t18 = * ADD double <l:$1c6, c:$1c5> | |
/--* t18 double | |
N009 ( 52, 22) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 | |
N001 ( 1, 1) [000001] ------------ t1 = LCL_VAR ref V00 this u:2 (last use) $80 | |
N002 ( 1, 1) [000043] ------------ t43 = CNS_INT long 8 field offset Fseq[_value] $100 | |
/--* t1 ref | |
+--* t43 long | |
N003 ( 2, 2) [000044] -------N---- t44 = * ADD byref $140 | |
N005 ( 1, 2) [000031] ------------ t31 = LCL_VAR double V03 tmp1 u:2 (last use) <l:$1c6, c:$1c5> | |
/--* t44 byref | |
+--* t31 double | |
[000050] -A--GO------ * STOREIND double | |
( 0, 0) [000023] ------------ IL_OFFSET void IL offset: 0x1f | |
N001 ( 0, 0) [000022] ------------ RETURN void $300 | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
*************** In fgDebugCheckBBlist | |
*************** In Lowering | |
Trees before Lowering | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
N001 ( 1, 1) [000002] ------------ t2 = LCL_VAR ref V00 this u:2 $80 | |
N002 ( 1, 1) [000039] ------------ t39 = CNS_INT long 8 field offset Fseq[_value] $100 | |
/--* t2 ref | |
+--* t39 long | |
N003 ( 2, 2) [000040] -------N---- t40 = * ADD byref $140 | |
/--* t40 byref | |
N004 ( 5, 4) [000025] ---XG------- t25 = * IND double <l:$1c1, c:$200> | |
/--* t25 double | |
N006 ( 5, 4) [000046] DA-XG------- * STORE_LCL_VAR double V05 cse0 | |
N007 ( 1, 2) [000047] ------------ t47 = LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
/--* t47 double | |
N010 ( 6, 6) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 | |
N001 ( 1, 2) [000049] ------------ t49 = LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N002 ( 1, 2) [000014] ------------ t14 = LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N003 ( 3, 4) [000015] ------------ t15 = CNS_DBL double 100.00000000000000 $240 | |
/--* t14 double | |
+--* t15 double | |
N004 ( 40, 10) [000016] ------------ t16 = * DIV double $1c2 | |
/--* t49 double | |
+--* t16 double | |
N005 ( 46, 16) [000017] ----G------- t17 = * MUL double <l:$1c4, c:$1c3> | |
N006 ( 1, 2) [000012] ------------ t12 = LCL_VAR double V02 tmp0 u:2 (last use) <l:$1c1, c:$200> | |
/--* t17 double | |
+--* t12 double | |
N007 ( 52, 22) [000018] ----G------- t18 = * ADD double <l:$1c6, c:$1c5> | |
/--* t18 double | |
N009 ( 52, 22) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 | |
N001 ( 1, 1) [000001] ------------ t1 = LCL_VAR ref V00 this u:2 (last use) $80 | |
N002 ( 1, 1) [000043] ------------ t43 = CNS_INT long 8 field offset Fseq[_value] $100 | |
/--* t1 ref | |
+--* t43 long | |
N003 ( 2, 2) [000044] -------N---- t44 = * ADD byref $140 | |
N005 ( 1, 2) [000031] ------------ t31 = LCL_VAR double V03 tmp1 u:2 (last use) <l:$1c6, c:$1c5> | |
/--* t44 byref | |
+--* t31 double | |
[000050] -A--GO------ * STOREIND double | |
( 0, 0) [000023] ------------ IL_OFFSET void IL offset: 0x1f | |
N001 ( 0, 0) [000022] ------------ RETURN void $300 | |
------------------------------------------------------------------------------------------------------------------- | |
Addressing mode: | |
Base | |
N001 ( 1, 1) [000002] ------------ * LCL_VAR ref V00 this u:2 $80 | |
+ 8 | |
New addressing mode node: | |
[000051] ------------ * LEA(b+8) byref | |
Addressing mode: | |
Base | |
N001 ( 1, 1) [000001] ------------ * LCL_VAR ref V00 this u:2 (last use) $80 | |
+ 8 | |
New addressing mode node: | |
[000052] ------------ * LEA(b+8) byref | |
lowering GT_RETURN | |
N001 ( 0, 0) [000022] ------------ * RETURN void $300 | |
============Lower has completed modifying nodes. | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
N001 ( 1, 1) [000002] ------------ t2 = LCL_VAR ref V00 this u:2 $80 | |
/--* t2 ref | |
[000051] -c---------- t51 = * LEA(b+8) byref | |
/--* t51 byref | |
N004 ( 5, 4) [000025] ---XG------- t25 = * IND double <l:$1c1, c:$200> | |
/--* t25 double | |
N006 ( 5, 4) [000046] DA-XG------- * STORE_LCL_VAR double V05 cse0 | |
N007 ( 1, 2) [000047] ------------ t47 = LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
/--* t47 double | |
N010 ( 6, 6) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 | |
N001 ( 1, 2) [000049] ------------ t49 = LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N002 ( 1, 2) [000014] ------------ t14 = LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N003 ( 3, 4) [000015] -c---------- t15 = CNS_DBL double 100.00000000000000 $240 | |
/--* t14 double | |
+--* t15 double | |
N004 ( 40, 10) [000016] ------------ t16 = * DIV double $1c2 | |
/--* t49 double | |
+--* t16 double | |
N005 ( 46, 16) [000017] ----G------- t17 = * MUL double <l:$1c4, c:$1c3> | |
N006 ( 1, 2) [000012] ------------ t12 = LCL_VAR double V02 tmp0 u:2 (last use) <l:$1c1, c:$200> | |
/--* t17 double | |
+--* t12 double | |
N007 ( 52, 22) [000018] ----G------- t18 = * ADD double <l:$1c6, c:$1c5> | |
/--* t18 double | |
N009 ( 52, 22) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 | |
N001 ( 1, 1) [000001] ------------ t1 = LCL_VAR ref V00 this u:2 (last use) $80 | |
/--* t1 ref | |
[000052] -c---------- t52 = * LEA(b+8) byref | |
N005 ( 1, 2) [000031] ------------ t31 = LCL_VAR double V03 tmp1 u:2 (last use) <l:$1c6, c:$1c5> | |
/--* t52 byref | |
+--* t31 double | |
[000050] -A--GO------ * STOREIND double | |
( 0, 0) [000023] ------------ IL_OFFSET void IL offset: 0x1f | |
N001 ( 0, 0) [000022] ------------ RETURN void $300 | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In fgLocalVarLiveness() | |
; Initial local variable assignments | |
; | |
; V00 this ref this class-hnd | |
; V01 arg1 double | |
; V02 tmp0 double | |
; V03 tmp1 double | |
; V04 OutArgs lclBlk ( 0) | |
; V05 cse0 double | |
In fgLocalVarLivenessInit, sorting locals | |
refCnt table for 'RaiseValue': | |
V00 this [ ref]: refCnt = 6, refCntWtd = 6 pref [rcx] | |
V02 tmp0 [double]: refCnt = 4, refCntWtd = 8 | |
V03 tmp1 [double]: refCnt = 4, refCntWtd = 8 | |
V05 cse0 [double]: refCnt = 6, refCntWtd = 6 | |
V01 arg1 [double]: refCnt = 4, refCntWtd = 4 pref [mm1] | |
V04 OutArgs [lclBlk]: refCnt = 1, refCntWtd = 1 | |
*************** In fgPerBlockLocalVarLiveness() | |
BB01 USE(2)={V00 V01} + ByrefExposed + GcHeap | |
DEF(3)={ V02 V03 V05 } | |
** Memory liveness computed, GcHeap states and ByrefExposed states match | |
*************** In fgInterBlockLocalVarLiveness() | |
BB liveness after fgLiveVarAnalysis(): | |
BB01 IN (2)={V00 V01} + ByrefExposed + GcHeap | |
OUT(0)={ } | |
*************** In fgUpdateFlowGraph() | |
Before updating the flow graph: | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
Liveness pass finished after lowering, IR: | |
lvasortagain = 0 | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
N001 ( 1, 1) [000002] ------------ t2 = LCL_VAR ref V00 this u:2 $80 | |
/--* t2 ref | |
[000051] -c---------- t51 = * LEA(b+8) byref | |
/--* t51 byref | |
N004 ( 5, 4) [000025] ---XG------- t25 = * IND double <l:$1c1, c:$200> | |
/--* t25 double | |
N006 ( 5, 4) [000046] DA-XG------- * STORE_LCL_VAR double V05 cse0 | |
N007 ( 1, 2) [000047] ------------ t47 = LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
/--* t47 double | |
N010 ( 6, 6) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 | |
N001 ( 1, 2) [000049] ------------ t49 = LCL_VAR double V05 cse0 (last use) <l:$1c1, c:$200> | |
N002 ( 1, 2) [000014] ------------ t14 = LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N003 ( 3, 4) [000015] -c---------- t15 = CNS_DBL double 100.00000000000000 $240 | |
/--* t14 double | |
+--* t15 double | |
N004 ( 40, 10) [000016] ------------ t16 = * DIV double $1c2 | |
/--* t49 double | |
+--* t16 double | |
N005 ( 46, 16) [000017] ----G------- t17 = * MUL double <l:$1c4, c:$1c3> | |
N006 ( 1, 2) [000012] ------------ t12 = LCL_VAR double V02 tmp0 u:2 (last use) <l:$1c1, c:$200> | |
/--* t17 double | |
+--* t12 double | |
N007 ( 52, 22) [000018] ----G------- t18 = * ADD double <l:$1c6, c:$1c5> | |
/--* t18 double | |
N009 ( 52, 22) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 | |
N001 ( 1, 1) [000001] ------------ t1 = LCL_VAR ref V00 this u:2 (last use) $80 | |
/--* t1 ref | |
[000052] -c---------- t52 = * LEA(b+8) byref | |
N005 ( 1, 2) [000031] ------------ t31 = LCL_VAR double V03 tmp1 u:2 (last use) <l:$1c6, c:$1c5> | |
/--* t52 byref | |
+--* t31 double | |
[000050] -A--GO------ * STOREIND double | |
( 0, 0) [000023] ------------ IL_OFFSET void IL offset: 0x1f | |
N001 ( 0, 0) [000022] ------------ RETURN void $300 | |
------------------------------------------------------------------------------------------------------------------- | |
*************** Exiting Lowering | |
Trees after Lowering | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
N001 ( 1, 1) [000002] ------------ t2 = LCL_VAR ref V00 this u:2 $80 | |
/--* t2 ref | |
[000051] -c---------- t51 = * LEA(b+8) byref | |
/--* t51 byref | |
N004 ( 5, 4) [000025] ---XG------- t25 = * IND double <l:$1c1, c:$200> | |
/--* t25 double | |
N006 ( 5, 4) [000046] DA-XG------- * STORE_LCL_VAR double V05 cse0 | |
N007 ( 1, 2) [000047] ------------ t47 = LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
/--* t47 double | |
N010 ( 6, 6) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 | |
N001 ( 1, 2) [000049] ------------ t49 = LCL_VAR double V05 cse0 (last use) <l:$1c1, c:$200> | |
N002 ( 1, 2) [000014] ------------ t14 = LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N003 ( 3, 4) [000015] -c---------- t15 = CNS_DBL double 100.00000000000000 $240 | |
/--* t14 double | |
+--* t15 double | |
N004 ( 40, 10) [000016] ------------ t16 = * DIV double $1c2 | |
/--* t49 double | |
+--* t16 double | |
N005 ( 46, 16) [000017] ----G------- t17 = * MUL double <l:$1c4, c:$1c3> | |
N006 ( 1, 2) [000012] ------------ t12 = LCL_VAR double V02 tmp0 u:2 (last use) <l:$1c1, c:$200> | |
/--* t17 double | |
+--* t12 double | |
N007 ( 52, 22) [000018] ----G------- t18 = * ADD double <l:$1c6, c:$1c5> | |
/--* t18 double | |
N009 ( 52, 22) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 | |
N001 ( 1, 1) [000001] ------------ t1 = LCL_VAR ref V00 this u:2 (last use) $80 | |
/--* t1 ref | |
[000052] -c---------- t52 = * LEA(b+8) byref | |
N005 ( 1, 2) [000031] ------------ t31 = LCL_VAR double V03 tmp1 u:2 (last use) <l:$1c6, c:$1c5> | |
/--* t52 byref | |
+--* t31 double | |
[000050] -A--GO------ * STOREIND double | |
( 0, 0) [000023] ------------ IL_OFFSET void IL offset: 0x1f | |
N001 ( 0, 0) [000022] ------------ RETURN void $300 | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
Clearing modified regs. | |
buildIntervals ======== | |
----------------- | |
LIVENESS: | |
----------------- | |
BB01 use def in out | |
{V00 V01} | |
{V02 V03 V05} | |
{V00 V01} | |
{} | |
Interval 0: RefPositions {} physReg:NA Preferences=[allInt] | |
Interval 1: RefPositions {} physReg:NA Preferences=[allFloat] | |
Interval 2: RefPositions {} physReg:NA Preferences=[allFloat] | |
Interval 3: RefPositions {} physReg:NA Preferences=[allFloat] | |
Interval 4: RefPositions {} physReg:NA Preferences=[allFloat] | |
FP callee save candidate vars: {V02 V03 V05} | |
floatVarCount = 4; hasLoops = 0, singleExit = 1 | |
TUPLE STYLE DUMP BEFORE LSRA | |
LSRA Block Sequence: BB01( 1 ) | |
BB01 [000..020) (return), preds={} succs={} | |
===== | |
N001. V00(t2) | |
N000. LEA(b+8) | |
N004. IND | |
N006. V05(t46) | |
N007. V05(t47) | |
N010. V02(t10) | |
N001. V05(t49*) | |
N002. V01(t14*) | |
N003. CNS_DBL 100.00000000000000 | |
N004. DIV | |
N005. MUL | |
N006. V02(t12*) | |
N007. ADD | |
N009. V03(t36) | |
N001. V00(t1*) | |
N000. LEA(b+8) | |
N005. V03(t31*) | |
N000. STOREIND | |
N000. IL_OFFSET IL offset: 0x1f | |
N001. RETURN | |
buildIntervals second part ======== | |
Int arg V00 in reg rcx | |
<RefPosition #0 @0 RefTypeParamDef <Ivl:0 V00> BB00 regmask=[rcx] fixed> | |
Float arg V01 in reg mm1 | |
<RefPosition #1 @0 RefTypeParamDef <Ivl:1 V01> BB00 regmask=[mm1] fixed> | |
NEW BLOCK BB01 | |
<RefPosition #2 @1 RefTypeBB BB01 regmask=[]> | |
N003 ( 1, 1) [000002] ------------ * LCL_VAR ref V00 this u:2 NA REG NA $80 | |
+<TreeNodeInfo @ 3 1=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I> | |
N003. V00(L0) | |
consume=0 produce=1 | |
N005 (???,???) [000051] -c---------- * LEA(b+8) byref REG NA | |
+<TreeNodeInfo @ 5 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I> | |
N005. LEA(b+8) | |
Contained | |
N007 ( 5, 4) [000025] ---XG------- * IND double REG NA <l:$1c1, c:$200> | |
+<TreeNodeInfo @ 7 1=1 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N007. t25 = IND | |
consume=1 produce=1 | |
at start of tree, map contains: { N005. LEA -> (3.N003) } | |
<RefPosition #3 @7 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] last> | |
Def candidates [allFloat], Use candidates [allFloat] | |
Interval 5: RefPositions {} physReg:NA Preferences=[allFloat] | |
<RefPosition #4 @8 RefTypeDef <Ivl:5> IND BB01 regmask=[allFloat]> | |
N009 ( 5, 4) [000046] DA-XG------- * STORE_LCL_VAR double V05 cse0 NA REG NA | |
+<TreeNodeInfo @ 9 0=1 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N009. V05(L4) | |
consume=1 produce=0 | |
at start of tree, map contains: { N007. IND -> (8.N007) } | |
Assigning related <L4> to <I5> | |
<RefPosition #5 @9 RefTypeUse <Ivl:5> BB01 regmask=[allFloat] last> | |
Def candidates [allFloat], Use candidates [allFloat] | |
<RefPosition #6 @10 RefTypeDef <Ivl:4 V05> STORE_LCL_VAR BB01 regmask=[allFloat] last> | |
N011 ( 1, 2) [000047] ------------ * LCL_VAR double V05 cse0 NA REG NA <l:$1c1, c:$200> | |
+<TreeNodeInfo @ 11 1=0 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N011. V05(L4) | |
consume=0 produce=1 | |
N013 ( 6, 6) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 NA REG NA | |
+<TreeNodeInfo @ 13 0=1 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N013. V02(L2) | |
consume=1 produce=0 | |
at start of tree, map contains: { N011. LCL_VAR -> (11.N011) } | |
<RefPosition #7 @13 RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[allFloat] last> | |
Def candidates [allFloat], Use candidates [allFloat] | |
<RefPosition #8 @14 RefTypeDef <Ivl:2 V02> STORE_LCL_VAR BB01 regmask=[allFloat] last> | |
N015 ( 1, 2) [000049] ------------ * LCL_VAR double V05 cse0 NA (last use) REG NA <l:$1c1, c:$200> | |
+<TreeNodeInfo @ 15 1=0 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I O> | |
N015. V05(L4) | |
consume=0 produce=1 | |
N017 ( 1, 2) [000014] ------------ * LCL_VAR double V01 arg1 u:2 NA (last use) REG NA $c0 | |
+<TreeNodeInfo @ 17 1=0 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N017. V01(L1) | |
consume=0 produce=1 | |
N019 ( 3, 4) [000015] -c---------- * CNS_DBL double 100.00000000000000 REG NA $240 | |
+<TreeNodeInfo @ 19 0=0 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N019. CNS_DBL 100.00000000000000 REG NA | |
Contained | |
N021 ( 40, 10) [000016] ------------ * DIV double REG NA $1c2 | |
+<TreeNodeInfo @ 21 1=1 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N021. t16 = DIV | |
consume=1 produce=1 | |
at start of tree, map contains: { N015. LCL_VAR -> (15.N015); N017. LCL_VAR -> (17.N017) } | |
<RefPosition #9 @21 RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[allFloat] last> | |
Def candidates [allFloat], Use candidates [allFloat] | |
Interval 6: RefPositions {} physReg:NA Preferences=[allFloat] | |
Assigning related <L1> to <I6> | |
<RefPosition #10 @22 RefTypeDef <Ivl:6> DIV BB01 regmask=[allFloat]> | |
N023 ( 46, 16) [000017] ----G------- * MUL double REG NA <l:$1c4, c:$1c3> | |
+<TreeNodeInfo @ 23 1=2 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N023. t17 = MUL | |
consume=2 produce=1 | |
at start of tree, map contains: { N015. LCL_VAR -> (15.N015); N021. DIV -> (22.N021) } | |
<RefPosition #11 @23 RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[allFloat] last> | |
<RefPosition #12 @23 RefTypeUse <Ivl:6> BB01 regmask=[allFloat] last> | |
Def candidates [allFloat], Use candidates [allFloat] | |
Interval 7: RefPositions {} physReg:NA Preferences=[allFloat] | |
Assigning related <L4> to <I7> | |
<RefPosition #13 @24 RefTypeDef <Ivl:7> MUL BB01 regmask=[allFloat]> | |
N025 ( 1, 2) [000012] ------------ * LCL_VAR double V02 tmp0 u:2 NA (last use) REG NA <l:$1c1, c:$200> | |
+<TreeNodeInfo @ 25 1=0 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I O> | |
N025. V02(L2) | |
consume=0 produce=1 | |
N027 ( 52, 22) [000018] ----G------- * ADD double REG NA <l:$1c6, c:$1c5> | |
+<TreeNodeInfo @ 27 1=2 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N027. t18 = ADD | |
consume=2 produce=1 | |
at start of tree, map contains: { N025. LCL_VAR -> (25.N025); N023. MUL -> (24.N023) } | |
<RefPosition #14 @27 RefTypeUse <Ivl:7> BB01 regmask=[allFloat] last> | |
<RefPosition #15 @27 RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[allFloat] last> | |
Def candidates [allFloat], Use candidates [allFloat] | |
Interval 8: RefPositions {} physReg:NA Preferences=[allFloat] | |
Assigning related <I7> to <I8> | |
<RefPosition #16 @28 RefTypeDef <Ivl:8> ADD BB01 regmask=[allFloat]> | |
N029 ( 52, 22) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 NA REG NA | |
+<TreeNodeInfo @ 29 0=1 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N029. V03(L3) | |
consume=1 produce=0 | |
at start of tree, map contains: { N027. ADD -> (28.N027) } | |
Assigning related <L3> to <I8> | |
<RefPosition #17 @29 RefTypeUse <Ivl:8> BB01 regmask=[allFloat] last> | |
Def candidates [allFloat], Use candidates [allFloat] | |
<RefPosition #18 @30 RefTypeDef <Ivl:3 V03> STORE_LCL_VAR BB01 regmask=[allFloat] last> | |
N031 ( 1, 1) [000001] ------------ * LCL_VAR ref V00 this u:2 NA (last use) REG NA $80 | |
+<TreeNodeInfo @ 31 1=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I> | |
N031. V00(L0) | |
consume=0 produce=1 | |
N033 (???,???) [000052] -c---------- * LEA(b+8) byref REG NA | |
+<TreeNodeInfo @ 33 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I> | |
N033. LEA(b+8) | |
Contained | |
N035 ( 1, 2) [000031] ------------ * LCL_VAR double V03 tmp1 u:2 NA (last use) REG NA <l:$1c6, c:$1c5> | |
+<TreeNodeInfo @ 35 1=0 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N035. V03(L3) | |
consume=0 produce=1 | |
N037 (???,???) [000050] -A--GO------ * STOREIND double REG NA | |
+<TreeNodeInfo @ 37 0=2 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N037. STOREIND | |
consume=2 produce=0 | |
at start of tree, map contains: { N035. LCL_VAR -> (35.N035); N033. LEA -> (31.N031) } | |
<RefPosition #19 @37 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] last> | |
<RefPosition #20 @37 RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[allFloat] last> | |
N039 ( 0, 0) [000023] ------------ * IL_OFFSET void IL offset: 0x1f REG NA | |
+<TreeNodeInfo @ 39 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I> | |
N039. IL_OFFSET IL offset: 0x1f REG NA | |
consume=0 produce=0 | |
N041 ( 0, 0) [000022] ------------ * RETURN void REG NA $300 | |
+<TreeNodeInfo @ 41 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I> | |
N041. RETURN | |
consume=0 produce=0 | |
CHECKING LAST USES for block 1, liveout={} | |
============================== | |
use: {V00 V01} | |
def: {V02 V03 V05} | |
Linear scan intervals BEFORE VALIDATING INTERVALS: | |
Interval 0: (V00) RefPositions {#0@0 #3@7 #19@37} physReg:rcx Preferences=[rcx] | |
Interval 1: (V01) RefPositions {#1@0 #9@21} physReg:mm1 Preferences=[mm1] | |
Interval 2: (V02) RefPositions {#8@14 #15@27} physReg:NA Preferences=[allFloat] | |
Interval 3: (V03) RefPositions {#18@30 #20@37} physReg:NA Preferences=[allFloat] | |
Interval 4: (V05) RefPositions {#6@10 #7@13 #11@23} physReg:NA Preferences=[allFloat] | |
Interval 5: RefPositions {#4@8 #5@9} physReg:NA Preferences=[allFloat] RelatedInterval <L4>[000001FFFE8A1938] | |
Interval 6: RefPositions {#10@22 #12@23} physReg:NA Preferences=[allFloat] RelatedInterval <L1>[000001FFFE8A1830] | |
Interval 7: RefPositions {#13@24 #14@27} physReg:NA Preferences=[allFloat] RelatedInterval <L4>[000001FFFE8A1938] | |
Interval 8: RefPositions {#16@28 #17@29} physReg:NA Preferences=[allFloat] RelatedInterval <L3>[000001FFFE8A18E0] | |
------------ | |
REFPOSITIONS BEFORE VALIDATING INTERVALS: | |
------------ | |
<RefPosition #0 @0 ->#3 RefTypeParamDef <Ivl:0 V00> BB00 regmask=[rcx] fixed> | |
<RefPosition #1 @0 ->#9 RefTypeParamDef <Ivl:1 V01> BB00 regmask=[mm1] fixed> | |
<RefPosition #2 @1 RefTypeBB BB01 regmask=[]> | |
<RefPosition #3 @7 ->#19 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt]> | |
<RefPosition #4 @8 ->#5 RefTypeDef <Ivl:5> IND BB01 regmask=[allFloat]> | |
<RefPosition #5 @9 RefTypeUse <Ivl:5> BB01 regmask=[allFloat] last> | |
<RefPosition #6 @10 ->#7 RefTypeDef <Ivl:4 V05> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #7 @13 ->#11 RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #8 @14 ->#15 RefTypeDef <Ivl:2 V02> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #9 @21 RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[allFloat] last> | |
<RefPosition #10 @22 ->#12 RefTypeDef <Ivl:6> DIV BB01 regmask=[allFloat]> | |
<RefPosition #11 @23 RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
<RefPosition #12 @23 RefTypeUse <Ivl:6> BB01 regmask=[allFloat] last> | |
<RefPosition #13 @24 ->#14 RefTypeDef <Ivl:7> MUL BB01 regmask=[allFloat]> | |
<RefPosition #14 @27 RefTypeUse <Ivl:7> BB01 regmask=[allFloat] last> | |
<RefPosition #15 @27 RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
<RefPosition #16 @28 ->#17 RefTypeDef <Ivl:8> ADD BB01 regmask=[allFloat]> | |
<RefPosition #17 @29 RefTypeUse <Ivl:8> BB01 regmask=[allFloat] last> | |
<RefPosition #18 @30 ->#20 RefTypeDef <Ivl:3 V03> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #19 @37 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] last> | |
<RefPosition #20 @37 RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[allFloat] last> | |
----------------- | |
<RefPosition #0 @0 ->#3 RefTypeParamDef <Ivl:0 V00> BB00 regmask=[rcx] fixed> | |
<RefPosition #3 @7 ->#19 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt]> | |
<RefPosition #19 @37 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] last> | |
----------------- | |
<RefPosition #8 @14 ->#15 RefTypeDef <Ivl:2 V02> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #15 @27 RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
----------------- | |
<RefPosition #18 @30 ->#20 RefTypeDef <Ivl:3 V03> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #20 @37 RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[allFloat] last> | |
----------------- | |
<RefPosition #6 @10 ->#7 RefTypeDef <Ivl:4 V05> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #7 @13 ->#11 RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #11 @23 RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
----------------- | |
<RefPosition #1 @0 ->#9 RefTypeParamDef <Ivl:1 V01> BB00 regmask=[mm1] fixed> | |
<RefPosition #9 @21 RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[allFloat] last> | |
TUPLE STYLE DUMP WITH REF POSITIONS | |
Incoming Parameters: V00 V01 | |
BB01 [000..020) (return), preds={} succs={} | |
===== | |
N003. V00(L0) | |
N005. LEA(b+8) | |
N007. IND | |
Use:<L0>(#3) | |
Def:<I5>(#4) Pref:<L4> | |
N009. V05(L4) | |
Use:<I5>(#5) * | |
Def:<L4>(#6) | |
N011. V05(L4) | |
N013. V02(L2) | |
Use:<L4>(#7) | |
Def:<L2>(#8) | |
N015. V05(L4) | |
N017. V01(L1) | |
N019. CNS_DBL 100.00000000000000 REG NA | |
N021. DIV | |
Use:<L1>(#9) * | |
Def:<I6>(#10) Pref:<L1> | |
N023. MUL | |
Use:<L4>(#11) * | |
Use:<I6>(#12) * | |
Def:<I7>(#13) Pref:<L4> | |
N025. V02(L2) | |
N027. ADD | |
Use:<I7>(#14) * | |
Use:<L2>(#15) * | |
Def:<I8>(#16) Pref:<L3> | |
N029. V03(L3) | |
Use:<I8>(#17) * | |
Def:<L3>(#18) | |
N031. V00(L0) | |
N033. LEA(b+8) | |
N035. V03(L3) | |
N037. STOREIND | |
Use:<L0>(#19) * | |
Use:<L3>(#20) * | |
N039. IL_OFFSET IL offset: 0x1f REG NA | |
N041. RETURN | |
Linear scan intervals after buildIntervals: | |
Interval 0: (V00) RefPositions {#0@0 #3@7 #19@37} physReg:rcx Preferences=[rcx] | |
Interval 1: (V01) RefPositions {#1@0 #9@21} physReg:mm1 Preferences=[mm1] | |
Interval 2: (V02) RefPositions {#8@14 #15@27} physReg:NA Preferences=[allFloat] | |
Interval 3: (V03) RefPositions {#18@30 #20@37} physReg:NA Preferences=[allFloat] | |
Interval 4: (V05) RefPositions {#6@10 #7@13 #11@23} physReg:NA Preferences=[allFloat] | |
Interval 5: RefPositions {#4@8 #5@9} physReg:NA Preferences=[allFloat] RelatedInterval <L4>[000001FFFE8A1938] | |
Interval 6: RefPositions {#10@22 #12@23} physReg:NA Preferences=[allFloat] RelatedInterval <L1>[000001FFFE8A1830] | |
Interval 7: RefPositions {#13@24 #14@27} physReg:NA Preferences=[allFloat] RelatedInterval <L4>[000001FFFE8A1938] | |
Interval 8: RefPositions {#16@28 #17@29} physReg:NA Preferences=[allFloat] RelatedInterval <L3>[000001FFFE8A18E0] | |
*************** In LinearScan::allocateRegisters() | |
Linear scan intervals before allocateRegisters: | |
Interval 0: (V00) RefPositions {#0@0 #3@7 #19@37} physReg:rcx Preferences=[rcx] | |
Interval 1: (V01) RefPositions {#1@0 #9@21} physReg:mm1 Preferences=[mm1] | |
Interval 2: (V02) RefPositions {#8@14 #15@27} physReg:NA Preferences=[allFloat] | |
Interval 3: (V03) RefPositions {#18@30 #20@37} physReg:NA Preferences=[allFloat] | |
Interval 4: (V05) RefPositions {#6@10 #7@13 #11@23} physReg:NA Preferences=[allFloat] | |
Interval 5: RefPositions {#4@8 #5@9} physReg:NA Preferences=[allFloat] RelatedInterval <L4>[000001FFFE8A1938] | |
Interval 6: RefPositions {#10@22 #12@23} physReg:NA Preferences=[allFloat] RelatedInterval <L1>[000001FFFE8A1830] | |
Interval 7: RefPositions {#13@24 #14@27} physReg:NA Preferences=[allFloat] RelatedInterval <L4>[000001FFFE8A1938] | |
Interval 8: RefPositions {#16@28 #17@29} physReg:NA Preferences=[allFloat] RelatedInterval <L3>[000001FFFE8A18E0] | |
------------ | |
REFPOSITIONS BEFORE ALLOCATION: | |
------------ | |
<RefPosition #0 @0 ->#3 RefTypeParamDef <Ivl:0 V00> BB00 regmask=[rcx] fixed> | |
<RefPosition #1 @0 ->#9 RefTypeParamDef <Ivl:1 V01> BB00 regmask=[mm1] fixed> | |
<RefPosition #2 @1 RefTypeBB BB01 regmask=[]> | |
<RefPosition #3 @7 ->#19 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt]> | |
<RefPosition #4 @8 ->#5 RefTypeDef <Ivl:5> IND BB01 regmask=[allFloat]> | |
<RefPosition #5 @9 RefTypeUse <Ivl:5> BB01 regmask=[allFloat] last> | |
<RefPosition #6 @10 ->#7 RefTypeDef <Ivl:4 V05> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #7 @13 ->#11 RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #8 @14 ->#15 RefTypeDef <Ivl:2 V02> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #9 @21 RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[allFloat] last> | |
<RefPosition #10 @22 ->#12 RefTypeDef <Ivl:6> DIV BB01 regmask=[allFloat]> | |
<RefPosition #11 @23 RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
<RefPosition #12 @23 RefTypeUse <Ivl:6> BB01 regmask=[allFloat] last> | |
<RefPosition #13 @24 ->#14 RefTypeDef <Ivl:7> MUL BB01 regmask=[allFloat]> | |
<RefPosition #14 @27 RefTypeUse <Ivl:7> BB01 regmask=[allFloat] last> | |
<RefPosition #15 @27 RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
<RefPosition #16 @28 ->#17 RefTypeDef <Ivl:8> ADD BB01 regmask=[allFloat]> | |
<RefPosition #17 @29 RefTypeUse <Ivl:8> BB01 regmask=[allFloat] last> | |
<RefPosition #18 @30 ->#20 RefTypeDef <Ivl:3 V03> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #19 @37 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] last> | |
<RefPosition #20 @37 RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[allFloat] last> | |
VAR REFPOSITIONS BEFORE ALLOCATION | |
--- V00 | |
<RefPosition #0 @0 ->#3 RefTypeParamDef <Ivl:0 V00> BB00 regmask=[rcx] fixed> | |
<RefPosition #3 @7 ->#19 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt]> | |
<RefPosition #19 @37 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] last> | |
--- V01 | |
<RefPosition #1 @0 ->#9 RefTypeParamDef <Ivl:1 V01> BB00 regmask=[mm1] fixed> | |
<RefPosition #9 @21 RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[allFloat] last> | |
--- V02 | |
<RefPosition #8 @14 ->#15 RefTypeDef <Ivl:2 V02> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #15 @27 RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
--- V03 | |
<RefPosition #18 @30 ->#20 RefTypeDef <Ivl:3 V03> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #20 @37 RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[allFloat] last> | |
--- V04 | |
--- V05 | |
<RefPosition #6 @10 ->#7 RefTypeDef <Ivl:4 V05> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #7 @13 ->#11 RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #11 @23 RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
Allocating Registers | |
-------------------- | |
The following table has one or more rows for each RefPosition that is handled during allocation. | |
The first column provides the basic information about the RefPosition, with its type (e.g. Def, | |
Use, Fixd) followed by a '*' if it is a last use, and a 'D' if it is delayRegFree, and then the | |
action taken during allocation (e.g. Alloc a new register, or Keep an existing one). | |
The subsequent columns show the Interval occupying each register, if any, followed by 'a' if it is | |
active, and 'i'if it is inactive. Columns are only printed up to the last modifed register, which | |
may increase during allocation, in which case additional columns will appear. Registers which are | |
not marked modified have ---- in their column. | |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ | |
LocRP# Name Type Action Reg |rax |rcx |rdx |rbx |rsp |rbp |rsi |rdi |r8 |r9 |r10 |r11 |r12 |r13 |r14 |r15 |mm0 |mm1 | | |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ | |
|----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V1 a| | |
0.#0 V0 Parm Keep rcx |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V1 a| | |
0.#1 V1 Parm Keep mm1 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V1 a| | |
1.#2 BB1 PredBB0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V1 a| | |
7.#3 V0 Use Keep rcx |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V1 a| | |
8.#4 I5 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|I5 a|V1 a| | |
9.#5 I5 Use * Keep mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|I5 a|V1 a| | |
10.#6 V5 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V5 a|V1 a| | |
13.#7 V5 Use Keep mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V5 a|V1 a| | |
14.#8 V2 Def Alloc mm2 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V5 a|V1 a|V2 a| | |
21.#9 V1 Use * Keep mm1 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V5 a|V1 a|V2 a| | |
22.#10 I6 Def Alloc mm1 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V5 a|I6 a|V2 a| | |
23.#11 V5 Use * Keep mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V5 a|I6 a|V2 a| | |
23.#12 I6 Use * Keep mm1 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V5 a|I6 a|V2 a| | |
24.#13 I7 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|I7 a| |V2 a| | |
27.#14 I7 Use * Keep mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|I7 a| |V2 a| | |
27.#15 V2 Use * Keep mm2 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|I7 a| |V2 a| | |
28.#16 I8 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|I8 a| | | | |
29.#17 I8 Use * Keep mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|I8 a| | | | |
30.#18 V3 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V3 a| | | | |
37.#19 V0 Use * Keep rcx |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V3 a| | | | |
37.#20 V3 Use * Keep mm0 |----| |----|----|----|----|----|----|----|----|----|----|----|----|----|----| | | | | |
------------ | |
REFPOSITIONS AFTER ALLOCATION: | |
------------ | |
<RefPosition #0 @0 ->#3 RefTypeParamDef <Ivl:0 V00> BB00 regmask=[rcx] fixed> | |
<RefPosition #1 @0 ->#9 RefTypeParamDef <Ivl:1 V01> BB00 regmask=[mm1] fixed> | |
<RefPosition #2 @1 RefTypeBB BB01 regmask=[]> | |
<RefPosition #3 @7 ->#19 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[rcx]> | |
<RefPosition #4 @8 ->#5 RefTypeDef <Ivl:5> IND BB01 regmask=[mm0]> | |
<RefPosition #5 @9 RefTypeUse <Ivl:5> BB01 regmask=[mm0] last> | |
<RefPosition #6 @10 ->#7 RefTypeDef <Ivl:4 V05> STORE_LCL_VAR BB01 regmask=[mm0]> | |
<RefPosition #7 @13 ->#11 RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[mm0]> | |
<RefPosition #8 @14 ->#15 RefTypeDef <Ivl:2 V02> STORE_LCL_VAR BB01 regmask=[mm2]> | |
<RefPosition #9 @21 RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[mm1] last> | |
<RefPosition #10 @22 ->#12 RefTypeDef <Ivl:6> DIV BB01 regmask=[mm1]> | |
<RefPosition #11 @23 RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[mm0] last regOptional> | |
<RefPosition #12 @23 RefTypeUse <Ivl:6> BB01 regmask=[mm1] last> | |
<RefPosition #13 @24 ->#14 RefTypeDef <Ivl:7> MUL BB01 regmask=[mm0]> | |
<RefPosition #14 @27 RefTypeUse <Ivl:7> BB01 regmask=[mm0] last> | |
<RefPosition #15 @27 RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[mm2] last regOptional> | |
<RefPosition #16 @28 ->#17 RefTypeDef <Ivl:8> ADD BB01 regmask=[mm0]> | |
<RefPosition #17 @29 RefTypeUse <Ivl:8> BB01 regmask=[mm0] last> | |
<RefPosition #18 @30 ->#20 RefTypeDef <Ivl:3 V03> STORE_LCL_VAR BB01 regmask=[mm0]> | |
<RefPosition #19 @37 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[rcx] last> | |
<RefPosition #20 @37 RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[mm0] last> | |
VAR REFPOSITIONS AFTER ALLOCATION | |
--- V00 | |
<RefPosition #0 @0 ->#3 RefTypeParamDef <Ivl:0 V00> BB00 regmask=[rcx] fixed> | |
<RefPosition #3 @7 ->#19 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[rcx]> | |
<RefPosition #19 @37 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[rcx] last> | |
--- V01 | |
<RefPosition #1 @0 ->#9 RefTypeParamDef <Ivl:1 V01> BB00 regmask=[mm1] fixed> | |
<RefPosition #9 @21 RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[mm1] last> | |
--- V02 | |
<RefPosition #8 @14 ->#15 RefTypeDef <Ivl:2 V02> STORE_LCL_VAR BB01 regmask=[mm2]> | |
<RefPosition #15 @27 RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[mm2] last regOptional> | |
--- V03 | |
<RefPosition #18 @30 ->#20 RefTypeDef <Ivl:3 V03> STORE_LCL_VAR BB01 regmask=[mm0]> | |
<RefPosition #20 @37 RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[mm0] last> | |
--- V04 | |
--- V05 | |
<RefPosition #6 @10 ->#7 RefTypeDef <Ivl:4 V05> STORE_LCL_VAR BB01 regmask=[mm0]> | |
<RefPosition #7 @13 ->#11 RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[mm0]> | |
<RefPosition #11 @23 RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[mm0] last regOptional> | |
Active intervals at end of allocation: | |
----------------------- | |
RESOLVING BB BOUNDARIES | |
----------------------- | |
Resolution Candidates: {V00 V01} | |
Has NoCritical Edges | |
Prior to Resolution | |
BB01 use def in out | |
{V00 V01} | |
{V02 V03 V05} | |
{V00 V01} | |
{} | |
Var=Reg beg of BB01: V00=rcx V01=mm1 | |
Var=Reg end of BB01: none | |
RESOLVING EDGES | |
Set V00 argument initial register to rcx | |
Set V01 argument initial register to mm1 | |
Trees after linear scan register allocator (LSRA) | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
N003 ( 1, 1) [000002] ------------ t2 = LCL_VAR ref V00 this u:2 rcx REG rcx $80 | |
/--* t2 ref | |
N005 (???,???) [000051] -c---------- t51 = * LEA(b+8) byref REG NA | |
/--* t51 byref | |
N007 ( 5, 4) [000025] ---XG------- t25 = * IND double REG mm0 <l:$1c1, c:$200> | |
/--* t25 double | |
N009 ( 5, 4) [000046] DA-XG------- * STORE_LCL_VAR double V05 cse0 mm0 REG mm0 | |
N011 ( 1, 2) [000047] ------------ t47 = LCL_VAR double V05 cse0 mm0 REG mm0 <l:$1c1, c:$200> | |
/--* t47 double | |
N013 ( 6, 6) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 mm2 REG mm2 | |
N015 ( 1, 2) [000049] ------------ t49 = LCL_VAR double V05 cse0 mm0 (last use) REG mm0 <l:$1c1, c:$200> | |
N017 ( 1, 2) [000014] ------------ t14 = LCL_VAR double V01 arg1 u:2 mm1 (last use) REG mm1 $c0 | |
N019 ( 3, 4) [000015] -c---------- t15 = CNS_DBL double 100.00000000000000 REG NA $240 | |
/--* t14 double | |
+--* t15 double | |
N021 ( 40, 10) [000016] ------------ t16 = * DIV double REG mm1 $1c2 | |
/--* t49 double | |
+--* t16 double | |
N023 ( 46, 16) [000017] ----G------- t17 = * MUL double REG mm0 <l:$1c4, c:$1c3> | |
N025 ( 1, 2) [000012] ------------ t12 = LCL_VAR double V02 tmp0 u:2 mm2 (last use) REG mm2 <l:$1c1, c:$200> | |
/--* t17 double | |
+--* t12 double | |
N027 ( 52, 22) [000018] ----G------- t18 = * ADD double REG mm0 <l:$1c6, c:$1c5> | |
/--* t18 double | |
N029 ( 52, 22) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 mm0 REG mm0 | |
N031 ( 1, 1) [000001] ------------ t1 = LCL_VAR ref V00 this u:2 rcx (last use) REG rcx $80 | |
/--* t1 ref | |
N033 (???,???) [000052] -c---------- t52 = * LEA(b+8) byref REG NA | |
N035 ( 1, 2) [000031] ------------ t31 = LCL_VAR double V03 tmp1 u:2 mm0 (last use) REG mm0 <l:$1c6, c:$1c5> | |
/--* t52 byref | |
+--* t31 double | |
N037 (???,???) [000050] -A--GO------ * STOREIND double REG NA | |
N039 ( 0, 0) [000023] ------------ IL_OFFSET void IL offset: 0x1f REG NA | |
N041 ( 0, 0) [000022] ------------ RETURN void REG NA $300 | |
------------------------------------------------------------------------------------------------------------------- | |
Final allocation | |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ | |
LocRP# Name Type Action Reg |rax |rcx |rdx |rbx |rsp |rbp |rsi |rdi |r8 |r9 |r10 |r11 |r12 |r13 |r14 |r15 |mm0 |mm1 |mm2 | | |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ | |
0.#0 V0 Parm Alloc rcx |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----| | | | | |
0.#1 V1 Parm Alloc mm1 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----| |V1 a| | | |
1.#2 BB1 PredBB0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----| |V1 a| | | |
7.#3 V0 Use Keep rcx |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----| |V1 a| | | |
8.#4 I5 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|I5 a|V1 a| | | |
9.#5 I5 Use * Keep mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|I5 i|V1 a| | | |
10.#6 V5 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V5 a|V1 a| | | |
13.#7 V5 Use Keep mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V5 a|V1 a| | | |
14.#8 V2 Def Alloc mm2 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V5 a|V1 a|V2 a| | |
21.#9 V1 Use * Keep mm1 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V5 a|V1 i|V2 a| | |
22.#10 I6 Def Alloc mm1 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V5 a|I6 a|V2 a| | |
23.#11 V5 Use * Keep mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V5 i|I6 a|V2 a| | |
23.#12 I6 Use * Keep mm1 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----| |I6 i|V2 a| | |
24.#13 I7 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|I7 a| |V2 a| | |
27.#14 I7 Use * Keep mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|I7 i| |V2 a| | |
27.#15 V2 Use * Keep mm2 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----| | |V2 i| | |
28.#16 I8 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|I8 a| | | | |
29.#17 I8 Use * Keep mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|I8 i| | | | |
30.#18 V3 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V3 a| | | | |
37.#19 V0 Use * Keep rcx |----|V0 i|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V3 a| | | | |
37.#20 V3 Use * Keep mm0 |----| |----|----|----|----|----|----|----|----|----|----|----|----|----|----|V3 i| | | | |
Recording the maximum number of concurrent spills: | |
---------- | |
LSRA Stats | |
---------- | |
Total Tracked Vars: 5 | |
Total Reg Cand Vars: 5 | |
Total number of Intervals: 8 | |
Total number of RefPositions: 20 | |
Total Spill Count: 0 Weighted: 0 | |
Total CopyReg Count: 0 Weighted: 0 | |
Total ResolutionMov Count: 0 Weighted: 0 | |
Total number of split edges: 0 | |
Total Number of spill temps created: 0 | |
TUPLE STYLE DUMP WITH REGISTER ASSIGNMENTS | |
Incoming Parameters: V00(rcx) V01(mm1) | |
BB01 [000..020) (return), preds={} succs={} | |
===== | |
N003. V00(rcx) | |
N005. LEA(b+8) | |
N007. mm0 = IND ; rcx | |
* N009. V05(mm0); mm0 | |
N011. V05(mm0) | |
* N013. V02(mm2); mm0 | |
N015. V05(mm0*) | |
N017. V01(mm1*) | |
N019. CNS_DBL 100.00000000000000 REG NA | |
N021. mm1 = DIV ; mm1* | |
N023. mm0 = MUL ; mm0*,mm1 | |
N025. V02(mm2*) | |
N027. mm0 = ADD ; mm0,mm2* | |
* N029. V03(mm0); mm0 | |
N031. V00(rcx*) | |
N033. LEA(b+8) | |
N035. V03(mm0*) | |
N037. STOREIND ; rcx*,mm0* | |
N039. IL_OFFSET IL offset: 0x1f REG NA | |
N041. RETURN | |
Var=Reg end of BB01: none | |
*************** In genGenerateCode() | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
Finalizing stack frame | |
Recording Var Locations at start of BB01 | |
V00(rcx) V01(mm1) | |
Modified regs: [rcx mm0-mm2] | |
Callee-saved registers pushed: 0 [] | |
*************** In lvaAssignFrameOffsets(FINAL_FRAME_LAYOUT) | |
; Final local variable assignments | |
; | |
; V00 this [V00,T00] ( 6, 6 ) ref -> rcx this class-hnd | |
; V01 arg1 [V01,T04] ( 4, 4 ) double -> mm1 | |
; V02 tmp0 [V02,T01] ( 4, 8 ) double -> mm2 | |
; V03 tmp1 [V03,T02] ( 4, 8 ) double -> mm0 | |
;# V04 OutArgs [V04 ] ( 1, 1 ) lclBlk ( 0) [rsp+0x00] | |
; V05 cse0 [V05,T03] ( 6, 6 ) double -> mm0 | |
; | |
; Lcl frame size = 0 | |
=============== Generating BB01 [000..020) (return), preds={} succs={} flags=0x00000000.40030020: i label target LIR | |
BB01 IN (2)={V00 V01} + ByrefExposed + GcHeap | |
OUT(0)={ } | |
Recording Var Locations at start of BB01 | |
V00(rcx) V01(mm1) | |
Change life 0000000000000000 {} -> 0000000000000011 {V00 V01} | |
V00 in reg rcx is becoming live [------] | |
Live regs: 00000000 {} => 00000002 {rcx} | |
V01 in reg mm1 is becoming live [------] | |
Live regs: 00000002 {rcx} => 00000002 {rcx xmm1} | |
Live regs: (unchanged) 00000002 {rcx xmm1} | |
GC regs: (unchanged) 00000002 {rcx} | |
Byref regs: (unchanged) 00000000 {} | |
L_M22417_BB01: | |
Label: IG02, GCvars=0000000000000000 {}, gcrefRegs=00000002 {rcx}, byrefRegs=00000000 {} | |
Setting stack level from -1 to 0 | |
Scope info: begin block BB01, IL range [000..020) | |
Scope info: open scopes = | |
0 (V00 this) [000..020) | |
1 (V01 arg1) [000..020) | |
Generating: N003 ( 1, 1) [000002] ------------ t2 = LCL_VAR ref V00 this u:2 rcx REG rcx $80 | |
/--* t2 ref | |
Generating: N005 (???,???) [000051] -c---------- t51 = * LEA(b+8) byref REG NA | |
/--* t51 byref | |
Generating: N007 ( 5, 4) [000025] ---XG------- t25 = * IND double REG mm0 <l:$1c1, c:$200> | |
IN0001: vmovsd xmm0, qword ptr [rcx+8] | |
/--* t25 double | |
Generating: N009 ( 5, 4) [000046] DA-XG------- * STORE_LCL_VAR double V05 cse0 mm0 REG mm0 | |
V05 in reg mm0 is becoming live [000046] | |
Live regs: 00000002 {rcx xmm1} => 00000002 {rcx xmm0 xmm1} | |
Live vars: {V00 V01} => {V00 V01 V05} | |
Generating: N011 ( 1, 2) [000047] ------------ t47 = LCL_VAR double V05 cse0 mm0 REG mm0 <l:$1c1, c:$200> | |
/--* t47 double | |
Generating: N013 ( 6, 6) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 mm2 REG mm2 | |
IN0002: vmovaps xmm2, xmm0 | |
V02 in reg mm2 is becoming live [000010] | |
Live regs: 00000002 {rcx xmm0 xmm1} => 00000002 {rcx xmm0 xmm1 xmm2} | |
Live vars: {V00 V01 V05} => {V00 V01 V02 V05} | |
Generating: N015 ( 1, 2) [000049] ------------ t49 = LCL_VAR double V05 cse0 mm0 (last use) REG mm0 <l:$1c1, c:$200> | |
Generating: N017 ( 1, 2) [000014] ------------ t14 = LCL_VAR double V01 arg1 u:2 mm1 (last use) REG mm1 $c0 | |
Generating: N019 ( 3, 4) [000015] -c---------- t15 = CNS_DBL double 100.00000000000000 REG NA $240 | |
/--* t14 double | |
+--* t15 double | |
Generating: N021 ( 40, 10) [000016] ------------ t16 = * DIV double REG mm1 $1c2 | |
V01 in reg mm1 is becoming dead [000014] | |
Live regs: 00000002 {rcx xmm0 xmm1 xmm2} => 00000002 {rcx xmm0 xmm2} | |
Live vars: {V00 V01 V02 V05} => {V00 V02 V05} | |
IN0003: vdivsd xmm1, qword ptr [reloc @RWD00] | |
/--* t49 double | |
+--* t16 double | |
Generating: N023 ( 46, 16) [000017] ----G------- t17 = * MUL double REG mm0 <l:$1c4, c:$1c3> | |
V05 in reg mm0 is becoming dead [000049] | |
Live regs: 00000002 {rcx xmm0 xmm2} => 00000002 {rcx xmm2} | |
Live vars: {V00 V02 V05} => {V00 V02} | |
IN0004: vmulsd xmm0, xmm1 | |
Generating: N025 ( 1, 2) [000012] ------------ t12 = LCL_VAR double V02 tmp0 u:2 mm2 (last use) REG mm2 <l:$1c1, c:$200> | |
/--* t17 double | |
+--* t12 double | |
Generating: N027 ( 52, 22) [000018] ----G------- t18 = * ADD double REG mm0 <l:$1c6, c:$1c5> | |
V02 in reg mm2 is becoming dead [000012] | |
Live regs: 00000002 {rcx xmm2} => 00000002 {rcx} | |
Live vars: {V00 V02} => {V00} | |
IN0005: vaddsd xmm0, xmm2 | |
/--* t18 double | |
Generating: N029 ( 52, 22) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 mm0 REG mm0 | |
V03 in reg mm0 is becoming live [000036] | |
Live regs: 00000002 {rcx} => 00000002 {rcx xmm0} | |
Live vars: {V00} => {V00 V03} | |
Generating: N031 ( 1, 1) [000001] ------------ t1 = LCL_VAR ref V00 this u:2 rcx (last use) REG rcx $80 | |
/--* t1 ref | |
Generating: N033 (???,???) [000052] -c---------- t52 = * LEA(b+8) byref REG NA | |
Generating: N035 ( 1, 2) [000031] ------------ t31 = LCL_VAR double V03 tmp1 u:2 mm0 (last use) REG mm0 <l:$1c6, c:$1c5> | |
/--* t52 byref | |
+--* t31 double | |
Generating: N037 (???,???) [000050] -A--GO------ * STOREIND double REG NA | |
V00 in reg rcx is becoming dead [000001] | |
Live regs: 00000002 {rcx xmm0} => 00000000 {xmm0} | |
Live vars: {V00 V03} => {V03} | |
GC regs: 00000002 {rcx} => 00000000 {} | |
V03 in reg mm0 is becoming dead [000031] | |
Live regs: 00000000 {xmm0} => 00000000 {} | |
Live vars: {V03} => {} | |
IN0006: vmovsd qword ptr [rcx+8], xmm0 | |
Added IP mapping: 0x001F STACK_EMPTY (G_M22417_IG02,ins#6,ofs#36) label | |
Generating: N039 ( 0, 0) [000023] ------------ IL_OFFSET void IL offset: 0x1f REG NA | |
Generating: N041 ( 0, 0) [000022] ------------ RETURN void REG NA $300 | |
Scope info: end block BB01, IL range [000..020) | |
Scope info: ending scope, LVnum=1 [000..020) | |
Scope info: ending scope, LVnum=0 [000..020) | |
Scope info: open scopes = | |
<none> | |
Added IP mapping: EPILOG STACK_EMPTY (G_M22417_IG02,ins#6,ofs#36) label | |
Reserving epilog IG for block BB01 | |
G_M22417_IG02: ; offs=000000H, funclet=00 | |
*************** After placeholder IG creation | |
G_M22417_IG01: ; func=00, offs=000000H, size=0000H, gcrefRegs=00000000 {} <-- Prolog IG | |
G_M22417_IG02: ; offs=000000H, size=0024H, gcrefRegs=00000002 {rcx}, byrefRegs=00000000 {}, byref | |
G_M22417_IG03: ; epilog placeholder, next placeholder=<END>, BB01 [0000], epilog, emitadd <-- First placeholder <-- Last placeholder | |
; PrevGCVars=0000000000000000 {}, PrevGCrefRegs=00000000 {}, PrevByrefRegs=00000000 {} | |
; InitGCVars=0000000000000000 {}, InitGCrefRegs=00000002 {rcx}, InitByrefRegs=00000000 {} | |
Liveness not changing: 0000000000000000 {} | |
# compCycleEstimate = 65, compSizeEstimate = 35 _1020.MethodBelow:RaiseValue(double):this | |
; Final local variable assignments | |
; | |
; V00 this [V00,T00] ( 6, 6 ) ref -> rcx this class-hnd | |
; V01 arg1 [V01,T04] ( 4, 4 ) double -> mm1 | |
; V02 tmp0 [V02,T01] ( 4, 8 ) double -> mm2 | |
; V03 tmp1 [V03,T02] ( 4, 8 ) double -> mm0 | |
;# V04 OutArgs [V04 ] ( 1, 1 ) lclBlk ( 0) [rsp+0x00] | |
; V05 cse0 [V05,T03] ( 6, 6 ) double -> mm0 | |
; | |
; Lcl frame size = 0 | |
*************** Before prolog / epilog generation | |
G_M22417_IG01: ; func=00, offs=000000H, size=0000H, gcrefRegs=00000000 {} <-- Prolog IG | |
G_M22417_IG02: ; offs=000000H, size=0024H, gcrefRegs=00000002 {rcx}, byrefRegs=00000000 {}, byref | |
G_M22417_IG03: ; epilog placeholder, next placeholder=<END>, BB01 [0000], epilog, emitadd <-- First placeholder <-- Last placeholder | |
; PrevGCVars=0000000000000000 {}, PrevGCrefRegs=00000000 {}, PrevByrefRegs=00000000 {} | |
; InitGCVars=0000000000000000 {}, InitGCrefRegs=00000002 {rcx}, InitByrefRegs=00000000 {} | |
Recording Var Locations at start of BB01 | |
V00(rcx) V01(mm1) | |
*************** In genFnProlog() | |
Added IP mapping to front: PROLOG STACK_EMPTY (G_M22417_IG01,ins#0,ofs#0) label | |
__prolog: | |
IN0007: vzeroupper | |
*************** In genFnPrologCalleeRegArgs() for int regs | |
*************** In genFnPrologCalleeRegArgs() for float regs | |
*************** In genEnregisterIncomingStackArgs() | |
G_M22417_IG01: ; offs=000000H, funclet=00 | |
*************** In genFnEpilog() | |
__epilog: | |
gcVarPtrSetCur=0000000000000000 {}, gcRegGCrefSetCur=00000002 {rcx}, gcRegByrefSetCur=00000000 {} | |
IN0008: ret | |
G_M22417_IG03: ; offs=000024H, funclet=00 | |
0 prologs, 1 epilogs, 0 funclet prologs, 0 funclet epilogs | |
*************** After prolog / epilog generation | |
G_M22417_IG01: ; func=00, offs=000000H, size=0003H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG | |
G_M22417_IG02: ; offs=000003H, size=0024H, gcrefRegs=00000002 {rcx}, byrefRegs=00000000 {}, byref | |
G_M22417_IG03: ; offs=000027H, size=0001H, epilog, nogc, emitadd | |
*************** In emitJumpDistBind() | |
Hot code size = 0x28 bytes | |
Cold code size = 0x0 bytes | |
reserveUnwindInfo(isFunclet=FALSE, isColdCode=FALSE, unwindSize=0x4) | |
*************** In emitEndCodeGen() | |
Converting emitMaxStackDepth from bytes (0) to elements (0) | |
*************************************************************************** | |
Instructions as they come out of the scheduler | |
G_M22417_IG01: ; func=00, offs=000000H, size=0003H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG | |
IN0007: 000000 C5F877 vzeroupper | |
G_M22417_IG02: ; func=00, offs=000003H, size=0024H, gcrefRegs=00000002 {rcx}, byrefRegs=00000000 {}, byref | |
New gcrReg live regs=00000002 {rcx} | |
gcrReg +[rcx] | |
IN0001: 000003 C4E17B104108 vmovsd xmm0, qword ptr [rcx+8] | |
IN0002: 000009 C4E17828D0 vmovaps xmm2, xmm0 | |
IN0003: 00000E C4E1735E0D11000000 vdivsd xmm1, qword ptr [reloc @RWD00] | |
IN0004: 000017 C4E17B59C1 vmulsd xmm0, xmm1 | |
IN0005: 00001C C4E17B58C2 vaddsd xmm0, xmm2 | |
IN0006: 000021 C4E17B114108 vmovsd qword ptr [rcx+8], xmm0 | |
G_M22417_IG03: ; func=00, offs=000027H, size=0001H, epilog, nogc, emitadd | |
IN0008: 000027 C3 ret | |
Emitting data sections: 8 total bytes | |
section 0, size 8, raw data | |
00 00 00 00 00 00 59 40 | |
New gcrReg live regs=00000000 {} | |
gcrReg -[rcx] | |
Allocated method code size = 40 , actual size = 40 | |
*************** After end code gen, before unwindEmit() | |
G_M22417_IG01: ; func=00, offs=000000H, size=0003H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG | |
IN0007: 000000 vzeroupper | |
G_M22417_IG02: ; offs=000003H, size=0024H, gcrefRegs=00000002 {rcx}, byrefRegs=00000000 {}, byref | |
IN0001: 000003 vmovsd xmm0, qword ptr [rcx+8] | |
IN0002: 000009 vmovaps xmm2, xmm0 | |
IN0003: 00000E vdivsd xmm1, qword ptr [reloc @RWD00] | |
IN0004: 000017 vmulsd xmm0, xmm1 | |
IN0005: 00001C vaddsd xmm0, xmm2 | |
IN0006: 000021 vmovsd qword ptr [rcx+8], xmm0 | |
G_M22417_IG03: ; offs=000027H, size=0001H, epilog, nogc, emitadd | |
IN0008: 000027 ret | |
Unwind Info: | |
>> Start offset : 0x000000 (not in unwind data) | |
>> End offset : 0x000028 (not in unwind data) | |
Version : 1 | |
Flags : 0x00 | |
SizeOfProlog : 0x00 | |
CountOfUnwindCodes: 0 | |
FrameRegister : none (0) | |
FrameOffset : N/A (no FrameRegister) (Value=0) | |
UnwindCodes : | |
allocUnwindInfo(pHotCode=0x00007FFC5C670D40, pColdCode=0x0000000000000000, startOffset=0x0, endOffset=0x28, unwindSize=0x4, pUnwindBlock=0x000001FFFE891904, funKind=0 (main function)) | |
*************** In genIPmappingGen() | |
IP mapping count : 3 | |
IL offs PROLOG : 0x00000000 ( STACK_EMPTY ) | |
IL offs 0x001F : 0x00000027 ( STACK_EMPTY ) | |
IL offs EPILOG : 0x00000027 ( STACK_EMPTY ) | |
*************** In genSetScopeInfo() | |
VarLocInfo count is 4 | |
*************** Variable debug info | |
4 vars | |
1( UNKNOWN) : From 00000000h to 00000003h, in mm1 | |
0( UNKNOWN) : From 00000000h to 00000003h, in rcx | |
1( UNKNOWN) : From 00000003h to 0000000Eh, in mm1 | |
0( UNKNOWN) : From 00000003h to 00000021h, in rcx | |
*************** In gcInfoBlockHdrSave() | |
Set code length to 40. | |
Set ReturnKind to Scalar. | |
Set Outgoing stack arg area size to 0. | |
Defining 0 call sites: | |
Method code size: 40 | |
Allocations for _1020.MethodBelow:RaiseValue(double):this (MethodHash=aa0b1cbf) | |
count: 498, size: 54137, max = 3264 | |
allocateMemory: 131072, nraUsed: 88360 | |
Alloc'd bytes by kind: | |
kind | size | pct | |
---------------------+------------+-------- | |
AssertionProp | 6460 | 11.93% | |
ASTNode | 6712 | 12.40% | |
InstDesc | 2296 | 4.24% | |
ImpStack | 0 | 0.00% | |
BasicBlock | 856 | 1.58% | |
fgArgInfo | 0 | 0.00% | |
fgArgInfoPtrArr | 0 | 0.00% | |
FlowList | 0 | 0.00% | |
TreeStatementList | 64 | 0.12% | |
SiScope | 272 | 0.50% | |
FlatFPStateX87 | 0 | 0.00% | |
DominatorMemory | 48 | 0.09% | |
LSRA | 3104 | 5.73% | |
LSRA_Interval | 792 | 1.46% | |
LSRA_RefPosition | 1344 | 2.48% | |
Reachability | 16 | 0.03% | |
SSA | 772 | 1.43% | |
ValueNumber | 11922 | 22.02% | |
LvaTable | 2264 | 4.18% | |
UnwindInfo | 0 | 0.00% | |
hashBv | 40 | 0.07% | |
bitset | 0 | 0.00% | |
FixedBitVect | 0 | 0.00% | |
AsIAllocator | 1576 | 2.91% | |
IndirAssignMap | 64 | 0.12% | |
FieldSeqStore | 200 | 0.37% | |
ZeroOffsetFieldMap | 64 | 0.12% | |
ArrayInfoMap | 64 | 0.12% | |
MemoryPhiArg | 0 | 0.00% | |
CSE | 1360 | 2.51% | |
GC | 1312 | 2.42% | |
CorSig | 312 | 0.58% | |
Inlining | 1864 | 3.44% | |
ArrayStack | 0 | 0.00% | |
DebugInfo | 216 | 0.40% | |
DebugOnly | 9766 | 18.04% | |
Codegen | 0 | 0.00% | |
LoopOpt | 0 | 0.00% | |
LoopHoist | 0 | 0.00% | |
Unknown | 377 | 0.70% | |
****** DONE compiling _1020.MethodBelow:RaiseValue(double):this | |
****** START compiling _1020.MethodAbove:RaiseValue(double):this (MethodHash=a9a18473) | |
Generating code for Windows x64 | |
OPTIONS: compCodeOpt = BLENDED_CODE | |
OPTIONS: compDbgCode = false | |
OPTIONS: compDbgInfo = true | |
OPTIONS: compDbgEnC = false | |
OPTIONS: compProcedureSplitting = false | |
OPTIONS: compProcedureSplittingEH = false | |
OPTIONS: Stack probing is DISABLED | |
IL to import: | |
IL_0000 02 ldarg.0 | |
IL_0001 02 ldarg.0 | |
IL_0002 28 07 00 00 06 call 0x6000007 | |
IL_0007 02 ldarg.0 | |
IL_0008 28 07 00 00 06 call 0x6000007 | |
IL_000d 03 ldarg.1 | |
IL_000e 23 00 00 00 00 00 00 59 40 ldc.r8 100.000000 | |
IL_0017 5b div | |
IL_0018 5a mul | |
IL_0019 58 add | |
IL_001a 28 08 00 00 06 call 0x6000008 | |
IL_001f 2a ret | |
lvaSetClass: setting class for V00 to (00007FFC5C556838) _1020.MethodAbove | |
Set preferred register for V00 to [rcx] | |
'this' passed in register rcx | |
Set preferred register for V01 to [mm1] | |
Arg #1 passed in register(s) mm1 | |
; Initial local variable assignments | |
; | |
; V00 this ref this class-hnd | |
; V01 arg1 double | |
*************** In compInitDebuggingInfo() for _1020.MethodAbove:RaiseValue(double):this | |
getVars() returned cVars = 0, extendOthers = true | |
info.compVarScopesCount = 2 | |
VarNum LVNum Name Beg End | |
0: 00h 00h V00 this 000h 020h | |
1: 01h 01h V01 arg1 000h 020h | |
info.compStmtOffsetsCount = 0 | |
info.compStmtOffsetsImplicit = 0005h ( STACK_EMPTY CALL_SITE ) | |
*************** In fgFindBasicBlocks() for _1020.MethodAbove:RaiseValue(double):this | |
Jump targets: | |
none | |
New Basic Block BB01 [0000] created. | |
BB01 [000..020) | |
IL Code Size,Instr 32, 12, Basic Block count 1, Local Variable Num,Ref count 2, 4 for method _1020.MethodAbove:RaiseValue(double):this | |
OPTIONS: opts.MinOpts() == false | |
Basic block list for '_1020.MethodAbove:RaiseValue(double):this' | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In impImport() for _1020.MethodAbove:RaiseValue(double):this | |
impImportBlockPending for BB01 | |
Importing BB01 (PC=000) of '_1020.MethodAbove:RaiseValue(double):this' | |
[ 0] 0 (0x000) ldarg.0 | |
[ 1] 1 (0x001) ldarg.0 | |
[ 2] 2 (0x002) call 06000007 | |
In Compiler::impImportCall: opcode is call, kind=0, callRetType is double, structSize is 0 | |
[000004] ------------ * STMT void (IL 0x000... ???) | |
[000003] I-C-G------- \--* CALL double _1020.MethodAbove.get_Value (exactContextHnd=0x00007FFC5C556839) | |
[000002] ------------ this in rcx \--* LCL_VAR ref V00 this | |
[ 2] 7 (0x007) ldarg.0 | |
[ 3] 8 (0x008) call 06000007 | |
In Compiler::impImportCall: opcode is call, kind=0, callRetType is double, structSize is 0 | |
lvaGrabTemp returning 2 (V02 tmp0) called for impAppendStmt. | |
[000011] ------------ * STMT void (IL ???... ???) | |
[000005] --C--------- | /--* RET_EXPR double(inl return from call [000003]) | |
[000010] -AC--------- \--* ASG double | |
[000009] D------N---- \--* LCL_VAR double V02 tmp0 | |
[000008] ------------ * STMT void (IL ???... ???) | |
[000007] I-C-G------- \--* CALL double _1020.MethodAbove.get_Value (exactContextHnd=0x00007FFC5C556839) | |
[000006] ------------ this in rcx \--* LCL_VAR ref V00 this | |
[ 3] 13 (0x00d) ldarg.1 | |
[ 4] 14 (0x00e) ldc.r8 100.00000000000000 | |
[ 5] 23 (0x017) div | |
[ 4] 24 (0x018) mul | |
[ 3] 25 (0x019) add | |
[ 2] 26 (0x01a) call 06000008 (Implicit Tail call: prefixFlags |= PREFIX_TAILCALL_IMPLICIT) | |
In Compiler::impImportCall: opcode is call, kind=0, callRetType is void, structSize is 0 | |
info.compCompHnd->canTailCall returned false for call [000019] | |
[000021] ------------ * STMT void (IL ???... ???) | |
[000019] I-C-G------- \--* CALL void _1020.MethodAbove.set_Value (exactContextHnd=0x00007FFC5C556839) | |
[000001] ------------ this in rcx +--* LCL_VAR ref V00 this | |
[000015] ------------ | /--* CNS_DBL double 100.00000000000000 | |
[000016] ------------ | /--* DIV double | |
[000014] ------------ | | \--* LCL_VAR double V01 arg1 | |
[000017] --C--------- | /--* MUL double | |
[000013] --C--------- | | \--* RET_EXPR double(inl return from call [000007]) | |
[000018] --C--------- arg1 \--* ADD double | |
[000012] ------------ \--* LCL_VAR double V02 tmp0 | |
[ 0] 31 (0x01f) ret | |
[000023] ------------ * STMT void (IL 0x01F... ???) | |
[000022] ------------ \--* RETURN void | |
New BlockSet epoch 1, # of blocks (including unused BB00): 2, bitset array size: 1 (short) | |
*************** In fgMorph() | |
*************** In fgDebugCheckBBlist | |
*************** In fgInline() | |
Expanding INLINE_CANDIDATE in statement [000004] in BB01: | |
[000004] ------------ * STMT void (IL 0x000...0x01F) | |
[000003] I-C-G------- \--* CALL double _1020.MethodAbove.get_Value (exactContextHnd=0x00007FFC5C556839) | |
[000002] ------------ this in rcx \--* LCL_VAR ref V00 this | |
thisArg: is a local var | |
[000002] ------------ * LCL_VAR ref V00 this | |
INLINER: inlineInfo.tokenLookupContextHandle for _1020.MethodAbove:get_Value():double:this set to 0x00007FFC5C556839: | |
Invoking compiler for the inlinee method _1020.MethodAbove:get_Value():double:this : | |
IL to import: | |
IL_0000 02 ldarg.0 | |
IL_0001 7b 02 00 00 04 ldfld 0x4000002 | |
IL_0006 2a ret | |
INLINER impTokenLookupContextHandle for _1020.MethodAbove:get_Value():double:this is 0x00007FFC5C556839. | |
*************** In fgFindBasicBlocks() for _1020.MethodAbove:get_Value():double:this | |
Jump targets: | |
none | |
New Basic Block BB02 [0001] created. | |
BB02 [000..007) | |
Basic block list for '_1020.MethodAbove:get_Value():double:this' | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB02 [0001] 1 1 [000..007) (return) | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In impImport() for _1020.MethodAbove:get_Value():double:this | |
impImportBlockPending for BB02 | |
Importing BB02 (PC=000) of '_1020.MethodAbove:get_Value():double:this' | |
[ 0] 0 (0x000) ldarg.0 | |
[ 1] 1 (0x001) ldfld 04000002 | |
[ 1] 6 (0x006) ret | |
Inlinee Return expression (before normalization) => | |
[000025] ---XG------- * FIELD double _value | |
[000002] ------------ \--* LCL_VAR ref V00 this | |
Inlinee Return expression (after normalization) => | |
[000025] ---XG------- * FIELD double _value | |
[000002] ------------ \--* LCL_VAR ref V00 this | |
----------- Statements (and blocks) added due to the inlining of call [000003] ----------- | |
Arguments setup: | |
Inlinee method body:fgInlineAppendStatements: no gc ref inline locals. | |
Return expression for call at [000003] is | |
[000025] ---XG------- * FIELD double _value | |
[000002] ------------ \--* LCL_VAR ref V00 this | |
Successfully inlined _1020.MethodAbove:get_Value():double:this (7 IL bytes) (depth 1) [below ALWAYS_INLINE size] | |
-------------------------------------------------------------------------------------------- | |
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for '_1020.MethodAbove:RaiseValue(double):this' calling '_1020.MethodAbove:get_Value():double:this' | |
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' | |
Replacing the return expression placeholder [000005] with [000025] | |
[000005] --C--------- * RET_EXPR double(inl return from call [000025]) | |
Inserting the inline return expression | |
[000025] ---XG------- * FIELD double _value | |
[000002] ------------ \--* LCL_VAR ref V00 this | |
Expanding INLINE_CANDIDATE in statement [000008] in BB01: | |
[000008] ------------ * STMT void (IL ???... ???) | |
[000007] I-C-G------- \--* CALL double _1020.MethodAbove.get_Value (exactContextHnd=0x00007FFC5C556839) | |
[000006] ------------ this in rcx \--* LCL_VAR ref V00 this | |
thisArg: is a local var | |
[000006] ------------ * LCL_VAR ref V00 this | |
INLINER: inlineInfo.tokenLookupContextHandle for _1020.MethodAbove:get_Value():double:this set to 0x00007FFC5C556839: | |
Invoking compiler for the inlinee method _1020.MethodAbove:get_Value():double:this : | |
IL to import: | |
IL_0000 02 ldarg.0 | |
IL_0001 7b 02 00 00 04 ldfld 0x4000002 | |
IL_0006 2a ret | |
INLINER impTokenLookupContextHandle for _1020.MethodAbove:get_Value():double:this is 0x00007FFC5C556839. | |
*************** In fgFindBasicBlocks() for _1020.MethodAbove:get_Value():double:this | |
Jump targets: | |
none | |
New Basic Block BB03 [0002] created. | |
BB03 [000..007) | |
Basic block list for '_1020.MethodAbove:get_Value():double:this' | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB03 [0002] 1 1 [000..007) (return) | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In impImport() for _1020.MethodAbove:get_Value():double:this | |
impImportBlockPending for BB03 | |
Importing BB03 (PC=000) of '_1020.MethodAbove:get_Value():double:this' | |
[ 0] 0 (0x000) ldarg.0 | |
[ 1] 1 (0x001) ldfld 04000002 | |
[ 1] 6 (0x006) ret | |
Inlinee Return expression (before normalization) => | |
[000028] ---XG------- * FIELD double _value | |
[000006] ------------ \--* LCL_VAR ref V00 this | |
Inlinee Return expression (after normalization) => | |
[000028] ---XG------- * FIELD double _value | |
[000006] ------------ \--* LCL_VAR ref V00 this | |
----------- Statements (and blocks) added due to the inlining of call [000007] ----------- | |
Arguments setup: | |
Inlinee method body:fgInlineAppendStatements: no gc ref inline locals. | |
Return expression for call at [000007] is | |
[000028] ---XG------- * FIELD double _value | |
[000006] ------------ \--* LCL_VAR ref V00 this | |
Successfully inlined _1020.MethodAbove:get_Value():double:this (7 IL bytes) (depth 1) [below ALWAYS_INLINE size] | |
-------------------------------------------------------------------------------------------- | |
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for '_1020.MethodAbove:RaiseValue(double):this' calling '_1020.MethodAbove:get_Value():double:this' | |
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' | |
Expanding INLINE_CANDIDATE in statement [000021] in BB01: | |
[000021] ------------ * STMT void (IL ???... ???) | |
[000019] I-C-G------- \--* CALL void _1020.MethodAbove.set_Value (exactContextHnd=0x00007FFC5C556839) | |
[000001] ------------ this in rcx +--* LCL_VAR ref V00 this | |
[000015] ------------ | /--* CNS_DBL double 100.00000000000000 | |
[000016] ------------ | /--* DIV double | |
[000014] ------------ | | \--* LCL_VAR double V01 arg1 | |
[000017] --C--------- | /--* MUL double | |
[000013] --C--------- | | \--* RET_EXPR double(inl return from call [000028]) | |
[000018] --C--------- arg1 \--* ADD double | |
[000012] ------------ \--* LCL_VAR double V02 tmp0 | |
thisArg: is a local var | |
[000001] ------------ * LCL_VAR ref V00 this | |
Argument #1: has side effects | |
[000015] ------------ /--* CNS_DBL double 100.00000000000000 | |
[000016] ------------ /--* DIV double | |
[000014] ------------ | \--* LCL_VAR double V01 arg1 | |
[000017] --C--------- /--* MUL double | |
[000013] --C--------- | \--* RET_EXPR double(inl return from call [000028]) | |
[000018] --C--------- * ADD double | |
[000012] ------------ \--* LCL_VAR double V02 tmp0 | |
INLINER: inlineInfo.tokenLookupContextHandle for _1020.MethodAbove:set_Value(double):this set to 0x00007FFC5C556839: | |
Invoking compiler for the inlinee method _1020.MethodAbove:set_Value(double):this : | |
IL to import: | |
IL_0000 02 ldarg.0 | |
IL_0001 03 ldarg.1 | |
IL_0002 7d 02 00 00 04 stfld 0x4000002 | |
IL_0007 2a ret | |
INLINER impTokenLookupContextHandle for _1020.MethodAbove:set_Value(double):this is 0x00007FFC5C556839. | |
*************** In fgFindBasicBlocks() for _1020.MethodAbove:set_Value(double):this | |
Jump targets: | |
none | |
New Basic Block BB04 [0003] created. | |
BB04 [000..008) | |
Basic block list for '_1020.MethodAbove:set_Value(double):this' | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB04 [0003] 1 1 [000..008) (return) | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In impImport() for _1020.MethodAbove:set_Value(double):this | |
impImportBlockPending for BB04 | |
Importing BB04 (PC=000) of '_1020.MethodAbove:set_Value(double):this' | |
[ 0] 0 (0x000) ldarg.0 | |
[ 1] 1 (0x001) ldarg.1 | |
lvaGrabTemp returning 3 (V03 tmp1) called for Inlining Arg. | |
[ 2] 2 (0x002) stfld 04000002 | |
[000034] ------------ * STMT void | |
[000031] ------------ | /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG------- \--* ASG double | |
[000032] ---XG--N---- \--* FIELD double _value | |
[000001] ------------ \--* LCL_VAR ref V00 this | |
[ 0] 7 (0x007) ret | |
----------- Statements (and blocks) added due to the inlining of call [000019] ----------- | |
Arguments setup: | |
[000037] ------------ * STMT void (IL ???... ???) | |
[000015] ------------ | /--* CNS_DBL double 100.00000000000000 | |
[000016] ------------ | /--* DIV double | |
[000014] ------------ | | \--* LCL_VAR double V01 arg1 | |
[000017] --C--------- | /--* MUL double | |
[000013] --C--------- | | \--* RET_EXPR double(inl return from call [000028]) | |
[000018] --C--------- | /--* ADD double | |
[000012] ------------ | | \--* LCL_VAR double V02 tmp0 | |
[000036] -AC--------- \--* ASG double | |
[000035] D------N---- \--* LCL_VAR double V03 tmp1 | |
Inlinee method body: | |
[000034] ------------ * STMT void (IL ???... ???) | |
[000031] ------------ | /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG------- \--* ASG double | |
[000032] ---XG--N---- \--* FIELD double _value | |
[000001] ------------ \--* LCL_VAR ref V00 this | |
fgInlineAppendStatements: no gc ref inline locals. | |
Successfully inlined _1020.MethodAbove:set_Value(double):this (8 IL bytes) (depth 1) [below ALWAYS_INLINE size] | |
-------------------------------------------------------------------------------------------- | |
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for '_1020.MethodAbove:RaiseValue(double):this' calling '_1020.MethodAbove:set_Value(double):this' | |
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' | |
Replacing the return expression placeholder [000013] with [000028] | |
[000013] --C--------- * RET_EXPR double(inl return from call [000028]) | |
Inserting the inline return expression | |
[000028] ---XG------- * FIELD double _value | |
[000006] ------------ \--* LCL_VAR ref V00 this | |
*************** After fgInline() | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
[000011] ------------ * STMT void (IL ???... ???) | |
[000025] ---XG------- | /--* FIELD double _value | |
[000002] ------------ | | \--* LCL_VAR ref V00 this | |
[000010] -AC--------- \--* ASG double | |
[000009] D------N---- \--* LCL_VAR double V02 tmp0 | |
***** BB01, stmt 2 | |
[000037] ------------ * STMT void (IL ???... ???) | |
[000015] ------------ | /--* CNS_DBL double 100.00000000000000 | |
[000016] ------------ | /--* DIV double | |
[000014] ------------ | | \--* LCL_VAR double V01 arg1 | |
[000017] --C--------- | /--* MUL double | |
[000028] ---XG------- | | \--* FIELD double _value | |
[000006] ------------ | | \--* LCL_VAR ref V00 this | |
[000018] --C--------- | /--* ADD double | |
[000012] ------------ | | \--* LCL_VAR double V02 tmp0 | |
[000036] -AC--------- \--* ASG double | |
[000035] D------N---- \--* LCL_VAR double V03 tmp1 | |
***** BB01, stmt 3 | |
[000034] ------------ * STMT void (IL ???... ???) | |
[000031] ------------ | /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG------- \--* ASG double | |
[000032] ---XG--N---- \--* FIELD double _value | |
[000001] ------------ \--* LCL_VAR ref V00 this | |
***** BB01, stmt 4 | |
[000023] ------------ * STMT void (IL 0x01F... ???) | |
[000022] ------------ \--* RETURN void | |
------------------------------------------------------------------------------------------------------------------- | |
*************** Exception Handling table is empty | |
**************** Inline Tree | |
Inlines into 06000006 _1020.MethodAbove:RaiseValue(double):this | |
[1 IL=0002 TR=000003 06000007] [below ALWAYS_INLINE size] _1020.MethodAbove:get_Value():double:this | |
[2 IL=0008 TR=000007 06000007] [below ALWAYS_INLINE size] _1020.MethodAbove:get_Value():double:this | |
[3 IL=0026 TR=000019 06000008] [below ALWAYS_INLINE size] _1020.MethodAbove:set_Value(double):this | |
Budget: initialTime=156, finalTime=158, initialBudget=1560, currentBudget=1560 | |
Budget: initialSize=860, finalSize=860 | |
*************** After fgAddInternal() | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** Exception Handling table is empty | |
*************** In fgDebugCheckBBlist | |
*************** In fgRemoveEmptyTry() | |
No EH in this method, nothing to remove. | |
*************** In fgRemoveEmptyFinally() | |
No EH in this method, nothing to remove. | |
*************** In fgMergeFinallyChains() | |
No EH in this method, nothing to merge. | |
*************** In fgCloneFinally() | |
No EH in this method, no cloning. | |
*************** In fgMarkImplicitByRefs() | |
*************** In fgPromoteStructs() | |
lvaTable before fgPromoteStructs | |
; Initial local variable assignments | |
; | |
; V00 this ref this class-hnd | |
; V01 arg1 double | |
; V02 tmp0 double | |
; V03 tmp1 double | |
lvaTable after fgPromoteStructs | |
; Initial local variable assignments | |
; | |
; V00 this ref this class-hnd | |
; V01 arg1 double | |
; V02 tmp0 double | |
; V03 tmp1 double | |
*************** In fgMarkAddressExposedLocals() | |
*************** In fgRetypeImplicitByRefArgs() | |
*************** In fgMorphBlocks() | |
Morphing BB01 of '_1020.MethodAbove:RaiseValue(double):this' | |
fgMorphTree BB01, stmt 1 (before) | |
[000025] ---XG------- /--* FIELD double _value | |
[000002] ------------ | \--* LCL_VAR ref V00 this | |
[000010] -AC--------- * ASG double | |
[000009] D------N---- \--* LCL_VAR double V02 tmp0 | |
GenTreeNode creates assertion: | |
[000025] ---XG------- * IND double | |
In BB01 New Local Constant Assertion: V00 != null index=#01, mask=0000000000000001 | |
fgMorphTree BB01, stmt 1 (after) | |
[000025] ---XG+------ /--* IND double | |
[000039] -----+------ | | /--* CNS_INT long 8 field offset Fseq[_value] | |
[000040] -----+------ | \--* ADD byref | |
[000002] -----+------ | \--* LCL_VAR ref V00 this | |
[000010] -A-XG+------ * ASG double | |
[000009] D----+-N---- \--* LCL_VAR double V02 tmp0 | |
fgMorphTree BB01, stmt 2 (before) | |
[000015] ------------ /--* CNS_DBL double 100.00000000000000 | |
[000016] ------------ /--* DIV double | |
[000014] ------------ | \--* LCL_VAR double V01 arg1 | |
[000017] --C--------- /--* MUL double | |
[000028] ---XG------- | \--* FIELD double _value | |
[000006] ------------ | \--* LCL_VAR ref V00 this | |
[000018] --C--------- /--* ADD double | |
[000012] ------------ | \--* LCL_VAR double V02 tmp0 | |
[000036] -AC--------- * ASG double | |
[000035] D------N---- \--* LCL_VAR double V03 tmp1 | |
fgMorphTree BB01, stmt 2 (after) | |
[000015] -----+------ /--* CNS_DBL double 100.00000000000000 | |
[000016] -----+------ /--* DIV double | |
[000014] -----+------ | \--* LCL_VAR double V01 arg1 | |
[000017] ---XG+------ /--* MUL double | |
[000028] ---XG+------ | \--* IND double | |
[000041] -----+------ | | /--* CNS_INT long 8 field offset Fseq[_value] | |
[000042] -----+------ | \--* ADD byref | |
[000006] -----+------ | \--* LCL_VAR ref V00 this | |
[000018] ---XG+------ /--* ADD double | |
[000012] -----+------ | \--* LCL_VAR double V02 tmp0 | |
[000036] -A-XG+------ * ASG double | |
[000035] D----+-N---- \--* LCL_VAR double V03 tmp1 | |
fgMorphTree BB01, stmt 3 (before) | |
[000031] ------------ /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG------- * ASG double | |
[000032] ---XG--N---- \--* FIELD double _value | |
[000001] ------------ \--* LCL_VAR ref V00 this | |
fgMorphTree BB01, stmt 3 (after) | |
[000031] -----+------ /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG+------ * ASG double | |
[000032] ---XG+-N---- \--* IND double | |
[000043] -----+------ | /--* CNS_INT long 8 field offset Fseq[_value] | |
[000044] -----+------ \--* ADD byref | |
[000001] -----+------ \--* LCL_VAR ref V00 this | |
fgMorphTree BB01, stmt 4 (before) | |
[000022] ------------ * RETURN void | |
Renumbering the basic blocks for fgComputePred | |
*************** Before renumbering the basic blocks | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** Exception Handling table is empty | |
*************** After renumbering the basic blocks | |
=============== No blocks renumbered! | |
New BlockSet epoch 2, # of blocks (including unused BB00): 2, bitset array size: 1 (short) | |
*************** In fgComputePreds() | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** After fgComputePreds() | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In fgComputeEdgeWeights() | |
fgComputeEdgeWeights() we do not have any profile data so we are not using the edge weights | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
fgComputeEdgeWeights() was able to compute exact edge weights for all of the 0 edges, using 1 passes. | |
*************** In fgCreateFunclets() | |
After fgCreateFunclets() | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** Exception Handling table is empty | |
*************** In fgDebugCheckBBlist | |
*************** In optOptimizeLayout() | |
*************** Exception Handling table is empty | |
*************** In fgDebugCheckBBlist | |
*************** In fgUpdateFlowGraph() | |
Before updating the flow graph: | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
*************** In fgUpdateFlowGraph() | |
Before updating the flow graph: | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
*************** In fgComputeReachability | |
*************** In fgDebugCheckBBlist | |
Renumbering the basic blocks for fgComputeReachability pass #1 | |
*************** Before renumbering the basic blocks | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** Exception Handling table is empty | |
*************** After renumbering the basic blocks | |
=============== No blocks renumbered! | |
Enter blocks: BB01 | |
After computing reachability sets: | |
------------------------------------------------ | |
BBnum Reachable by | |
------------------------------------------------ | |
BB01 : BB01 | |
After computing reachability: | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
*************** In fgComputeDoms | |
*************** In fgDebugCheckBBlist | |
Dominator computation start blocks (those blocks with no incoming edges): | |
BB01 | |
------------------------------------------------ | |
BBnum Dominated by | |
------------------------------------------------ | |
BB01: BB01 | |
Inside fgBuildDomTree | |
After computing the Dominance Tree: | |
*************** In Allocate Objects | |
Trees before Allocate Objects | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
[000011] ------------ * STMT void (IL ???... ???) | |
[000025] ---XG+------ | /--* IND double | |
[000039] -----+------ | | | /--* CNS_INT long 8 field offset Fseq[_value] | |
[000040] -----+------ | | \--* ADD byref | |
[000002] -----+------ | | \--* LCL_VAR ref V00 this | |
[000010] -A-XG+------ \--* ASG double | |
[000009] D----+-N---- \--* LCL_VAR double V02 tmp0 | |
***** BB01, stmt 2 | |
[000037] ------------ * STMT void (IL ???... ???) | |
[000015] -----+------ | /--* CNS_DBL double 100.00000000000000 | |
[000016] -----+------ | /--* DIV double | |
[000014] -----+------ | | \--* LCL_VAR double V01 arg1 | |
[000017] ---XG+------ | /--* MUL double | |
[000028] ---XG+------ | | \--* IND double | |
[000041] -----+------ | | | /--* CNS_INT long 8 field offset Fseq[_value] | |
[000042] -----+------ | | \--* ADD byref | |
[000006] -----+------ | | \--* LCL_VAR ref V00 this | |
[000018] ---XG+------ | /--* ADD double | |
[000012] -----+------ | | \--* LCL_VAR double V02 tmp0 | |
[000036] -A-XG+------ \--* ASG double | |
[000035] D----+-N---- \--* LCL_VAR double V03 tmp1 | |
***** BB01, stmt 3 | |
[000034] ------------ * STMT void (IL ???... ???) | |
[000031] -----+------ | /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG+------ \--* ASG double | |
[000032] ---XG+-N---- \--* IND double | |
[000043] -----+------ | /--* CNS_INT long 8 field offset Fseq[_value] | |
[000044] -----+------ \--* ADD byref | |
[000001] -----+------ \--* LCL_VAR ref V00 this | |
***** BB01, stmt 4 | |
[000023] ------------ * STMT void (IL 0x01F... ???) | |
[000022] -----+------ \--* RETURN void | |
------------------------------------------------------------------------------------------------------------------- | |
*************** Exiting Allocate Objects | |
Trees after Allocate Objects | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
[000011] ------------ * STMT void (IL ???... ???) | |
[000025] ---XG+------ | /--* IND double | |
[000039] -----+------ | | | /--* CNS_INT long 8 field offset Fseq[_value] | |
[000040] -----+------ | | \--* ADD byref | |
[000002] -----+------ | | \--* LCL_VAR ref V00 this | |
[000010] -A-XG+------ \--* ASG double | |
[000009] D----+-N---- \--* LCL_VAR double V02 tmp0 | |
***** BB01, stmt 2 | |
[000037] ------------ * STMT void (IL ???... ???) | |
[000015] -----+------ | /--* CNS_DBL double 100.00000000000000 | |
[000016] -----+------ | /--* DIV double | |
[000014] -----+------ | | \--* LCL_VAR double V01 arg1 | |
[000017] ---XG+------ | /--* MUL double | |
[000028] ---XG+------ | | \--* IND double | |
[000041] -----+------ | | | /--* CNS_INT long 8 field offset Fseq[_value] | |
[000042] -----+------ | | \--* ADD byref | |
[000006] -----+------ | | \--* LCL_VAR ref V00 this | |
[000018] ---XG+------ | /--* ADD double | |
[000012] -----+------ | | \--* LCL_VAR double V02 tmp0 | |
[000036] -A-XG+------ \--* ASG double | |
[000035] D----+-N---- \--* LCL_VAR double V03 tmp1 | |
***** BB01, stmt 3 | |
[000034] ------------ * STMT void (IL ???... ???) | |
[000031] -----+------ | /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG+------ \--* ASG double | |
[000032] ---XG+-N---- \--* IND double | |
[000043] -----+------ | /--* CNS_INT long 8 field offset Fseq[_value] | |
[000044] -----+------ \--* ADD byref | |
[000001] -----+------ \--* LCL_VAR ref V00 this | |
***** BB01, stmt 4 | |
[000023] ------------ * STMT void (IL 0x01F... ???) | |
[000022] -----+------ \--* RETURN void | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
*************** In optOptimizeLoops() | |
*************** In fgDebugCheckBBlist | |
*************** In optCloneLoops() | |
*************** In lvaMarkLocalVars() | |
lvaGrabTemp returning 4 (V04 tmp2) (a long lifetime temp) called for OutgoingArgSpace. | |
*** marking local variables in block BB01 (weight=1 ) | |
[000011] ------------ * STMT void (IL ???... ???) | |
[000025] ---XG+------ | /--* IND double | |
[000039] -----+------ | | | /--* CNS_INT long 8 field offset Fseq[_value] | |
[000040] -----+------ | | \--* ADD byref | |
[000002] -----+------ | | \--* LCL_VAR ref V00 this | |
[000010] -A-XG+------ \--* ASG double | |
[000009] D----+-N---- \--* LCL_VAR double V02 tmp0 | |
New refCnts for V02: refCnt = 1, refCntWtd = 2 | |
New refCnts for V00: refCnt = 1, refCntWtd = 1 | |
[000037] ------------ * STMT void (IL ???... ???) | |
[000015] -----+------ | /--* CNS_DBL double 100.00000000000000 | |
[000016] -----+------ | /--* DIV double | |
[000014] -----+------ | | \--* LCL_VAR double V01 arg1 | |
[000017] ---XG+------ | /--* MUL double | |
[000028] ---XG+------ | | \--* IND double | |
[000041] -----+------ | | | /--* CNS_INT long 8 field offset Fseq[_value] | |
[000042] -----+------ | | \--* ADD byref | |
[000006] -----+------ | | \--* LCL_VAR ref V00 this | |
[000018] ---XG+------ | /--* ADD double | |
[000012] -----+------ | | \--* LCL_VAR double V02 tmp0 | |
[000036] -A-XG+------ \--* ASG double | |
[000035] D----+-N---- \--* LCL_VAR double V03 tmp1 | |
New refCnts for V03: refCnt = 1, refCntWtd = 2 | |
New refCnts for V02: refCnt = 2, refCntWtd = 4 | |
New refCnts for V00: refCnt = 2, refCntWtd = 2 | |
New refCnts for V01: refCnt = 1, refCntWtd = 1 | |
[000034] ------------ * STMT void (IL ???... ???) | |
[000031] -----+------ | /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG+------ \--* ASG double | |
[000032] ---XG+-N---- \--* IND double | |
[000043] -----+------ | /--* CNS_INT long 8 field offset Fseq[_value] | |
[000044] -----+------ \--* ADD byref | |
[000001] -----+------ \--* LCL_VAR ref V00 this | |
New refCnts for V00: refCnt = 3, refCntWtd = 3 | |
New refCnts for V03: refCnt = 2, refCntWtd = 4 | |
[000023] ------------ * STMT void (IL 0x01F... ???) | |
[000022] -----+------ \--* RETURN void | |
New refCnts for V00: refCnt = 4, refCntWtd = 4 | |
New refCnts for V00: refCnt = 5, refCntWtd = 5 | |
New refCnts for V01: refCnt = 2, refCntWtd = 2 | |
New refCnts for V01: refCnt = 3, refCntWtd = 3 | |
*************** In optAddCopies() | |
refCnt table for 'RaiseValue': | |
V00 this [ ref]: refCnt = 5, refCntWtd = 5 pref [rcx] | |
V01 arg1 [double]: refCnt = 3, refCntWtd = 3 pref [mm1] | |
V02 tmp0 [double]: refCnt = 2, refCntWtd = 4 | |
V03 tmp1 [double]: refCnt = 2, refCntWtd = 4 | |
V04 OutArgs [lclBlk]: refCnt = 1, refCntWtd = 1 | |
*************** In optOptimizeBools() | |
*************** In fgDebugCheckBBlist | |
*************** In fgFindOperOrder() | |
*************** In fgSetBlockOrder() | |
The biggest BB has 12 tree nodes | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
( 5, 4) [000011] ------------ * STMT void (IL ???... ???) | |
N004 ( 5, 4) [000025] ---XG------- | /--* IND double | |
N002 ( 1, 1) [000039] ------------ | | | /--* CNS_INT long 8 field offset Fseq[_value] | |
N003 ( 2, 2) [000040] -------N---- | | \--* ADD byref | |
N001 ( 1, 1) [000002] ------------ | | \--* LCL_VAR ref V00 this | |
N006 ( 5, 4) [000010] -A-XG---R--- \--* ASG double | |
N005 ( 1, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 | |
***** BB01, stmt 2 | |
( 56, 24) [000037] ------------ * STMT void (IL ???... ???) | |
N009 ( 1, 2) [000012] ------------ | /--* LCL_VAR double V02 tmp0 | |
N010 ( 56, 24) [000018] ---XG------- | /--* ADD double | |
N006 ( 3, 4) [000015] ------------ | | | /--* CNS_DBL double 100.00000000000000 | |
N007 ( 40, 10) [000016] ------------ | | | /--* DIV double | |
N005 ( 1, 2) [000014] ------------ | | | | \--* LCL_VAR double V01 arg1 | |
N008 ( 50, 18) [000017] ---XG------- | | \--* MUL double | |
N004 ( 5, 4) [000028] ---XG------- | | \--* IND double | |
N002 ( 1, 1) [000041] ------------ | | | /--* CNS_INT long 8 field offset Fseq[_value] | |
N003 ( 2, 2) [000042] -------N---- | | \--* ADD byref | |
N001 ( 1, 1) [000006] ------------ | | \--* LCL_VAR ref V00 this | |
N012 ( 56, 24) [000036] -A-XG---R--- \--* ASG double | |
N011 ( 1, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 | |
***** BB01, stmt 3 | |
( 7, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 1, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 | |
N006 ( 7, 7) [000033] -A-XG------- \--* ASG double | |
N004 ( 5, 4) [000032] ---XG--N---- \--* IND double | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT long 8 field offset Fseq[_value] | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this | |
***** BB01, stmt 4 | |
( 0, 0) [000023] ------------ * STMT void (IL 0x01F... ???) | |
N001 ( 0, 0) [000022] ------------ \--* RETURN void | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In SsaBuilder::Build() | |
[SsaBuilder] Max block count is 2. | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** Exception Handling table is empty | |
[SsaBuilder] Topologically sorted the graph. | |
[SsaBuilder::ComputeImmediateDom] | |
*************** In SsaBuilder::ComputeDominators(BasicBlock** postOrder, int count, ...) | |
*************** In SsaBuilder::InsertPhiFunctions() | |
*************** In fgLocalVarLiveness() | |
*************** In fgPerBlockLocalVarLiveness() | |
BB01 USE(2)={V00 V01 } + ByrefExposed + GcHeap | |
DEF(2)={ V02 V03} + ByrefExposed + GcHeap | |
** Memory liveness computed, GcHeap states and ByrefExposed states match | |
*************** In fgInterBlockLocalVarLiveness() | |
BB liveness after fgLiveVarAnalysis(): | |
BB01 IN (2)={V00 V01} + ByrefExposed + GcHeap | |
OUT(0)={ } | |
Inserting phi functions: | |
*************** In SsaBuilder::RenameVariables() | |
After fgSsaBuild: | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
( 5, 4) [000011] ------------ * STMT void (IL ???... ???) | |
N004 ( 5, 4) [000025] ---XG------- | /--* IND double | |
N002 ( 1, 1) [000039] ------------ | | | /--* CNS_INT long 8 field offset Fseq[_value] | |
N003 ( 2, 2) [000040] -------N---- | | \--* ADD byref | |
N001 ( 1, 1) [000002] ------------ | | \--* LCL_VAR ref V00 this u:2 | |
N006 ( 5, 4) [000010] -A-XG---R--- \--* ASG double | |
N005 ( 1, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 | |
***** BB01, stmt 2 | |
( 56, 24) [000037] ------------ * STMT void (IL ???... ???) | |
N009 ( 1, 2) [000012] ------------ | /--* LCL_VAR double V02 tmp0 u:2 (last use) | |
N010 ( 56, 24) [000018] ---XG------- | /--* ADD double | |
N006 ( 3, 4) [000015] ------------ | | | /--* CNS_DBL double 100.00000000000000 | |
N007 ( 40, 10) [000016] ------------ | | | /--* DIV double | |
N005 ( 1, 2) [000014] ------------ | | | | \--* LCL_VAR double V01 arg1 u:2 (last use) | |
N008 ( 50, 18) [000017] ---XG------- | | \--* MUL double | |
N004 ( 5, 4) [000028] ---XG------- | | \--* IND double | |
N002 ( 1, 1) [000041] ------------ | | | /--* CNS_INT long 8 field offset Fseq[_value] | |
N003 ( 2, 2) [000042] -------N---- | | \--* ADD byref | |
N001 ( 1, 1) [000006] ------------ | | \--* LCL_VAR ref V00 this u:2 | |
N012 ( 56, 24) [000036] -A-XG---R--- \--* ASG double | |
N011 ( 1, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 | |
***** BB01, stmt 3 | |
( 7, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 1, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 u:2 (last use) | |
N006 ( 7, 7) [000033] -A-XG------- \--* ASG double | |
N004 ( 5, 4) [000032] ---XG--N---- \--* IND double | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT long 8 field offset Fseq[_value] | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) | |
***** BB01, stmt 4 | |
( 0, 0) [000023] ------------ * STMT void (IL 0x01F... ???) | |
N001 ( 0, 0) [000022] ------------ \--* RETURN void | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In optEarlyProp() | |
*************** In fgValueNumber() | |
Memory Initial Value in BB01 is: $81 | |
The SSA definition for ByrefExposed (#2) at start of BB01 is $81 {InitVal($42)} | |
The SSA definition for GcHeap (#2) at start of BB01 is $81 {InitVal($42)} | |
***** BB01, stmt 1 (before) | |
N004 ( 5, 4) [000025] ---XG------- /--* IND double | |
N002 ( 1, 1) [000039] ------------ | | /--* CNS_INT long 8 field offset Fseq[_value] | |
N003 ( 2, 2) [000040] -------N---- | \--* ADD byref | |
N001 ( 1, 1) [000002] ------------ | \--* LCL_VAR ref V00 this u:2 | |
N006 ( 5, 4) [000010] -A-XG---R--- * ASG double | |
N005 ( 1, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 | |
N001 [000002] LCL_VAR V00 this u:2 => $80 {InitVal($40)} | |
N002 [000039] CNS_INT 8 field offset Fseq[_value] => $100 {LngCns: 8} | |
N003 [000040] ADD => $140 {ADD($80, $100)} | |
VNApplySelectors: | |
VNForHandle(Fseq[_value]) is $180, fieldType is double | |
VNForMapSelect($81, $180):double returns $1c0 {$81[$180]} | |
VNForMapSelect($1c0, $80):double returns $1c1 {$1c0[$80]} | |
N004 [000025] IND => <l:$1c1 {$1c0[$80]}, c:$200 {200}> | |
N005 [000009] LCL_VAR V02 tmp0 d:2 => <l:$1c1 {$1c0[$80]}, c:$200 {200}> | |
N006 [000010] ASG => <l:$1c1 {$1c0[$80]}, c:$200 {200}> | |
***** BB01, stmt 1 (after) | |
N004 ( 5, 4) [000025] ---XG------- /--* IND double <l:$1c1, c:$200> | |
N002 ( 1, 1) [000039] ------------ | | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000040] -------N---- | \--* ADD byref $140 | |
N001 ( 1, 1) [000002] ------------ | \--* LCL_VAR ref V00 this u:2 $80 | |
N006 ( 5, 4) [000010] -A-XG---R--- * ASG double <l:$1c1, c:$200> | |
N005 ( 1, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 <l:$1c1, c:$200> | |
--------- | |
***** BB01, stmt 2 (before) | |
N009 ( 1, 2) [000012] ------------ /--* LCL_VAR double V02 tmp0 u:2 (last use) | |
N010 ( 56, 24) [000018] ---XG------- /--* ADD double | |
N006 ( 3, 4) [000015] ------------ | | /--* CNS_DBL double 100.00000000000000 | |
N007 ( 40, 10) [000016] ------------ | | /--* DIV double | |
N005 ( 1, 2) [000014] ------------ | | | \--* LCL_VAR double V01 arg1 u:2 (last use) | |
N008 ( 50, 18) [000017] ---XG------- | \--* MUL double | |
N004 ( 5, 4) [000028] ---XG------- | \--* IND double | |
N002 ( 1, 1) [000041] ------------ | | /--* CNS_INT long 8 field offset Fseq[_value] | |
N003 ( 2, 2) [000042] -------N---- | \--* ADD byref | |
N001 ( 1, 1) [000006] ------------ | \--* LCL_VAR ref V00 this u:2 | |
N012 ( 56, 24) [000036] -A-XG---R--- * ASG double | |
N011 ( 1, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 | |
N001 [000006] LCL_VAR V00 this u:2 => $80 {InitVal($40)} | |
N002 [000041] CNS_INT 8 field offset Fseq[_value] => $100 {LngCns: 8} | |
N003 [000042] ADD => $140 {ADD($80, $100)} | |
VNApplySelectors: | |
VNForHandle(Fseq[_value]) is $180, fieldType is double | |
VNForMapSelect($81, $180):double returns $1c0 {$81[$180]} | |
VNForMapSelect($1c0, $80):double returns $1c1 {$1c0[$80]} | |
N004 [000028] IND => <l:$1c1 {$1c0[$80]}, c:$202 {202}> | |
N005 [000014] LCL_VAR V01 arg1 u:2 (last use) => $c0 {InitVal($41)} | |
N006 [000015] CNS_DBL 100.00000000000000 => $240 {DblCns[100.000000]} | |
N007 [000016] DIV => $1c2 {DIV($c0, $240)} | |
N008 [000017] MUL => <l:$1c4 {MUL($1c1, $1c2)}, c:$1c3 {MUL($1c2, $202)}> | |
N009 [000012] LCL_VAR V02 tmp0 u:2 (last use) => <l:$1c1 {$1c0[$80]}, c:$200 {200}> | |
N010 [000018] ADD => <l:$1c6 {ADD($1c1, $1c4)}, c:$1c5 {ADD($1c3, $200)}> | |
N011 [000035] LCL_VAR V03 tmp1 d:2 => <l:$1c6 {ADD($1c1, $1c4)}, c:$1c5 {ADD($1c3, $200)}> | |
N012 [000036] ASG => <l:$1c6 {ADD($1c1, $1c4)}, c:$1c5 {ADD($1c3, $200)}> | |
***** BB01, stmt 2 (after) | |
N009 ( 1, 2) [000012] ------------ /--* LCL_VAR double V02 tmp0 u:2 (last use) <l:$1c1, c:$200> | |
N010 ( 56, 24) [000018] ---XG------- /--* ADD double <l:$1c6, c:$1c5> | |
N006 ( 3, 4) [000015] ------------ | | /--* CNS_DBL double 100.00000000000000 $240 | |
N007 ( 40, 10) [000016] ------------ | | /--* DIV double $1c2 | |
N005 ( 1, 2) [000014] ------------ | | | \--* LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N008 ( 50, 18) [000017] ---XG------- | \--* MUL double <l:$1c4, c:$1c3> | |
N004 ( 5, 4) [000028] ---XG------- | \--* IND double <l:$1c1, c:$202> | |
N002 ( 1, 1) [000041] ------------ | | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000042] -------N---- | \--* ADD byref $140 | |
N001 ( 1, 1) [000006] ------------ | \--* LCL_VAR ref V00 this u:2 $80 | |
N012 ( 56, 24) [000036] -A-XG---R--- * ASG double <l:$1c6, c:$1c5> | |
N011 ( 1, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 <l:$1c6, c:$1c5> | |
--------- | |
***** BB01, stmt 3 (before) | |
N005 ( 1, 2) [000031] ------------ /--* LCL_VAR double V03 tmp1 u:2 (last use) | |
N006 ( 7, 7) [000033] -A-XG------- * ASG double | |
N004 ( 5, 4) [000032] ---XG--N---- \--* IND double | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT long 8 field offset Fseq[_value] | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) | |
N001 [000001] LCL_VAR V00 this u:2 (last use) => $80 {InitVal($40)} | |
N002 [000043] CNS_INT 8 field offset Fseq[_value] => $100 {LngCns: 8} | |
N003 [000044] ADD => $140 {ADD($80, $100)} | |
N005 [000031] LCL_VAR V03 tmp1 u:2 (last use) => <l:$1c6 {ADD($1c1, $1c4)}, c:$1c5 {ADD($1c3, $200)}> | |
VNApplySelectors: | |
VNForHandle(Fseq[_value]) is $180, fieldType is double | |
VNForMapSelect($81, $180):double returns $1c0 {$81[$180]} | |
VNForMapSelect($1c0, $80):double returns $1c1 {$1c0[$80]} | |
VNForMapStore($1c0, $80, $1c6):double returns $280 {$1c0[$80 := $1c6]} | |
fgCurMemoryVN assigned: | |
fieldHnd $180 is {Hnd const: 0x00007FFC5C5566D8} | |
fieldSeq $2c0 is {_value} | |
VNForMapStore($81, $180, $280):double returns $281 {$81[$180 := $280]} | |
fgCurMemoryVN[GcHeap] assigned by StoreField at [000033] to VN: $281. | |
N006 [000033] ASG => $VN.Void | |
***** BB01, stmt 3 (after) | |
N005 ( 1, 2) [000031] ------------ /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$1c6, c:$1c5> | |
N006 ( 7, 7) [000033] -A-XG------- * ASG double $VN.Void | |
N004 ( 5, 4) [000032] ---XG--N---- \--* IND double $1c6 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $140 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
--------- | |
***** BB01, stmt 4 (before) | |
N001 ( 0, 0) [000022] ------------ * RETURN void | |
N001 [000022] RETURN => $300 {300} | |
***** BB01, stmt 4 (after) | |
N001 ( 0, 0) [000022] ------------ * RETURN void $300 | |
finish(BB01). | |
*************** In optVnCopyProp() | |
*************** In SsaBuilder::ComputeDominators(Compiler*, ...) | |
Copy Assertion for BB01 | |
Live vars: {V00 V01} => {V00 V01 V02} | |
Live vars: {V00 V01 V02} => {V00 V02} | |
Live vars: {V00 V02} => {V00} | |
Live vars: {V00} => {V00 V03} | |
Live vars: {V00 V03} => {V03} | |
Live vars: {V03} => {} | |
*************** In optOptimizeCSEs() | |
Blocks/Trees at start of optOptimizeCSE phase | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
( 5, 4) [000011] ------------ * STMT void (IL ???... ???) | |
N004 ( 5, 4) [000025] ---XG------- | /--* IND double <l:$1c1, c:$200> | |
N002 ( 1, 1) [000039] ------------ | | | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000040] -------N---- | | \--* ADD byref $140 | |
N001 ( 1, 1) [000002] ------------ | | \--* LCL_VAR ref V00 this u:2 $80 | |
N006 ( 5, 4) [000010] -A-XG---R--- \--* ASG double <l:$1c1, c:$200> | |
N005 ( 1, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 <l:$1c1, c:$200> | |
***** BB01, stmt 2 | |
( 56, 24) [000037] ------------ * STMT void (IL ???... ???) | |
N009 ( 1, 2) [000012] ------------ | /--* LCL_VAR double V02 tmp0 u:2 (last use) <l:$1c1, c:$200> | |
N010 ( 56, 24) [000018] ---XG------- | /--* ADD double <l:$1c6, c:$1c5> | |
N006 ( 3, 4) [000015] ------------ | | | /--* CNS_DBL double 100.00000000000000 $240 | |
N007 ( 40, 10) [000016] ------------ | | | /--* DIV double $1c2 | |
N005 ( 1, 2) [000014] ------------ | | | | \--* LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N008 ( 50, 18) [000017] ---XG------- | | \--* MUL double <l:$1c4, c:$1c3> | |
N004 ( 5, 4) [000028] ---XG------- | | \--* IND double <l:$1c1, c:$202> | |
N002 ( 1, 1) [000041] ------------ | | | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000042] -------N---- | | \--* ADD byref $140 | |
N001 ( 1, 1) [000006] ------------ | | \--* LCL_VAR ref V00 this u:2 $80 | |
N012 ( 56, 24) [000036] -A-XG---R--- \--* ASG double <l:$1c6, c:$1c5> | |
N011 ( 1, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 <l:$1c6, c:$1c5> | |
***** BB01, stmt 3 | |
( 7, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 1, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$1c6, c:$1c5> | |
N006 ( 7, 7) [000033] -A-XG------- \--* ASG double $VN.Void | |
N004 ( 5, 4) [000032] ---XG--N---- \--* IND double $1c6 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $140 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
***** BB01, stmt 4 | |
( 0, 0) [000023] ------------ * STMT void (IL 0x01F... ???) | |
N001 ( 0, 0) [000022] ------------ \--* RETURN void $300 | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In optOptimizeValnumCSEs() | |
CSE candidate #01, vn=$1c1 cseMask=0000000000000001 in BB01, [cost= 5, size= 4]: | |
N004 ( 5, 4) CSE #01 (use)[000028] ---XG------- * IND double <l:$1c1, c:$202> | |
N002 ( 1, 1) [000041] ------------ | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000042] -------N---- \--* ADD byref $140 | |
N001 ( 1, 1) [000006] ------------ \--* LCL_VAR ref V00 this u:2 $80 | |
Blocks that generate CSE def/uses | |
BB01 cseGen = 0000000000000001 | |
After performing DataFlow for ValnumCSE's | |
BB01 cseIn = 0000000000000000 cseOut = 0000000000000001 | |
Labeling the CSEs with Use/Def information | |
BB01 [000025] Def of CSE #01 [weight=1 ] | |
BB01 [000028] Use of CSE #01 [weight=1 ] | |
************ Trees at start of optValnumCSE_Heuristic() | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
( 5, 4) [000011] ------------ * STMT void (IL ???... ???) | |
N004 ( 5, 4) CSE #01 (def)[000025] ---XG------- | /--* IND double <l:$1c1, c:$200> | |
N002 ( 1, 1) [000039] ------------ | | | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000040] -------N---- | | \--* ADD byref $140 | |
N001 ( 1, 1) [000002] ------------ | | \--* LCL_VAR ref V00 this u:2 $80 | |
N006 ( 5, 4) [000010] -A-XG---R--- \--* ASG double <l:$1c1, c:$200> | |
N005 ( 1, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 <l:$1c1, c:$200> | |
***** BB01, stmt 2 | |
( 56, 24) [000037] ------------ * STMT void (IL ???... ???) | |
N009 ( 1, 2) [000012] ------------ | /--* LCL_VAR double V02 tmp0 u:2 (last use) <l:$1c1, c:$200> | |
N010 ( 56, 24) [000018] ---XG------- | /--* ADD double <l:$1c6, c:$1c5> | |
N006 ( 3, 4) [000015] ------------ | | | /--* CNS_DBL double 100.00000000000000 $240 | |
N007 ( 40, 10) [000016] ------------ | | | /--* DIV double $1c2 | |
N005 ( 1, 2) [000014] ------------ | | | | \--* LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N008 ( 50, 18) [000017] ---XG------- | | \--* MUL double <l:$1c4, c:$1c3> | |
N004 ( 5, 4) CSE #01 (use)[000028] ---XG------- | | \--* IND double <l:$1c1, c:$202> | |
N002 ( 1, 1) [000041] ------------ | | | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000042] -------N---- | | \--* ADD byref $140 | |
N001 ( 1, 1) [000006] ------------ | | \--* LCL_VAR ref V00 this u:2 $80 | |
N012 ( 56, 24) [000036] -A-XG---R--- \--* ASG double <l:$1c6, c:$1c5> | |
N011 ( 1, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 <l:$1c6, c:$1c5> | |
***** BB01, stmt 3 | |
( 7, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 1, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$1c6, c:$1c5> | |
N006 ( 7, 7) [000033] -A-XG------- \--* ASG double $VN.Void | |
N004 ( 5, 4) [000032] ---XG--N---- \--* IND double $1c6 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $140 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
***** BB01, stmt 4 | |
( 0, 0) [000023] ------------ * STMT void (IL 0x01F... ???) | |
N001 ( 0, 0) [000022] ------------ \--* RETURN void $300 | |
------------------------------------------------------------------------------------------------------------------- | |
Aggressive CSE Promotion cutoff is 100 | |
Moderate CSE Promotion cutoff is 50 | |
Framesize estimate is 0x0000 | |
We have a small frame | |
Sorted CSE candidates: | |
CSE #01,cseMask=0000000000000001,useCnt=1: [def=100, use=100] :: N004 ( 5, 4) CSE #01 (def)[000025] ---XG------- * IND double <l:$1c1, c:$200> | |
Considering CSE #01 [def=100, use=100, cost= 5] CSE Expression: | |
N004 ( 5, 4) CSE #01 (def)[000025] ---XG------- * IND double <l:$1c1, c:$200> | |
N002 ( 1, 1) [000039] ------------ | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000040] -------N---- \--* ADD byref $140 | |
N001 ( 1, 1) [000002] ------------ \--* LCL_VAR ref V00 this u:2 $80 | |
Aggressive CSE Promotion (300 >= 100) | |
cseRefCnt=300, aggressiveRefCnt=100, moderateRefCnt=50 | |
defCnt=100, useCnt=100, cost=5, size=4 | |
def_cost=1, use_cost=1, extra_no_cost=6, extra_yes_cost=0 | |
CSE cost savings check (506 >= 200) passes | |
Promoting CSE: | |
lvaGrabTemp returning 5 (V05 rat0) (a long lifetime temp) called for ValNumCSE. | |
CSE #01 def at [000025] replaced in BB01 with def of V05 | |
New refCnts for V05: refCnt = 1, refCntWtd = 1 | |
New refCnts for V05: refCnt = 2, refCntWtd = 2 | |
New refCnts for V02: refCnt = 3, refCntWtd = 6 | |
New refCnts for V05: refCnt = 3, refCntWtd = 3 | |
New refCnts for V00: refCnt = 6, refCntWtd = 6 | |
New refCnts for V05: refCnt = 4, refCntWtd = 4 | |
optValnumCSE morphed tree: | |
N007 ( 1, 2) [000047] ------------ /--* LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N008 ( 6, 6) [000048] -A-XG------- /--* COMMA double <l:$1c1, c:$200> | |
N004 ( 5, 4) [000025] ---XG------- | | /--* IND double <l:$1c1, c:$200> | |
N002 ( 1, 1) [000039] ------------ | | | | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000040] -------N---- | | | \--* ADD byref $140 | |
N001 ( 1, 1) [000002] ------------ | | | \--* LCL_VAR ref V00 this u:2 $80 | |
N006 ( 5, 4) [000046] -A-XG---R--- | \--* ASG double $VN.Void | |
N005 ( 1, 2) [000045] D------N---- | \--* LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N010 ( 6, 6) [000010] -A-XG---R--- * ASG double <l:$1c1, c:$200> | |
N009 ( 1, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 <l:$1c1, c:$200> | |
CSE #01 use at [000028] replaced in BB01 with temp use. | |
New refCnts for V00: refCnt = 5, refCntWtd = 5 | |
New refCnts for V05: refCnt = 5, refCntWtd = 5 | |
New refCnts for V03: refCnt = 3, refCntWtd = 6 | |
New refCnts for V05: refCnt = 6, refCntWtd = 6 | |
New refCnts for V01: refCnt = 4, refCntWtd = 4 | |
New refCnts for V02: refCnt = 4, refCntWtd = 8 | |
optValnumCSE morphed tree: | |
N006 ( 1, 2) [000012] ------------ /--* LCL_VAR double V02 tmp0 u:2 (last use) <l:$1c1, c:$200> | |
N007 ( 52, 22) [000018] ----G------- /--* ADD double <l:$1c6, c:$1c5> | |
N003 ( 3, 4) [000015] ------------ | | /--* CNS_DBL double 100.00000000000000 $240 | |
N004 ( 40, 10) [000016] ------------ | | /--* DIV double $1c2 | |
N002 ( 1, 2) [000014] ------------ | | | \--* LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N005 ( 46, 16) [000017] ----G------- | \--* MUL double <l:$1c4, c:$1c3> | |
N001 ( 1, 2) [000049] ------------ | \--* LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N009 ( 52, 22) [000036] -A--G---R--- * ASG double <l:$1c6, c:$1c5> | |
N008 ( 1, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 <l:$1c6, c:$1c5> | |
*************** In optAssertionPropMain() | |
Blocks/Trees at start of phase | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
( 6, 6) [000011] ------------ * STMT void (IL ???... ???) | |
N007 ( 1, 2) [000047] ------------ | /--* LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N008 ( 6, 6) [000048] -A-XG------- | /--* COMMA double <l:$1c1, c:$200> | |
N004 ( 5, 4) [000025] ---XG------- | | | /--* IND double <l:$1c1, c:$200> | |
N002 ( 1, 1) [000039] ------------ | | | | | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000040] -------N---- | | | | \--* ADD byref $140 | |
N001 ( 1, 1) [000002] ------------ | | | | \--* LCL_VAR ref V00 this u:2 $80 | |
N006 ( 5, 4) [000046] -A-XG---R--- | | \--* ASG double $VN.Void | |
N005 ( 1, 2) [000045] D------N---- | | \--* LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N010 ( 6, 6) [000010] -A-XG---R--- \--* ASG double <l:$1c1, c:$200> | |
N009 ( 1, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 <l:$1c1, c:$200> | |
***** BB01, stmt 2 | |
( 52, 22) [000037] ------------ * STMT void (IL ???... ???) | |
N006 ( 1, 2) [000012] ------------ | /--* LCL_VAR double V02 tmp0 u:2 (last use) <l:$1c1, c:$200> | |
N007 ( 52, 22) [000018] ----G------- | /--* ADD double <l:$1c6, c:$1c5> | |
N003 ( 3, 4) [000015] ------------ | | | /--* CNS_DBL double 100.00000000000000 $240 | |
N004 ( 40, 10) [000016] ------------ | | | /--* DIV double $1c2 | |
N002 ( 1, 2) [000014] ------------ | | | | \--* LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N005 ( 46, 16) [000017] ----G------- | | \--* MUL double <l:$1c4, c:$1c3> | |
N001 ( 1, 2) [000049] ------------ | | \--* LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N009 ( 52, 22) [000036] -A--G---R--- \--* ASG double <l:$1c6, c:$1c5> | |
N008 ( 1, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 <l:$1c6, c:$1c5> | |
***** BB01, stmt 3 | |
( 7, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 1, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$1c6, c:$1c5> | |
N006 ( 7, 7) [000033] -A-XG------- \--* ASG double $VN.Void | |
N004 ( 5, 4) [000032] ---XG--N---- \--* IND double $1c6 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $140 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
***** BB01, stmt 4 | |
( 0, 0) [000023] ------------ * STMT void (IL 0x01F... ???) | |
N001 ( 0, 0) [000022] ------------ \--* RETURN void $300 | |
------------------------------------------------------------------------------------------------------------------- | |
GenTreeNode creates assertion: | |
N004 ( 5, 4) [000025] ---XG------- * IND double <l:$1c1, c:$200> | |
In BB01 New Global Constant Assertion: (128, 0) ($80,$0) V00.02 != null index=#01, mask=0000000000000001 | |
BB01 valueGen = 0000000000000001AssertionPropCallback::StartMerge: BB01 in -> 0000000000000000 | |
AssertionPropCallback::EndMerge : BB01 in -> 0000000000000000 | |
AssertionPropCallback::Changed : BB01 before out -> 0000000000000001; after out -> 0000000000000001; | |
jumpDest before out -> 0000000000000001; jumpDest after out -> 0000000000000000; | |
BB01 valueIn = 0000000000000000 valueOut = 0000000000000001 | |
Propagating 0000000000000000 assertions for BB01, stmt [000011], tree [000002], tree -> 0 | |
Propagating 0000000000000000 assertions for BB01, stmt [000011], tree [000039], tree -> 0 | |
Propagating 0000000000000000 assertions for BB01, stmt [000011], tree [000040], tree -> 0 | |
Propagating 0000000000000000 assertions for BB01, stmt [000011], tree [000025], tree -> 1 | |
Propagating 0000000000000001 assertions for BB01, stmt [000011], tree [000045], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000011], tree [000046], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000011], tree [000047], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000011], tree [000048], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000011], tree [000009], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000011], tree [000010], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000049], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000014], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000015], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000016], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000017], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000012], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000018], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000035], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000036], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000034], tree [000001], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000034], tree [000043], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000034], tree [000044], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000034], tree [000032], tree -> 1 | |
Non-null prop for index #01 in BB01: | |
N004 ( 5, 4) [000032] ---XG--N---- * IND double $1c6 | |
Propagating 0000000000000001 assertions for BB01, stmt [000034], tree [000031], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000034], tree [000033], tree -> 0 | |
Re-morphing this stmt: | |
( 7, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 1, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$1c6, c:$1c5> | |
N006 ( 7, 7) [000033] -A-XG------- \--* ASG double $VN.Void | |
N004 ( 5, 4) [000032] x---GO-N---- \--* IND double $1c6 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $140 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
New refCnts for V00: refCnt = 6, refCntWtd = 6 | |
New refCnts for V03: refCnt = 4, refCntWtd = 8 | |
optAssertionPropMain morphed tree: | |
N005 ( 1, 2) [000031] ------------ /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$1c6, c:$1c5> | |
N006 ( 7, 7) [000033] -A--GO------ * ASG double $VN.Void | |
N004 ( 5, 4) [000032] x---GO-N---- \--* IND double $1c6 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $140 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
Propagating 0000000000000001 assertions for BB01, stmt [000023], tree [000022], tree -> 0 | |
*************** In fgDebugCheckBBlist | |
*************** In OptimizeRangeChecks() | |
Blocks/trees before phase | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
( 6, 6) [000011] ------------ * STMT void (IL ???... ???) | |
N007 ( 1, 2) [000047] ------------ | /--* LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N008 ( 6, 6) [000048] -A-XG------- | /--* COMMA double <l:$1c1, c:$200> | |
N004 ( 5, 4) [000025] ---XG------- | | | /--* IND double <l:$1c1, c:$200> | |
N002 ( 1, 1) [000039] ------------ | | | | | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000040] -------N---- | | | | \--* ADD byref $140 | |
N001 ( 1, 1) [000002] ------------ | | | | \--* LCL_VAR ref V00 this u:2 $80 | |
N006 ( 5, 4) [000046] -A-XG---R--- | | \--* ASG double $VN.Void | |
N005 ( 1, 2) [000045] D------N---- | | \--* LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N010 ( 6, 6) [000010] -A-XG---R--- \--* ASG double <l:$1c1, c:$200> | |
N009 ( 1, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 <l:$1c1, c:$200> | |
***** BB01, stmt 2 | |
( 52, 22) [000037] ------------ * STMT void (IL ???... ???) | |
N006 ( 1, 2) [000012] ------------ | /--* LCL_VAR double V02 tmp0 u:2 (last use) <l:$1c1, c:$200> | |
N007 ( 52, 22) [000018] ----G------- | /--* ADD double <l:$1c6, c:$1c5> | |
N003 ( 3, 4) [000015] ------------ | | | /--* CNS_DBL double 100.00000000000000 $240 | |
N004 ( 40, 10) [000016] ------------ | | | /--* DIV double $1c2 | |
N002 ( 1, 2) [000014] ------------ | | | | \--* LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N005 ( 46, 16) [000017] ----G------- | | \--* MUL double <l:$1c4, c:$1c3> | |
N001 ( 1, 2) [000049] ------------ | | \--* LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N009 ( 52, 22) [000036] -A--G---R--- \--* ASG double <l:$1c6, c:$1c5> | |
N008 ( 1, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 <l:$1c6, c:$1c5> | |
***** BB01, stmt 3 | |
( 7, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 1, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$1c6, c:$1c5> | |
N006 ( 7, 7) [000033] -A--GO------ \--* ASG double $VN.Void | |
N004 ( 5, 4) [000032] x---GO-N---- \--* IND double $1c6 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $140 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
***** BB01, stmt 4 | |
( 0, 0) [000023] ------------ * STMT void (IL 0x01F... ???) | |
N001 ( 0, 0) [000022] ------------ \--* RETURN void $300 | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDetermineFirstColdBlock() | |
No procedure splitting will be done for this method | |
*************** In IR Rationalize | |
Trees before IR Rationalize | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
( 6, 6) [000011] ------------ * STMT void (IL ???... ???) | |
N007 ( 1, 2) [000047] ------------ | /--* LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N008 ( 6, 6) [000048] -A-XG------- | /--* COMMA double <l:$1c1, c:$200> | |
N004 ( 5, 4) [000025] ---XG------- | | | /--* IND double <l:$1c1, c:$200> | |
N002 ( 1, 1) [000039] ------------ | | | | | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000040] -------N---- | | | | \--* ADD byref $140 | |
N001 ( 1, 1) [000002] ------------ | | | | \--* LCL_VAR ref V00 this u:2 $80 | |
N006 ( 5, 4) [000046] -A-XG---R--- | | \--* ASG double $VN.Void | |
N005 ( 1, 2) [000045] D------N---- | | \--* LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N010 ( 6, 6) [000010] -A-XG---R--- \--* ASG double <l:$1c1, c:$200> | |
N009 ( 1, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 <l:$1c1, c:$200> | |
***** BB01, stmt 2 | |
( 52, 22) [000037] ------------ * STMT void (IL ???... ???) | |
N006 ( 1, 2) [000012] ------------ | /--* LCL_VAR double V02 tmp0 u:2 (last use) <l:$1c1, c:$200> | |
N007 ( 52, 22) [000018] ----G------- | /--* ADD double <l:$1c6, c:$1c5> | |
N003 ( 3, 4) [000015] ------------ | | | /--* CNS_DBL double 100.00000000000000 $240 | |
N004 ( 40, 10) [000016] ------------ | | | /--* DIV double $1c2 | |
N002 ( 1, 2) [000014] ------------ | | | | \--* LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N005 ( 46, 16) [000017] ----G------- | | \--* MUL double <l:$1c4, c:$1c3> | |
N001 ( 1, 2) [000049] ------------ | | \--* LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N009 ( 52, 22) [000036] -A--G---R--- \--* ASG double <l:$1c6, c:$1c5> | |
N008 ( 1, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 <l:$1c6, c:$1c5> | |
***** BB01, stmt 3 | |
( 7, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 1, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$1c6, c:$1c5> | |
N006 ( 7, 7) [000033] -A--GO------ \--* ASG double $VN.Void | |
N004 ( 5, 4) [000032] x---GO-N---- \--* IND double $1c6 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT long 8 field offset Fseq[_value] $100 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $140 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
***** BB01, stmt 4 | |
( 0, 0) [000023] ------------ * STMT void (IL 0x01F... ???) | |
N001 ( 0, 0) [000022] ------------ \--* RETURN void $300 | |
------------------------------------------------------------------------------------------------------------------- | |
rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) | |
N006 ( 5, 4) [000046] DA-XG------- * STORE_LCL_VAR double V05 cse0 | |
rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) | |
N010 ( 6, 6) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 | |
rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) | |
N009 ( 52, 22) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 | |
*************** Exiting IR Rationalize | |
Trees after IR Rationalize | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
N001 ( 1, 1) [000002] ------------ t2 = LCL_VAR ref V00 this u:2 $80 | |
N002 ( 1, 1) [000039] ------------ t39 = CNS_INT long 8 field offset Fseq[_value] $100 | |
/--* t2 ref | |
+--* t39 long | |
N003 ( 2, 2) [000040] -------N---- t40 = * ADD byref $140 | |
/--* t40 byref | |
N004 ( 5, 4) [000025] ---XG------- t25 = * IND double <l:$1c1, c:$200> | |
/--* t25 double | |
N006 ( 5, 4) [000046] DA-XG------- * STORE_LCL_VAR double V05 cse0 | |
N007 ( 1, 2) [000047] ------------ t47 = LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
/--* t47 double | |
N010 ( 6, 6) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 | |
N001 ( 1, 2) [000049] ------------ t49 = LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N002 ( 1, 2) [000014] ------------ t14 = LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N003 ( 3, 4) [000015] ------------ t15 = CNS_DBL double 100.00000000000000 $240 | |
/--* t14 double | |
+--* t15 double | |
N004 ( 40, 10) [000016] ------------ t16 = * DIV double $1c2 | |
/--* t49 double | |
+--* t16 double | |
N005 ( 46, 16) [000017] ----G------- t17 = * MUL double <l:$1c4, c:$1c3> | |
N006 ( 1, 2) [000012] ------------ t12 = LCL_VAR double V02 tmp0 u:2 (last use) <l:$1c1, c:$200> | |
/--* t17 double | |
+--* t12 double | |
N007 ( 52, 22) [000018] ----G------- t18 = * ADD double <l:$1c6, c:$1c5> | |
/--* t18 double | |
N009 ( 52, 22) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 | |
N001 ( 1, 1) [000001] ------------ t1 = LCL_VAR ref V00 this u:2 (last use) $80 | |
N002 ( 1, 1) [000043] ------------ t43 = CNS_INT long 8 field offset Fseq[_value] $100 | |
/--* t1 ref | |
+--* t43 long | |
N003 ( 2, 2) [000044] -------N---- t44 = * ADD byref $140 | |
N005 ( 1, 2) [000031] ------------ t31 = LCL_VAR double V03 tmp1 u:2 (last use) <l:$1c6, c:$1c5> | |
/--* t44 byref | |
+--* t31 double | |
[000050] -A--GO------ * STOREIND double | |
( 0, 0) [000023] ------------ IL_OFFSET void IL offset: 0x1f | |
N001 ( 0, 0) [000022] ------------ RETURN void $300 | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
*************** In fgDebugCheckBBlist | |
*************** In Lowering | |
Trees before Lowering | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
N001 ( 1, 1) [000002] ------------ t2 = LCL_VAR ref V00 this u:2 $80 | |
N002 ( 1, 1) [000039] ------------ t39 = CNS_INT long 8 field offset Fseq[_value] $100 | |
/--* t2 ref | |
+--* t39 long | |
N003 ( 2, 2) [000040] -------N---- t40 = * ADD byref $140 | |
/--* t40 byref | |
N004 ( 5, 4) [000025] ---XG------- t25 = * IND double <l:$1c1, c:$200> | |
/--* t25 double | |
N006 ( 5, 4) [000046] DA-XG------- * STORE_LCL_VAR double V05 cse0 | |
N007 ( 1, 2) [000047] ------------ t47 = LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
/--* t47 double | |
N010 ( 6, 6) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 | |
N001 ( 1, 2) [000049] ------------ t49 = LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N002 ( 1, 2) [000014] ------------ t14 = LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N003 ( 3, 4) [000015] ------------ t15 = CNS_DBL double 100.00000000000000 $240 | |
/--* t14 double | |
+--* t15 double | |
N004 ( 40, 10) [000016] ------------ t16 = * DIV double $1c2 | |
/--* t49 double | |
+--* t16 double | |
N005 ( 46, 16) [000017] ----G------- t17 = * MUL double <l:$1c4, c:$1c3> | |
N006 ( 1, 2) [000012] ------------ t12 = LCL_VAR double V02 tmp0 u:2 (last use) <l:$1c1, c:$200> | |
/--* t17 double | |
+--* t12 double | |
N007 ( 52, 22) [000018] ----G------- t18 = * ADD double <l:$1c6, c:$1c5> | |
/--* t18 double | |
N009 ( 52, 22) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 | |
N001 ( 1, 1) [000001] ------------ t1 = LCL_VAR ref V00 this u:2 (last use) $80 | |
N002 ( 1, 1) [000043] ------------ t43 = CNS_INT long 8 field offset Fseq[_value] $100 | |
/--* t1 ref | |
+--* t43 long | |
N003 ( 2, 2) [000044] -------N---- t44 = * ADD byref $140 | |
N005 ( 1, 2) [000031] ------------ t31 = LCL_VAR double V03 tmp1 u:2 (last use) <l:$1c6, c:$1c5> | |
/--* t44 byref | |
+--* t31 double | |
[000050] -A--GO------ * STOREIND double | |
( 0, 0) [000023] ------------ IL_OFFSET void IL offset: 0x1f | |
N001 ( 0, 0) [000022] ------------ RETURN void $300 | |
------------------------------------------------------------------------------------------------------------------- | |
Addressing mode: | |
Base | |
N001 ( 1, 1) [000002] ------------ * LCL_VAR ref V00 this u:2 $80 | |
+ 8 | |
New addressing mode node: | |
[000051] ------------ * LEA(b+8) byref | |
Addressing mode: | |
Base | |
N001 ( 1, 1) [000001] ------------ * LCL_VAR ref V00 this u:2 (last use) $80 | |
+ 8 | |
New addressing mode node: | |
[000052] ------------ * LEA(b+8) byref | |
lowering GT_RETURN | |
N001 ( 0, 0) [000022] ------------ * RETURN void $300 | |
============Lower has completed modifying nodes. | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
N001 ( 1, 1) [000002] ------------ t2 = LCL_VAR ref V00 this u:2 $80 | |
/--* t2 ref | |
[000051] -c---------- t51 = * LEA(b+8) byref | |
/--* t51 byref | |
N004 ( 5, 4) [000025] ---XG------- t25 = * IND double <l:$1c1, c:$200> | |
/--* t25 double | |
N006 ( 5, 4) [000046] DA-XG------- * STORE_LCL_VAR double V05 cse0 | |
N007 ( 1, 2) [000047] ------------ t47 = LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
/--* t47 double | |
N010 ( 6, 6) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 | |
N001 ( 1, 2) [000049] ------------ t49 = LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
N002 ( 1, 2) [000014] ------------ t14 = LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N003 ( 3, 4) [000015] -c---------- t15 = CNS_DBL double 100.00000000000000 $240 | |
/--* t14 double | |
+--* t15 double | |
N004 ( 40, 10) [000016] ------------ t16 = * DIV double $1c2 | |
/--* t49 double | |
+--* t16 double | |
N005 ( 46, 16) [000017] ----G------- t17 = * MUL double <l:$1c4, c:$1c3> | |
N006 ( 1, 2) [000012] ------------ t12 = LCL_VAR double V02 tmp0 u:2 (last use) <l:$1c1, c:$200> | |
/--* t17 double | |
+--* t12 double | |
N007 ( 52, 22) [000018] ----G------- t18 = * ADD double <l:$1c6, c:$1c5> | |
/--* t18 double | |
N009 ( 52, 22) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 | |
N001 ( 1, 1) [000001] ------------ t1 = LCL_VAR ref V00 this u:2 (last use) $80 | |
/--* t1 ref | |
[000052] -c---------- t52 = * LEA(b+8) byref | |
N005 ( 1, 2) [000031] ------------ t31 = LCL_VAR double V03 tmp1 u:2 (last use) <l:$1c6, c:$1c5> | |
/--* t52 byref | |
+--* t31 double | |
[000050] -A--GO------ * STOREIND double | |
( 0, 0) [000023] ------------ IL_OFFSET void IL offset: 0x1f | |
N001 ( 0, 0) [000022] ------------ RETURN void $300 | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In fgLocalVarLiveness() | |
; Initial local variable assignments | |
; | |
; V00 this ref this class-hnd | |
; V01 arg1 double | |
; V02 tmp0 double | |
; V03 tmp1 double | |
; V04 OutArgs lclBlk ( 0) | |
; V05 cse0 double | |
In fgLocalVarLivenessInit, sorting locals | |
refCnt table for 'RaiseValue': | |
V00 this [ ref]: refCnt = 6, refCntWtd = 6 pref [rcx] | |
V02 tmp0 [double]: refCnt = 4, refCntWtd = 8 | |
V03 tmp1 [double]: refCnt = 4, refCntWtd = 8 | |
V05 cse0 [double]: refCnt = 6, refCntWtd = 6 | |
V01 arg1 [double]: refCnt = 4, refCntWtd = 4 pref [mm1] | |
V04 OutArgs [lclBlk]: refCnt = 1, refCntWtd = 1 | |
*************** In fgPerBlockLocalVarLiveness() | |
BB01 USE(2)={V00 V01} + ByrefExposed + GcHeap | |
DEF(3)={ V02 V03 V05 } | |
** Memory liveness computed, GcHeap states and ByrefExposed states match | |
*************** In fgInterBlockLocalVarLiveness() | |
BB liveness after fgLiveVarAnalysis(): | |
BB01 IN (2)={V00 V01} + ByrefExposed + GcHeap | |
OUT(0)={ } | |
*************** In fgUpdateFlowGraph() | |
Before updating the flow graph: | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
Liveness pass finished after lowering, IR: | |
lvasortagain = 0 | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
N001 ( 1, 1) [000002] ------------ t2 = LCL_VAR ref V00 this u:2 $80 | |
/--* t2 ref | |
[000051] -c---------- t51 = * LEA(b+8) byref | |
/--* t51 byref | |
N004 ( 5, 4) [000025] ---XG------- t25 = * IND double <l:$1c1, c:$200> | |
/--* t25 double | |
N006 ( 5, 4) [000046] DA-XG------- * STORE_LCL_VAR double V05 cse0 | |
N007 ( 1, 2) [000047] ------------ t47 = LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
/--* t47 double | |
N010 ( 6, 6) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 | |
N001 ( 1, 2) [000049] ------------ t49 = LCL_VAR double V05 cse0 (last use) <l:$1c1, c:$200> | |
N002 ( 1, 2) [000014] ------------ t14 = LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N003 ( 3, 4) [000015] -c---------- t15 = CNS_DBL double 100.00000000000000 $240 | |
/--* t14 double | |
+--* t15 double | |
N004 ( 40, 10) [000016] ------------ t16 = * DIV double $1c2 | |
/--* t49 double | |
+--* t16 double | |
N005 ( 46, 16) [000017] ----G------- t17 = * MUL double <l:$1c4, c:$1c3> | |
N006 ( 1, 2) [000012] ------------ t12 = LCL_VAR double V02 tmp0 u:2 (last use) <l:$1c1, c:$200> | |
/--* t17 double | |
+--* t12 double | |
N007 ( 52, 22) [000018] ----G------- t18 = * ADD double <l:$1c6, c:$1c5> | |
/--* t18 double | |
N009 ( 52, 22) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 | |
N001 ( 1, 1) [000001] ------------ t1 = LCL_VAR ref V00 this u:2 (last use) $80 | |
/--* t1 ref | |
[000052] -c---------- t52 = * LEA(b+8) byref | |
N005 ( 1, 2) [000031] ------------ t31 = LCL_VAR double V03 tmp1 u:2 (last use) <l:$1c6, c:$1c5> | |
/--* t52 byref | |
+--* t31 double | |
[000050] -A--GO------ * STOREIND double | |
( 0, 0) [000023] ------------ IL_OFFSET void IL offset: 0x1f | |
N001 ( 0, 0) [000022] ------------ RETURN void $300 | |
------------------------------------------------------------------------------------------------------------------- | |
*************** Exiting Lowering | |
Trees after Lowering | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
N001 ( 1, 1) [000002] ------------ t2 = LCL_VAR ref V00 this u:2 $80 | |
/--* t2 ref | |
[000051] -c---------- t51 = * LEA(b+8) byref | |
/--* t51 byref | |
N004 ( 5, 4) [000025] ---XG------- t25 = * IND double <l:$1c1, c:$200> | |
/--* t25 double | |
N006 ( 5, 4) [000046] DA-XG------- * STORE_LCL_VAR double V05 cse0 | |
N007 ( 1, 2) [000047] ------------ t47 = LCL_VAR double V05 cse0 <l:$1c1, c:$200> | |
/--* t47 double | |
N010 ( 6, 6) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 | |
N001 ( 1, 2) [000049] ------------ t49 = LCL_VAR double V05 cse0 (last use) <l:$1c1, c:$200> | |
N002 ( 1, 2) [000014] ------------ t14 = LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N003 ( 3, 4) [000015] -c---------- t15 = CNS_DBL double 100.00000000000000 $240 | |
/--* t14 double | |
+--* t15 double | |
N004 ( 40, 10) [000016] ------------ t16 = * DIV double $1c2 | |
/--* t49 double | |
+--* t16 double | |
N005 ( 46, 16) [000017] ----G------- t17 = * MUL double <l:$1c4, c:$1c3> | |
N006 ( 1, 2) [000012] ------------ t12 = LCL_VAR double V02 tmp0 u:2 (last use) <l:$1c1, c:$200> | |
/--* t17 double | |
+--* t12 double | |
N007 ( 52, 22) [000018] ----G------- t18 = * ADD double <l:$1c6, c:$1c5> | |
/--* t18 double | |
N009 ( 52, 22) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 | |
N001 ( 1, 1) [000001] ------------ t1 = LCL_VAR ref V00 this u:2 (last use) $80 | |
/--* t1 ref | |
[000052] -c---------- t52 = * LEA(b+8) byref | |
N005 ( 1, 2) [000031] ------------ t31 = LCL_VAR double V03 tmp1 u:2 (last use) <l:$1c6, c:$1c5> | |
/--* t52 byref | |
+--* t31 double | |
[000050] -A--GO------ * STOREIND double | |
( 0, 0) [000023] ------------ IL_OFFSET void IL offset: 0x1f | |
N001 ( 0, 0) [000022] ------------ RETURN void $300 | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
Clearing modified regs. | |
buildIntervals ======== | |
----------------- | |
LIVENESS: | |
----------------- | |
BB01 use def in out | |
{V00 V01} | |
{V02 V03 V05} | |
{V00 V01} | |
{} | |
Interval 0: RefPositions {} physReg:NA Preferences=[allInt] | |
Interval 1: RefPositions {} physReg:NA Preferences=[allFloat] | |
Interval 2: RefPositions {} physReg:NA Preferences=[allFloat] | |
Interval 3: RefPositions {} physReg:NA Preferences=[allFloat] | |
Interval 4: RefPositions {} physReg:NA Preferences=[allFloat] | |
FP callee save candidate vars: {V02 V03 V05} | |
floatVarCount = 4; hasLoops = 0, singleExit = 1 | |
TUPLE STYLE DUMP BEFORE LSRA | |
LSRA Block Sequence: BB01( 1 ) | |
BB01 [000..020) (return), preds={} succs={} | |
===== | |
N001. V00(t2) | |
N000. LEA(b+8) | |
N004. IND | |
N006. V05(t46) | |
N007. V05(t47) | |
N010. V02(t10) | |
N001. V05(t49*) | |
N002. V01(t14*) | |
N003. CNS_DBL 100.00000000000000 | |
N004. DIV | |
N005. MUL | |
N006. V02(t12*) | |
N007. ADD | |
N009. V03(t36) | |
N001. V00(t1*) | |
N000. LEA(b+8) | |
N005. V03(t31*) | |
N000. STOREIND | |
N000. IL_OFFSET IL offset: 0x1f | |
N001. RETURN | |
buildIntervals second part ======== | |
Int arg V00 in reg rcx | |
<RefPosition #0 @0 RefTypeParamDef <Ivl:0 V00> BB00 regmask=[rcx] fixed> | |
Float arg V01 in reg mm1 | |
<RefPosition #1 @0 RefTypeParamDef <Ivl:1 V01> BB00 regmask=[mm1] fixed> | |
NEW BLOCK BB01 | |
<RefPosition #2 @1 RefTypeBB BB01 regmask=[]> | |
N003 ( 1, 1) [000002] ------------ * LCL_VAR ref V00 this u:2 NA REG NA $80 | |
+<TreeNodeInfo @ 3 1=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I> | |
N003. V00(L0) | |
consume=0 produce=1 | |
N005 (???,???) [000051] -c---------- * LEA(b+8) byref REG NA | |
+<TreeNodeInfo @ 5 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I> | |
N005. LEA(b+8) | |
Contained | |
N007 ( 5, 4) [000025] ---XG------- * IND double REG NA <l:$1c1, c:$200> | |
+<TreeNodeInfo @ 7 1=1 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N007. t25 = IND | |
consume=1 produce=1 | |
at start of tree, map contains: { N005. LEA -> (3.N003) } | |
<RefPosition #3 @7 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] last> | |
Def candidates [allFloat], Use candidates [allFloat] | |
Interval 5: RefPositions {} physReg:NA Preferences=[allFloat] | |
<RefPosition #4 @8 RefTypeDef <Ivl:5> IND BB01 regmask=[allFloat]> | |
N009 ( 5, 4) [000046] DA-XG------- * STORE_LCL_VAR double V05 cse0 NA REG NA | |
+<TreeNodeInfo @ 9 0=1 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N009. V05(L4) | |
consume=1 produce=0 | |
at start of tree, map contains: { N007. IND -> (8.N007) } | |
Assigning related <L4> to <I5> | |
<RefPosition #5 @9 RefTypeUse <Ivl:5> BB01 regmask=[allFloat] last> | |
Def candidates [allFloat], Use candidates [allFloat] | |
<RefPosition #6 @10 RefTypeDef <Ivl:4 V05> STORE_LCL_VAR BB01 regmask=[allFloat] last> | |
N011 ( 1, 2) [000047] ------------ * LCL_VAR double V05 cse0 NA REG NA <l:$1c1, c:$200> | |
+<TreeNodeInfo @ 11 1=0 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N011. V05(L4) | |
consume=0 produce=1 | |
N013 ( 6, 6) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 NA REG NA | |
+<TreeNodeInfo @ 13 0=1 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N013. V02(L2) | |
consume=1 produce=0 | |
at start of tree, map contains: { N011. LCL_VAR -> (11.N011) } | |
<RefPosition #7 @13 RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[allFloat] last> | |
Def candidates [allFloat], Use candidates [allFloat] | |
<RefPosition #8 @14 RefTypeDef <Ivl:2 V02> STORE_LCL_VAR BB01 regmask=[allFloat] last> | |
N015 ( 1, 2) [000049] ------------ * LCL_VAR double V05 cse0 NA (last use) REG NA <l:$1c1, c:$200> | |
+<TreeNodeInfo @ 15 1=0 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I O> | |
N015. V05(L4) | |
consume=0 produce=1 | |
N017 ( 1, 2) [000014] ------------ * LCL_VAR double V01 arg1 u:2 NA (last use) REG NA $c0 | |
+<TreeNodeInfo @ 17 1=0 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N017. V01(L1) | |
consume=0 produce=1 | |
N019 ( 3, 4) [000015] -c---------- * CNS_DBL double 100.00000000000000 REG NA $240 | |
+<TreeNodeInfo @ 19 0=0 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N019. CNS_DBL 100.00000000000000 REG NA | |
Contained | |
N021 ( 40, 10) [000016] ------------ * DIV double REG NA $1c2 | |
+<TreeNodeInfo @ 21 1=1 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N021. t16 = DIV | |
consume=1 produce=1 | |
at start of tree, map contains: { N015. LCL_VAR -> (15.N015); N017. LCL_VAR -> (17.N017) } | |
<RefPosition #9 @21 RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[allFloat] last> | |
Def candidates [allFloat], Use candidates [allFloat] | |
Interval 6: RefPositions {} physReg:NA Preferences=[allFloat] | |
Assigning related <L1> to <I6> | |
<RefPosition #10 @22 RefTypeDef <Ivl:6> DIV BB01 regmask=[allFloat]> | |
N023 ( 46, 16) [000017] ----G------- * MUL double REG NA <l:$1c4, c:$1c3> | |
+<TreeNodeInfo @ 23 1=2 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N023. t17 = MUL | |
consume=2 produce=1 | |
at start of tree, map contains: { N015. LCL_VAR -> (15.N015); N021. DIV -> (22.N021) } | |
<RefPosition #11 @23 RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[allFloat] last> | |
<RefPosition #12 @23 RefTypeUse <Ivl:6> BB01 regmask=[allFloat] last> | |
Def candidates [allFloat], Use candidates [allFloat] | |
Interval 7: RefPositions {} physReg:NA Preferences=[allFloat] | |
Assigning related <L4> to <I7> | |
<RefPosition #13 @24 RefTypeDef <Ivl:7> MUL BB01 regmask=[allFloat]> | |
N025 ( 1, 2) [000012] ------------ * LCL_VAR double V02 tmp0 u:2 NA (last use) REG NA <l:$1c1, c:$200> | |
+<TreeNodeInfo @ 25 1=0 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I O> | |
N025. V02(L2) | |
consume=0 produce=1 | |
N027 ( 52, 22) [000018] ----G------- * ADD double REG NA <l:$1c6, c:$1c5> | |
+<TreeNodeInfo @ 27 1=2 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N027. t18 = ADD | |
consume=2 produce=1 | |
at start of tree, map contains: { N025. LCL_VAR -> (25.N025); N023. MUL -> (24.N023) } | |
<RefPosition #14 @27 RefTypeUse <Ivl:7> BB01 regmask=[allFloat] last> | |
<RefPosition #15 @27 RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[allFloat] last> | |
Def candidates [allFloat], Use candidates [allFloat] | |
Interval 8: RefPositions {} physReg:NA Preferences=[allFloat] | |
Assigning related <I7> to <I8> | |
<RefPosition #16 @28 RefTypeDef <Ivl:8> ADD BB01 regmask=[allFloat]> | |
N029 ( 52, 22) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 NA REG NA | |
+<TreeNodeInfo @ 29 0=1 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N029. V03(L3) | |
consume=1 produce=0 | |
at start of tree, map contains: { N027. ADD -> (28.N027) } | |
Assigning related <L3> to <I8> | |
<RefPosition #17 @29 RefTypeUse <Ivl:8> BB01 regmask=[allFloat] last> | |
Def candidates [allFloat], Use candidates [allFloat] | |
<RefPosition #18 @30 RefTypeDef <Ivl:3 V03> STORE_LCL_VAR BB01 regmask=[allFloat] last> | |
N031 ( 1, 1) [000001] ------------ * LCL_VAR ref V00 this u:2 NA (last use) REG NA $80 | |
+<TreeNodeInfo @ 31 1=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I> | |
N031. V00(L0) | |
consume=0 produce=1 | |
N033 (???,???) [000052] -c---------- * LEA(b+8) byref REG NA | |
+<TreeNodeInfo @ 33 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I> | |
N033. LEA(b+8) | |
Contained | |
N035 ( 1, 2) [000031] ------------ * LCL_VAR double V03 tmp1 u:2 NA (last use) REG NA <l:$1c6, c:$1c5> | |
+<TreeNodeInfo @ 35 1=0 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N035. V03(L3) | |
consume=0 produce=1 | |
N037 (???,???) [000050] -A--GO------ * STOREIND double REG NA | |
+<TreeNodeInfo @ 37 0=2 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N037. STOREIND | |
consume=2 produce=0 | |
at start of tree, map contains: { N035. LCL_VAR -> (35.N035); N033. LEA -> (31.N031) } | |
<RefPosition #19 @37 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] last> | |
<RefPosition #20 @37 RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[allFloat] last> | |
N039 ( 0, 0) [000023] ------------ * IL_OFFSET void IL offset: 0x1f REG NA | |
+<TreeNodeInfo @ 39 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I> | |
N039. IL_OFFSET IL offset: 0x1f REG NA | |
consume=0 produce=0 | |
N041 ( 0, 0) [000022] ------------ * RETURN void REG NA $300 | |
+<TreeNodeInfo @ 41 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I> | |
N041. RETURN | |
consume=0 produce=0 | |
CHECKING LAST USES for block 1, liveout={} | |
============================== | |
use: {V00 V01} | |
def: {V02 V03 V05} | |
Linear scan intervals BEFORE VALIDATING INTERVALS: | |
Interval 0: (V00) RefPositions {#0@0 #3@7 #19@37} physReg:rcx Preferences=[rcx] | |
Interval 1: (V01) RefPositions {#1@0 #9@21} physReg:mm1 Preferences=[mm1] | |
Interval 2: (V02) RefPositions {#8@14 #15@27} physReg:NA Preferences=[allFloat] | |
Interval 3: (V03) RefPositions {#18@30 #20@37} physReg:NA Preferences=[allFloat] | |
Interval 4: (V05) RefPositions {#6@10 #7@13 #11@23} physReg:NA Preferences=[allFloat] | |
Interval 5: RefPositions {#4@8 #5@9} physReg:NA Preferences=[allFloat] RelatedInterval <L4>[000001FFFE8A1938] | |
Interval 6: RefPositions {#10@22 #12@23} physReg:NA Preferences=[allFloat] RelatedInterval <L1>[000001FFFE8A1830] | |
Interval 7: RefPositions {#13@24 #14@27} physReg:NA Preferences=[allFloat] RelatedInterval <L4>[000001FFFE8A1938] | |
Interval 8: RefPositions {#16@28 #17@29} physReg:NA Preferences=[allFloat] RelatedInterval <L3>[000001FFFE8A18E0] | |
------------ | |
REFPOSITIONS BEFORE VALIDATING INTERVALS: | |
------------ | |
<RefPosition #0 @0 ->#3 RefTypeParamDef <Ivl:0 V00> BB00 regmask=[rcx] fixed> | |
<RefPosition #1 @0 ->#9 RefTypeParamDef <Ivl:1 V01> BB00 regmask=[mm1] fixed> | |
<RefPosition #2 @1 RefTypeBB BB01 regmask=[]> | |
<RefPosition #3 @7 ->#19 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt]> | |
<RefPosition #4 @8 ->#5 RefTypeDef <Ivl:5> IND BB01 regmask=[allFloat]> | |
<RefPosition #5 @9 RefTypeUse <Ivl:5> BB01 regmask=[allFloat] last> | |
<RefPosition #6 @10 ->#7 RefTypeDef <Ivl:4 V05> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #7 @13 ->#11 RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #8 @14 ->#15 RefTypeDef <Ivl:2 V02> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #9 @21 RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[allFloat] last> | |
<RefPosition #10 @22 ->#12 RefTypeDef <Ivl:6> DIV BB01 regmask=[allFloat]> | |
<RefPosition #11 @23 RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
<RefPosition #12 @23 RefTypeUse <Ivl:6> BB01 regmask=[allFloat] last> | |
<RefPosition #13 @24 ->#14 RefTypeDef <Ivl:7> MUL BB01 regmask=[allFloat]> | |
<RefPosition #14 @27 RefTypeUse <Ivl:7> BB01 regmask=[allFloat] last> | |
<RefPosition #15 @27 RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
<RefPosition #16 @28 ->#17 RefTypeDef <Ivl:8> ADD BB01 regmask=[allFloat]> | |
<RefPosition #17 @29 RefTypeUse <Ivl:8> BB01 regmask=[allFloat] last> | |
<RefPosition #18 @30 ->#20 RefTypeDef <Ivl:3 V03> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #19 @37 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] last> | |
<RefPosition #20 @37 RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[allFloat] last> | |
----------------- | |
<RefPosition #0 @0 ->#3 RefTypeParamDef <Ivl:0 V00> BB00 regmask=[rcx] fixed> | |
<RefPosition #3 @7 ->#19 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt]> | |
<RefPosition #19 @37 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] last> | |
----------------- | |
<RefPosition #8 @14 ->#15 RefTypeDef <Ivl:2 V02> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #15 @27 RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
----------------- | |
<RefPosition #18 @30 ->#20 RefTypeDef <Ivl:3 V03> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #20 @37 RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[allFloat] last> | |
----------------- | |
<RefPosition #6 @10 ->#7 RefTypeDef <Ivl:4 V05> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #7 @13 ->#11 RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #11 @23 RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
----------------- | |
<RefPosition #1 @0 ->#9 RefTypeParamDef <Ivl:1 V01> BB00 regmask=[mm1] fixed> | |
<RefPosition #9 @21 RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[allFloat] last> | |
TUPLE STYLE DUMP WITH REF POSITIONS | |
Incoming Parameters: V00 V01 | |
BB01 [000..020) (return), preds={} succs={} | |
===== | |
N003. V00(L0) | |
N005. LEA(b+8) | |
N007. IND | |
Use:<L0>(#3) | |
Def:<I5>(#4) Pref:<L4> | |
N009. V05(L4) | |
Use:<I5>(#5) * | |
Def:<L4>(#6) | |
N011. V05(L4) | |
N013. V02(L2) | |
Use:<L4>(#7) | |
Def:<L2>(#8) | |
N015. V05(L4) | |
N017. V01(L1) | |
N019. CNS_DBL 100.00000000000000 REG NA | |
N021. DIV | |
Use:<L1>(#9) * | |
Def:<I6>(#10) Pref:<L1> | |
N023. MUL | |
Use:<L4>(#11) * | |
Use:<I6>(#12) * | |
Def:<I7>(#13) Pref:<L4> | |
N025. V02(L2) | |
N027. ADD | |
Use:<I7>(#14) * | |
Use:<L2>(#15) * | |
Def:<I8>(#16) Pref:<L3> | |
N029. V03(L3) | |
Use:<I8>(#17) * | |
Def:<L3>(#18) | |
N031. V00(L0) | |
N033. LEA(b+8) | |
N035. V03(L3) | |
N037. STOREIND | |
Use:<L0>(#19) * | |
Use:<L3>(#20) * | |
N039. IL_OFFSET IL offset: 0x1f REG NA | |
N041. RETURN | |
Linear scan intervals after buildIntervals: | |
Interval 0: (V00) RefPositions {#0@0 #3@7 #19@37} physReg:rcx Preferences=[rcx] | |
Interval 1: (V01) RefPositions {#1@0 #9@21} physReg:mm1 Preferences=[mm1] | |
Interval 2: (V02) RefPositions {#8@14 #15@27} physReg:NA Preferences=[allFloat] | |
Interval 3: (V03) RefPositions {#18@30 #20@37} physReg:NA Preferences=[allFloat] | |
Interval 4: (V05) RefPositions {#6@10 #7@13 #11@23} physReg:NA Preferences=[allFloat] | |
Interval 5: RefPositions {#4@8 #5@9} physReg:NA Preferences=[allFloat] RelatedInterval <L4>[000001FFFE8A1938] | |
Interval 6: RefPositions {#10@22 #12@23} physReg:NA Preferences=[allFloat] RelatedInterval <L1>[000001FFFE8A1830] | |
Interval 7: RefPositions {#13@24 #14@27} physReg:NA Preferences=[allFloat] RelatedInterval <L4>[000001FFFE8A1938] | |
Interval 8: RefPositions {#16@28 #17@29} physReg:NA Preferences=[allFloat] RelatedInterval <L3>[000001FFFE8A18E0] | |
*************** In LinearScan::allocateRegisters() | |
Linear scan intervals before allocateRegisters: | |
Interval 0: (V00) RefPositions {#0@0 #3@7 #19@37} physReg:rcx Preferences=[rcx] | |
Interval 1: (V01) RefPositions {#1@0 #9@21} physReg:mm1 Preferences=[mm1] | |
Interval 2: (V02) RefPositions {#8@14 #15@27} physReg:NA Preferences=[allFloat] | |
Interval 3: (V03) RefPositions {#18@30 #20@37} physReg:NA Preferences=[allFloat] | |
Interval 4: (V05) RefPositions {#6@10 #7@13 #11@23} physReg:NA Preferences=[allFloat] | |
Interval 5: RefPositions {#4@8 #5@9} physReg:NA Preferences=[allFloat] RelatedInterval <L4>[000001FFFE8A1938] | |
Interval 6: RefPositions {#10@22 #12@23} physReg:NA Preferences=[allFloat] RelatedInterval <L1>[000001FFFE8A1830] | |
Interval 7: RefPositions {#13@24 #14@27} physReg:NA Preferences=[allFloat] RelatedInterval <L4>[000001FFFE8A1938] | |
Interval 8: RefPositions {#16@28 #17@29} physReg:NA Preferences=[allFloat] RelatedInterval <L3>[000001FFFE8A18E0] | |
------------ | |
REFPOSITIONS BEFORE ALLOCATION: | |
------------ | |
<RefPosition #0 @0 ->#3 RefTypeParamDef <Ivl:0 V00> BB00 regmask=[rcx] fixed> | |
<RefPosition #1 @0 ->#9 RefTypeParamDef <Ivl:1 V01> BB00 regmask=[mm1] fixed> | |
<RefPosition #2 @1 RefTypeBB BB01 regmask=[]> | |
<RefPosition #3 @7 ->#19 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt]> | |
<RefPosition #4 @8 ->#5 RefTypeDef <Ivl:5> IND BB01 regmask=[allFloat]> | |
<RefPosition #5 @9 RefTypeUse <Ivl:5> BB01 regmask=[allFloat] last> | |
<RefPosition #6 @10 ->#7 RefTypeDef <Ivl:4 V05> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #7 @13 ->#11 RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #8 @14 ->#15 RefTypeDef <Ivl:2 V02> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #9 @21 RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[allFloat] last> | |
<RefPosition #10 @22 ->#12 RefTypeDef <Ivl:6> DIV BB01 regmask=[allFloat]> | |
<RefPosition #11 @23 RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
<RefPosition #12 @23 RefTypeUse <Ivl:6> BB01 regmask=[allFloat] last> | |
<RefPosition #13 @24 ->#14 RefTypeDef <Ivl:7> MUL BB01 regmask=[allFloat]> | |
<RefPosition #14 @27 RefTypeUse <Ivl:7> BB01 regmask=[allFloat] last> | |
<RefPosition #15 @27 RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
<RefPosition #16 @28 ->#17 RefTypeDef <Ivl:8> ADD BB01 regmask=[allFloat]> | |
<RefPosition #17 @29 RefTypeUse <Ivl:8> BB01 regmask=[allFloat] last> | |
<RefPosition #18 @30 ->#20 RefTypeDef <Ivl:3 V03> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #19 @37 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] last> | |
<RefPosition #20 @37 RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[allFloat] last> | |
VAR REFPOSITIONS BEFORE ALLOCATION | |
--- V00 | |
<RefPosition #0 @0 ->#3 RefTypeParamDef <Ivl:0 V00> BB00 regmask=[rcx] fixed> | |
<RefPosition #3 @7 ->#19 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt]> | |
<RefPosition #19 @37 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] last> | |
--- V01 | |
<RefPosition #1 @0 ->#9 RefTypeParamDef <Ivl:1 V01> BB00 regmask=[mm1] fixed> | |
<RefPosition #9 @21 RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[allFloat] last> | |
--- V02 | |
<RefPosition #8 @14 ->#15 RefTypeDef <Ivl:2 V02> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #15 @27 RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
--- V03 | |
<RefPosition #18 @30 ->#20 RefTypeDef <Ivl:3 V03> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #20 @37 RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[allFloat] last> | |
--- V04 | |
--- V05 | |
<RefPosition #6 @10 ->#7 RefTypeDef <Ivl:4 V05> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #7 @13 ->#11 RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #11 @23 RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
Allocating Registers | |
-------------------- | |
The following table has one or more rows for each RefPosition that is handled during allocation. | |
The first column provides the basic information about the RefPosition, with its type (e.g. Def, | |
Use, Fixd) followed by a '*' if it is a last use, and a 'D' if it is delayRegFree, and then the | |
action taken during allocation (e.g. Alloc a new register, or Keep an existing one). | |
The subsequent columns show the Interval occupying each register, if any, followed by 'a' if it is | |
active, and 'i'if it is inactive. Columns are only printed up to the last modifed register, which | |
may increase during allocation, in which case additional columns will appear. Registers which are | |
not marked modified have ---- in their column. | |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ | |
LocRP# Name Type Action Reg |rax |rcx |rdx |rbx |rsp |rbp |rsi |rdi |r8 |r9 |r10 |r11 |r12 |r13 |r14 |r15 |mm0 |mm1 | | |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ | |
|----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V1 a| | |
0.#0 V0 Parm Keep rcx |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V1 a| | |
0.#1 V1 Parm Keep mm1 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V1 a| | |
1.#2 BB1 PredBB0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V1 a| | |
7.#3 V0 Use Keep rcx |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V1 a| | |
8.#4 I5 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|I5 a|V1 a| | |
9.#5 I5 Use * Keep mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|I5 a|V1 a| | |
10.#6 V5 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V5 a|V1 a| | |
13.#7 V5 Use Keep mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V5 a|V1 a| | |
14.#8 V2 Def Alloc mm2 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V5 a|V1 a|V2 a| | |
21.#9 V1 Use * Keep mm1 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V5 a|V1 a|V2 a| | |
22.#10 I6 Def Alloc mm1 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V5 a|I6 a|V2 a| | |
23.#11 V5 Use * Keep mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V5 a|I6 a|V2 a| | |
23.#12 I6 Use * Keep mm1 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V5 a|I6 a|V2 a| | |
24.#13 I7 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|I7 a| |V2 a| | |
27.#14 I7 Use * Keep mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|I7 a| |V2 a| | |
27.#15 V2 Use * Keep mm2 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|I7 a| |V2 a| | |
28.#16 I8 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|I8 a| | | | |
29.#17 I8 Use * Keep mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|I8 a| | | | |
30.#18 V3 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V3 a| | | | |
37.#19 V0 Use * Keep rcx |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V3 a| | | | |
37.#20 V3 Use * Keep mm0 |----| |----|----|----|----|----|----|----|----|----|----|----|----|----|----| | | | | |
------------ | |
REFPOSITIONS AFTER ALLOCATION: | |
------------ | |
<RefPosition #0 @0 ->#3 RefTypeParamDef <Ivl:0 V00> BB00 regmask=[rcx] fixed> | |
<RefPosition #1 @0 ->#9 RefTypeParamDef <Ivl:1 V01> BB00 regmask=[mm1] fixed> | |
<RefPosition #2 @1 RefTypeBB BB01 regmask=[]> | |
<RefPosition #3 @7 ->#19 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[rcx]> | |
<RefPosition #4 @8 ->#5 RefTypeDef <Ivl:5> IND BB01 regmask=[mm0]> | |
<RefPosition #5 @9 RefTypeUse <Ivl:5> BB01 regmask=[mm0] last> | |
<RefPosition #6 @10 ->#7 RefTypeDef <Ivl:4 V05> STORE_LCL_VAR BB01 regmask=[mm0]> | |
<RefPosition #7 @13 ->#11 RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[mm0]> | |
<RefPosition #8 @14 ->#15 RefTypeDef <Ivl:2 V02> STORE_LCL_VAR BB01 regmask=[mm2]> | |
<RefPosition #9 @21 RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[mm1] last> | |
<RefPosition #10 @22 ->#12 RefTypeDef <Ivl:6> DIV BB01 regmask=[mm1]> | |
<RefPosition #11 @23 RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[mm0] last regOptional> | |
<RefPosition #12 @23 RefTypeUse <Ivl:6> BB01 regmask=[mm1] last> | |
<RefPosition #13 @24 ->#14 RefTypeDef <Ivl:7> MUL BB01 regmask=[mm0]> | |
<RefPosition #14 @27 RefTypeUse <Ivl:7> BB01 regmask=[mm0] last> | |
<RefPosition #15 @27 RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[mm2] last regOptional> | |
<RefPosition #16 @28 ->#17 RefTypeDef <Ivl:8> ADD BB01 regmask=[mm0]> | |
<RefPosition #17 @29 RefTypeUse <Ivl:8> BB01 regmask=[mm0] last> | |
<RefPosition #18 @30 ->#20 RefTypeDef <Ivl:3 V03> STORE_LCL_VAR BB01 regmask=[mm0]> | |
<RefPosition #19 @37 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[rcx] last> | |
<RefPosition #20 @37 RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[mm0] last> | |
VAR REFPOSITIONS AFTER ALLOCATION | |
--- V00 | |
<RefPosition #0 @0 ->#3 RefTypeParamDef <Ivl:0 V00> BB00 regmask=[rcx] fixed> | |
<RefPosition #3 @7 ->#19 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[rcx]> | |
<RefPosition #19 @37 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[rcx] last> | |
--- V01 | |
<RefPosition #1 @0 ->#9 RefTypeParamDef <Ivl:1 V01> BB00 regmask=[mm1] fixed> | |
<RefPosition #9 @21 RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[mm1] last> | |
--- V02 | |
<RefPosition #8 @14 ->#15 RefTypeDef <Ivl:2 V02> STORE_LCL_VAR BB01 regmask=[mm2]> | |
<RefPosition #15 @27 RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[mm2] last regOptional> | |
--- V03 | |
<RefPosition #18 @30 ->#20 RefTypeDef <Ivl:3 V03> STORE_LCL_VAR BB01 regmask=[mm0]> | |
<RefPosition #20 @37 RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[mm0] last> | |
--- V04 | |
--- V05 | |
<RefPosition #6 @10 ->#7 RefTypeDef <Ivl:4 V05> STORE_LCL_VAR BB01 regmask=[mm0]> | |
<RefPosition #7 @13 ->#11 RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[mm0]> | |
<RefPosition #11 @23 RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[mm0] last regOptional> | |
Active intervals at end of allocation: | |
----------------------- | |
RESOLVING BB BOUNDARIES | |
----------------------- | |
Resolution Candidates: {V00 V01} | |
Has NoCritical Edges | |
Prior to Resolution | |
BB01 use def in out | |
{V00 V01} | |
{V02 V03 V05} | |
{V00 V01} | |
{} | |
Var=Reg beg of BB01: V00=rcx V01=mm1 | |
Var=Reg end of BB01: none | |
RESOLVING EDGES | |
Set V00 argument initial register to rcx | |
Set V01 argument initial register to mm1 | |
Trees after linear scan register allocator (LSRA) | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
N003 ( 1, 1) [000002] ------------ t2 = LCL_VAR ref V00 this u:2 rcx REG rcx $80 | |
/--* t2 ref | |
N005 (???,???) [000051] -c---------- t51 = * LEA(b+8) byref REG NA | |
/--* t51 byref | |
N007 ( 5, 4) [000025] ---XG------- t25 = * IND double REG mm0 <l:$1c1, c:$200> | |
/--* t25 double | |
N009 ( 5, 4) [000046] DA-XG------- * STORE_LCL_VAR double V05 cse0 mm0 REG mm0 | |
N011 ( 1, 2) [000047] ------------ t47 = LCL_VAR double V05 cse0 mm0 REG mm0 <l:$1c1, c:$200> | |
/--* t47 double | |
N013 ( 6, 6) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 mm2 REG mm2 | |
N015 ( 1, 2) [000049] ------------ t49 = LCL_VAR double V05 cse0 mm0 (last use) REG mm0 <l:$1c1, c:$200> | |
N017 ( 1, 2) [000014] ------------ t14 = LCL_VAR double V01 arg1 u:2 mm1 (last use) REG mm1 $c0 | |
N019 ( 3, 4) [000015] -c---------- t15 = CNS_DBL double 100.00000000000000 REG NA $240 | |
/--* t14 double | |
+--* t15 double | |
N021 ( 40, 10) [000016] ------------ t16 = * DIV double REG mm1 $1c2 | |
/--* t49 double | |
+--* t16 double | |
N023 ( 46, 16) [000017] ----G------- t17 = * MUL double REG mm0 <l:$1c4, c:$1c3> | |
N025 ( 1, 2) [000012] ------------ t12 = LCL_VAR double V02 tmp0 u:2 mm2 (last use) REG mm2 <l:$1c1, c:$200> | |
/--* t17 double | |
+--* t12 double | |
N027 ( 52, 22) [000018] ----G------- t18 = * ADD double REG mm0 <l:$1c6, c:$1c5> | |
/--* t18 double | |
N029 ( 52, 22) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 mm0 REG mm0 | |
N031 ( 1, 1) [000001] ------------ t1 = LCL_VAR ref V00 this u:2 rcx (last use) REG rcx $80 | |
/--* t1 ref | |
N033 (???,???) [000052] -c---------- t52 = * LEA(b+8) byref REG NA | |
N035 ( 1, 2) [000031] ------------ t31 = LCL_VAR double V03 tmp1 u:2 mm0 (last use) REG mm0 <l:$1c6, c:$1c5> | |
/--* t52 byref | |
+--* t31 double | |
N037 (???,???) [000050] -A--GO------ * STOREIND double REG NA | |
N039 ( 0, 0) [000023] ------------ IL_OFFSET void IL offset: 0x1f REG NA | |
N041 ( 0, 0) [000022] ------------ RETURN void REG NA $300 | |
------------------------------------------------------------------------------------------------------------------- | |
Final allocation | |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ | |
LocRP# Name Type Action Reg |rax |rcx |rdx |rbx |rsp |rbp |rsi |rdi |r8 |r9 |r10 |r11 |r12 |r13 |r14 |r15 |mm0 |mm1 |mm2 | | |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ | |
0.#0 V0 Parm Alloc rcx |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----| | | | | |
0.#1 V1 Parm Alloc mm1 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----| |V1 a| | | |
1.#2 BB1 PredBB0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----| |V1 a| | | |
7.#3 V0 Use Keep rcx |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----| |V1 a| | | |
8.#4 I5 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|I5 a|V1 a| | | |
9.#5 I5 Use * Keep mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|I5 i|V1 a| | | |
10.#6 V5 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V5 a|V1 a| | | |
13.#7 V5 Use Keep mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V5 a|V1 a| | | |
14.#8 V2 Def Alloc mm2 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V5 a|V1 a|V2 a| | |
21.#9 V1 Use * Keep mm1 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V5 a|V1 i|V2 a| | |
22.#10 I6 Def Alloc mm1 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V5 a|I6 a|V2 a| | |
23.#11 V5 Use * Keep mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V5 i|I6 a|V2 a| | |
23.#12 I6 Use * Keep mm1 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----| |I6 i|V2 a| | |
24.#13 I7 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|I7 a| |V2 a| | |
27.#14 I7 Use * Keep mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|I7 i| |V2 a| | |
27.#15 V2 Use * Keep mm2 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----| | |V2 i| | |
28.#16 I8 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|I8 a| | | | |
29.#17 I8 Use * Keep mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|I8 i| | | | |
30.#18 V3 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V3 a| | | | |
37.#19 V0 Use * Keep rcx |----|V0 i|----|----|----|----|----|----|----|----|----|----|----|----|----|----|V3 a| | | | |
37.#20 V3 Use * Keep mm0 |----| |----|----|----|----|----|----|----|----|----|----|----|----|----|----|V3 i| | | | |
Recording the maximum number of concurrent spills: | |
---------- | |
LSRA Stats | |
---------- | |
Total Tracked Vars: 5 | |
Total Reg Cand Vars: 5 | |
Total number of Intervals: 8 | |
Total number of RefPositions: 20 | |
Total Spill Count: 0 Weighted: 0 | |
Total CopyReg Count: 0 Weighted: 0 | |
Total ResolutionMov Count: 0 Weighted: 0 | |
Total number of split edges: 0 | |
Total Number of spill temps created: 0 | |
TUPLE STYLE DUMP WITH REGISTER ASSIGNMENTS | |
Incoming Parameters: V00(rcx) V01(mm1) | |
BB01 [000..020) (return), preds={} succs={} | |
===== | |
N003. V00(rcx) | |
N005. LEA(b+8) | |
N007. mm0 = IND ; rcx | |
* N009. V05(mm0); mm0 | |
N011. V05(mm0) | |
* N013. V02(mm2); mm0 | |
N015. V05(mm0*) | |
N017. V01(mm1*) | |
N019. CNS_DBL 100.00000000000000 REG NA | |
N021. mm1 = DIV ; mm1* | |
N023. mm0 = MUL ; mm0*,mm1 | |
N025. V02(mm2*) | |
N027. mm0 = ADD ; mm0,mm2* | |
* N029. V03(mm0); mm0 | |
N031. V00(rcx*) | |
N033. LEA(b+8) | |
N035. V03(mm0*) | |
N037. STOREIND ; rcx*,mm0* | |
N039. IL_OFFSET IL offset: 0x1f REG NA | |
N041. RETURN | |
Var=Reg end of BB01: none | |
*************** In genGenerateCode() | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
Finalizing stack frame | |
Recording Var Locations at start of BB01 | |
V00(rcx) V01(mm1) | |
Modified regs: [rcx mm0-mm2] | |
Callee-saved registers pushed: 0 [] | |
*************** In lvaAssignFrameOffsets(FINAL_FRAME_LAYOUT) | |
; Final local variable assignments | |
; | |
; V00 this [V00,T00] ( 6, 6 ) ref -> rcx this class-hnd | |
; V01 arg1 [V01,T04] ( 4, 4 ) double -> mm1 | |
; V02 tmp0 [V02,T01] ( 4, 8 ) double -> mm2 | |
; V03 tmp1 [V03,T02] ( 4, 8 ) double -> mm0 | |
;# V04 OutArgs [V04 ] ( 1, 1 ) lclBlk ( 0) [rsp+0x00] | |
; V05 cse0 [V05,T03] ( 6, 6 ) double -> mm0 | |
; | |
; Lcl frame size = 0 | |
=============== Generating BB01 [000..020) (return), preds={} succs={} flags=0x00000000.40030020: i label target LIR | |
BB01 IN (2)={V00 V01} + ByrefExposed + GcHeap | |
OUT(0)={ } | |
Recording Var Locations at start of BB01 | |
V00(rcx) V01(mm1) | |
Change life 0000000000000000 {} -> 0000000000000011 {V00 V01} | |
V00 in reg rcx is becoming live [------] | |
Live regs: 00000000 {} => 00000002 {rcx} | |
V01 in reg mm1 is becoming live [------] | |
Live regs: 00000002 {rcx} => 00000002 {rcx xmm1} | |
Live regs: (unchanged) 00000002 {rcx xmm1} | |
GC regs: (unchanged) 00000002 {rcx} | |
Byref regs: (unchanged) 00000000 {} | |
L_M53085_BB01: | |
Label: IG02, GCvars=0000000000000000 {}, gcrefRegs=00000002 {rcx}, byrefRegs=00000000 {} | |
Setting stack level from -1 to 0 | |
Scope info: begin block BB01, IL range [000..020) | |
Scope info: open scopes = | |
0 (V00 this) [000..020) | |
1 (V01 arg1) [000..020) | |
Generating: N003 ( 1, 1) [000002] ------------ t2 = LCL_VAR ref V00 this u:2 rcx REG rcx $80 | |
/--* t2 ref | |
Generating: N005 (???,???) [000051] -c---------- t51 = * LEA(b+8) byref REG NA | |
/--* t51 byref | |
Generating: N007 ( 5, 4) [000025] ---XG------- t25 = * IND double REG mm0 <l:$1c1, c:$200> | |
IN0001: vmovsd xmm0, qword ptr [rcx+8] | |
/--* t25 double | |
Generating: N009 ( 5, 4) [000046] DA-XG------- * STORE_LCL_VAR double V05 cse0 mm0 REG mm0 | |
V05 in reg mm0 is becoming live [000046] | |
Live regs: 00000002 {rcx xmm1} => 00000002 {rcx xmm0 xmm1} | |
Live vars: {V00 V01} => {V00 V01 V05} | |
Generating: N011 ( 1, 2) [000047] ------------ t47 = LCL_VAR double V05 cse0 mm0 REG mm0 <l:$1c1, c:$200> | |
/--* t47 double | |
Generating: N013 ( 6, 6) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 mm2 REG mm2 | |
IN0002: vmovaps xmm2, xmm0 | |
V02 in reg mm2 is becoming live [000010] | |
Live regs: 00000002 {rcx xmm0 xmm1} => 00000002 {rcx xmm0 xmm1 xmm2} | |
Live vars: {V00 V01 V05} => {V00 V01 V02 V05} | |
Generating: N015 ( 1, 2) [000049] ------------ t49 = LCL_VAR double V05 cse0 mm0 (last use) REG mm0 <l:$1c1, c:$200> | |
Generating: N017 ( 1, 2) [000014] ------------ t14 = LCL_VAR double V01 arg1 u:2 mm1 (last use) REG mm1 $c0 | |
Generating: N019 ( 3, 4) [000015] -c---------- t15 = CNS_DBL double 100.00000000000000 REG NA $240 | |
/--* t14 double | |
+--* t15 double | |
Generating: N021 ( 40, 10) [000016] ------------ t16 = * DIV double REG mm1 $1c2 | |
V01 in reg mm1 is becoming dead [000014] | |
Live regs: 00000002 {rcx xmm0 xmm1 xmm2} => 00000002 {rcx xmm0 xmm2} | |
Live vars: {V00 V01 V02 V05} => {V00 V02 V05} | |
IN0003: vdivsd xmm1, qword ptr [reloc @RWD00] | |
/--* t49 double | |
+--* t16 double | |
Generating: N023 ( 46, 16) [000017] ----G------- t17 = * MUL double REG mm0 <l:$1c4, c:$1c3> | |
V05 in reg mm0 is becoming dead [000049] | |
Live regs: 00000002 {rcx xmm0 xmm2} => 00000002 {rcx xmm2} | |
Live vars: {V00 V02 V05} => {V00 V02} | |
IN0004: vmulsd xmm0, xmm1 | |
Generating: N025 ( 1, 2) [000012] ------------ t12 = LCL_VAR double V02 tmp0 u:2 mm2 (last use) REG mm2 <l:$1c1, c:$200> | |
/--* t17 double | |
+--* t12 double | |
Generating: N027 ( 52, 22) [000018] ----G------- t18 = * ADD double REG mm0 <l:$1c6, c:$1c5> | |
V02 in reg mm2 is becoming dead [000012] | |
Live regs: 00000002 {rcx xmm2} => 00000002 {rcx} | |
Live vars: {V00 V02} => {V00} | |
IN0005: vaddsd xmm0, xmm2 | |
/--* t18 double | |
Generating: N029 ( 52, 22) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 mm0 REG mm0 | |
V03 in reg mm0 is becoming live [000036] | |
Live regs: 00000002 {rcx} => 00000002 {rcx xmm0} | |
Live vars: {V00} => {V00 V03} | |
Generating: N031 ( 1, 1) [000001] ------------ t1 = LCL_VAR ref V00 this u:2 rcx (last use) REG rcx $80 | |
/--* t1 ref | |
Generating: N033 (???,???) [000052] -c---------- t52 = * LEA(b+8) byref REG NA | |
Generating: N035 ( 1, 2) [000031] ------------ t31 = LCL_VAR double V03 tmp1 u:2 mm0 (last use) REG mm0 <l:$1c6, c:$1c5> | |
/--* t52 byref | |
+--* t31 double | |
Generating: N037 (???,???) [000050] -A--GO------ * STOREIND double REG NA | |
V00 in reg rcx is becoming dead [000001] | |
Live regs: 00000002 {rcx xmm0} => 00000000 {xmm0} | |
Live vars: {V00 V03} => {V03} | |
GC regs: 00000002 {rcx} => 00000000 {} | |
V03 in reg mm0 is becoming dead [000031] | |
Live regs: 00000000 {xmm0} => 00000000 {} | |
Live vars: {V03} => {} | |
IN0006: vmovsd qword ptr [rcx+8], xmm0 | |
Added IP mapping: 0x001F STACK_EMPTY (G_M53085_IG02,ins#6,ofs#36) label | |
Generating: N039 ( 0, 0) [000023] ------------ IL_OFFSET void IL offset: 0x1f REG NA | |
Generating: N041 ( 0, 0) [000022] ------------ RETURN void REG NA $300 | |
Scope info: end block BB01, IL range [000..020) | |
Scope info: ending scope, LVnum=1 [000..020) | |
Scope info: ending scope, LVnum=0 [000..020) | |
Scope info: open scopes = | |
<none> | |
Added IP mapping: EPILOG STACK_EMPTY (G_M53085_IG02,ins#6,ofs#36) label | |
Reserving epilog IG for block BB01 | |
G_M53085_IG02: ; offs=000000H, funclet=00 | |
*************** After placeholder IG creation | |
G_M53085_IG01: ; func=00, offs=000000H, size=0000H, gcrefRegs=00000000 {} <-- Prolog IG | |
G_M53085_IG02: ; offs=000000H, size=0024H, gcrefRegs=00000002 {rcx}, byrefRegs=00000000 {}, byref | |
G_M53085_IG03: ; epilog placeholder, next placeholder=<END>, BB01 [0000], epilog, emitadd <-- First placeholder <-- Last placeholder | |
; PrevGCVars=0000000000000000 {}, PrevGCrefRegs=00000000 {}, PrevByrefRegs=00000000 {} | |
; InitGCVars=0000000000000000 {}, InitGCrefRegs=00000002 {rcx}, InitByrefRegs=00000000 {} | |
Liveness not changing: 0000000000000000 {} | |
# compCycleEstimate = 65, compSizeEstimate = 35 _1020.MethodAbove:RaiseValue(double):this | |
; Final local variable assignments | |
; | |
; V00 this [V00,T00] ( 6, 6 ) ref -> rcx this class-hnd | |
; V01 arg1 [V01,T04] ( 4, 4 ) double -> mm1 | |
; V02 tmp0 [V02,T01] ( 4, 8 ) double -> mm2 | |
; V03 tmp1 [V03,T02] ( 4, 8 ) double -> mm0 | |
;# V04 OutArgs [V04 ] ( 1, 1 ) lclBlk ( 0) [rsp+0x00] | |
; V05 cse0 [V05,T03] ( 6, 6 ) double -> mm0 | |
; | |
; Lcl frame size = 0 | |
*************** Before prolog / epilog generation | |
G_M53085_IG01: ; func=00, offs=000000H, size=0000H, gcrefRegs=00000000 {} <-- Prolog IG | |
G_M53085_IG02: ; offs=000000H, size=0024H, gcrefRegs=00000002 {rcx}, byrefRegs=00000000 {}, byref | |
G_M53085_IG03: ; epilog placeholder, next placeholder=<END>, BB01 [0000], epilog, emitadd <-- First placeholder <-- Last placeholder | |
; PrevGCVars=0000000000000000 {}, PrevGCrefRegs=00000000 {}, PrevByrefRegs=00000000 {} | |
; InitGCVars=0000000000000000 {}, InitGCrefRegs=00000002 {rcx}, InitByrefRegs=00000000 {} | |
Recording Var Locations at start of BB01 | |
V00(rcx) V01(mm1) | |
*************** In genFnProlog() | |
Added IP mapping to front: PROLOG STACK_EMPTY (G_M53085_IG01,ins#0,ofs#0) label | |
__prolog: | |
IN0007: vzeroupper | |
*************** In genFnPrologCalleeRegArgs() for int regs | |
*************** In genFnPrologCalleeRegArgs() for float regs | |
*************** In genEnregisterIncomingStackArgs() | |
G_M53085_IG01: ; offs=000000H, funclet=00 | |
*************** In genFnEpilog() | |
__epilog: | |
gcVarPtrSetCur=0000000000000000 {}, gcRegGCrefSetCur=00000002 {rcx}, gcRegByrefSetCur=00000000 {} | |
IN0008: ret | |
G_M53085_IG03: ; offs=000024H, funclet=00 | |
0 prologs, 1 epilogs, 0 funclet prologs, 0 funclet epilogs | |
*************** After prolog / epilog generation | |
G_M53085_IG01: ; func=00, offs=000000H, size=0003H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG | |
G_M53085_IG02: ; offs=000003H, size=0024H, gcrefRegs=00000002 {rcx}, byrefRegs=00000000 {}, byref | |
G_M53085_IG03: ; offs=000027H, size=0001H, epilog, nogc, emitadd | |
*************** In emitJumpDistBind() | |
Hot code size = 0x28 bytes | |
Cold code size = 0x0 bytes | |
reserveUnwindInfo(isFunclet=FALSE, isColdCode=FALSE, unwindSize=0x4) | |
*************** In emitEndCodeGen() | |
Converting emitMaxStackDepth from bytes (0) to elements (0) | |
*************************************************************************** | |
Instructions as they come out of the scheduler | |
G_M53085_IG01: ; func=00, offs=000000H, size=0003H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG | |
IN0007: 000000 C5F877 vzeroupper | |
G_M53085_IG02: ; func=00, offs=000003H, size=0024H, gcrefRegs=00000002 {rcx}, byrefRegs=00000000 {}, byref | |
New gcrReg live regs=00000002 {rcx} | |
gcrReg +[rcx] | |
IN0001: 000003 C4E17B104108 vmovsd xmm0, qword ptr [rcx+8] | |
IN0002: 000009 C4E17828D0 vmovaps xmm2, xmm0 | |
IN0003: 00000E C4E1735E0D11000000 vdivsd xmm1, qword ptr [reloc @RWD00] | |
IN0004: 000017 C4E17B59C1 vmulsd xmm0, xmm1 | |
IN0005: 00001C C4E17B58C2 vaddsd xmm0, xmm2 | |
IN0006: 000021 C4E17B114108 vmovsd qword ptr [rcx+8], xmm0 | |
G_M53085_IG03: ; func=00, offs=000027H, size=0001H, epilog, nogc, emitadd | |
IN0008: 000027 C3 ret | |
Emitting data sections: 8 total bytes | |
section 0, size 8, raw data | |
00 00 00 00 00 00 59 40 | |
New gcrReg live regs=00000000 {} | |
gcrReg -[rcx] | |
Allocated method code size = 40 , actual size = 40 | |
*************** After end code gen, before unwindEmit() | |
G_M53085_IG01: ; func=00, offs=000000H, size=0003H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG | |
IN0007: 000000 vzeroupper | |
G_M53085_IG02: ; offs=000003H, size=0024H, gcrefRegs=00000002 {rcx}, byrefRegs=00000000 {}, byref | |
IN0001: 000003 vmovsd xmm0, qword ptr [rcx+8] | |
IN0002: 000009 vmovaps xmm2, xmm0 | |
IN0003: 00000E vdivsd xmm1, qword ptr [reloc @RWD00] | |
IN0004: 000017 vmulsd xmm0, xmm1 | |
IN0005: 00001C vaddsd xmm0, xmm2 | |
IN0006: 000021 vmovsd qword ptr [rcx+8], xmm0 | |
G_M53085_IG03: ; offs=000027H, size=0001H, epilog, nogc, emitadd | |
IN0008: 000027 ret | |
Unwind Info: | |
>> Start offset : 0x000000 (not in unwind data) | |
>> End offset : 0x000028 (not in unwind data) | |
Version : 1 | |
Flags : 0x00 | |
SizeOfProlog : 0x00 | |
CountOfUnwindCodes: 0 | |
FrameRegister : none (0) | |
FrameOffset : N/A (no FrameRegister) (Value=0) | |
UnwindCodes : | |
allocUnwindInfo(pHotCode=0x00007FFC5C670D80, pColdCode=0x0000000000000000, startOffset=0x0, endOffset=0x28, unwindSize=0x4, pUnwindBlock=0x000001FFFE891904, funKind=0 (main function)) | |
*************** In genIPmappingGen() | |
IP mapping count : 3 | |
IL offs PROLOG : 0x00000000 ( STACK_EMPTY ) | |
IL offs 0x001F : 0x00000027 ( STACK_EMPTY ) | |
IL offs EPILOG : 0x00000027 ( STACK_EMPTY ) | |
*************** In genSetScopeInfo() | |
VarLocInfo count is 4 | |
*************** Variable debug info | |
4 vars | |
1( UNKNOWN) : From 00000000h to 00000003h, in mm1 | |
0( UNKNOWN) : From 00000000h to 00000003h, in rcx | |
1( UNKNOWN) : From 00000003h to 0000000Eh, in mm1 | |
0( UNKNOWN) : From 00000003h to 00000021h, in rcx | |
*************** In gcInfoBlockHdrSave() | |
Set code length to 40. | |
Set ReturnKind to Scalar. | |
Set Outgoing stack arg area size to 0. | |
Defining 0 call sites: | |
Method code size: 40 | |
Allocations for _1020.MethodAbove:RaiseValue(double):this (MethodHash=a9a18473) | |
count: 498, size: 54137, max = 3264 | |
allocateMemory: 131072, nraUsed: 88360 | |
Alloc'd bytes by kind: | |
kind | size | pct | |
---------------------+------------+-------- | |
AssertionProp | 6460 | 11.93% | |
ASTNode | 6712 | 12.40% | |
InstDesc | 2296 | 4.24% | |
ImpStack | 0 | 0.00% | |
BasicBlock | 856 | 1.58% | |
fgArgInfo | 0 | 0.00% | |
fgArgInfoPtrArr | 0 | 0.00% | |
FlowList | 0 | 0.00% | |
TreeStatementList | 64 | 0.12% | |
SiScope | 272 | 0.50% | |
FlatFPStateX87 | 0 | 0.00% | |
DominatorMemory | 48 | 0.09% | |
LSRA | 3104 | 5.73% | |
LSRA_Interval | 792 | 1.46% | |
LSRA_RefPosition | 1344 | 2.48% | |
Reachability | 16 | 0.03% | |
SSA | 772 | 1.43% | |
ValueNumber | 11922 | 22.02% | |
LvaTable | 2264 | 4.18% | |
UnwindInfo | 0 | 0.00% | |
hashBv | 40 | 0.07% | |
bitset | 0 | 0.00% | |
FixedBitVect | 0 | 0.00% | |
AsIAllocator | 1576 | 2.91% | |
IndirAssignMap | 64 | 0.12% | |
FieldSeqStore | 200 | 0.37% | |
ZeroOffsetFieldMap | 64 | 0.12% | |
ArrayInfoMap | 64 | 0.12% | |
MemoryPhiArg | 0 | 0.00% | |
CSE | 1360 | 2.51% | |
GC | 1312 | 2.42% | |
CorSig | 312 | 0.58% | |
Inlining | 1864 | 3.44% | |
ArrayStack | 0 | 0.00% | |
DebugInfo | 216 | 0.40% | |
DebugOnly | 9766 | 18.04% | |
Codegen | 0 | 0.00% | |
LoopOpt | 0 | 0.00% | |
LoopHoist | 0 | 0.00% | |
Unknown | 377 | 0.70% | |
****** DONE compiling _1020.MethodAbove:RaiseValue(double):this | |
fin |
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****** START compiling _1020.MethodBelow:RaiseValue(double):this (MethodHash=aa0b1cbf) | |
Generating code for Windows x86 | |
OPTIONS: compCodeOpt = BLENDED_CODE | |
OPTIONS: compDbgCode = false | |
OPTIONS: compDbgInfo = true | |
OPTIONS: compDbgEnC = false | |
OPTIONS: compProcedureSplitting = false | |
OPTIONS: compProcedureSplittingEH = false | |
OPTIONS: Stack probing is DISABLED | |
IL to import: | |
IL_0000 02 ldarg.0 | |
IL_0001 02 ldarg.0 | |
IL_0002 28 02 00 00 06 call 0x6000002 | |
IL_0007 02 ldarg.0 | |
IL_0008 28 02 00 00 06 call 0x6000002 | |
IL_000d 03 ldarg.1 | |
IL_000e 23 00 00 00 00 00 00 59 40 ldc.r8 100.000000 | |
IL_0017 5b div | |
IL_0018 5a mul | |
IL_0019 58 add | |
IL_001a 28 03 00 00 06 call 0x6000003 | |
IL_001f 2a ret | |
lvaSetClass: setting class for V00 to (030E517C) _1020.MethodBelow | |
Set preferred register for V00 to [ecx] | |
'this' passed in register ecx | |
; Initial local variable assignments | |
; | |
; V00 this ref this class-hnd | |
; V01 arg1 double | |
*************** In compInitDebuggingInfo() for _1020.MethodBelow:RaiseValue(double):this | |
getVars() returned cVars = 0, extendOthers = true | |
info.compVarScopesCount = 2 | |
VarNum LVNum Name Beg End | |
0: 00h 00h V00 this 000h 020h | |
1: 01h 01h V01 arg1 000h 020h | |
info.compStmtOffsetsCount = 0 | |
info.compStmtOffsetsImplicit = 0005h ( STACK_EMPTY CALL_SITE ) | |
*************** In fgFindBasicBlocks() for _1020.MethodBelow:RaiseValue(double):this | |
Jump targets: | |
none | |
New Basic Block BB01 [0000] created. | |
BB01 [000..020) | |
IL Code Size,Instr 32, 12, Basic Block count 1, Local Variable Num,Ref count 2, 4 for method _1020.MethodBelow:RaiseValue(double):this | |
OPTIONS: opts.MinOpts() == false | |
Basic block list for '_1020.MethodBelow:RaiseValue(double):this' | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In impImport() for _1020.MethodBelow:RaiseValue(double):this | |
impImportBlockPending for BB01 | |
Importing BB01 (PC=000) of '_1020.MethodBelow:RaiseValue(double):this' | |
[ 0] 0 (0x000) ldarg.0 | |
[ 1] 1 (0x001) ldarg.0 | |
[ 2] 2 (0x002) call 06000002 | |
In Compiler::impImportCall: opcode is call, kind=0, callRetType is double, structSize is 0 | |
[000004] ------------ * STMT void (IL 0x000... ???) | |
[000003] I-C-G------- \--* CALL double _1020.MethodBelow.get_Value (exactContextHnd=0x030E517D) | |
[000002] ------------ this in ecx \--* LCL_VAR ref V00 this | |
[ 2] 7 (0x007) ldarg.0 | |
[ 3] 8 (0x008) call 06000002 | |
In Compiler::impImportCall: opcode is call, kind=0, callRetType is double, structSize is 0 | |
lvaGrabTemp returning 2 (V02 tmp0) called for impAppendStmt. | |
[000011] ------------ * STMT void (IL ???... ???) | |
[000005] --C--------- | /--* RET_EXPR double(inl return from call [000003]) | |
[000010] -AC--------- \--* ASG double | |
[000009] D------N---- \--* LCL_VAR double V02 tmp0 | |
[000008] ------------ * STMT void (IL ???... ???) | |
[000007] I-C-G------- \--* CALL double _1020.MethodBelow.get_Value (exactContextHnd=0x030E517D) | |
[000006] ------------ this in ecx \--* LCL_VAR ref V00 this | |
[ 3] 13 (0x00d) ldarg.1 | |
[ 4] 14 (0x00e) ldc.r8 100.00000000000000 | |
[ 5] 23 (0x017) div | |
[ 4] 24 (0x018) mul | |
[ 3] 25 (0x019) add | |
[ 2] 26 (0x01a) call 06000003 | |
In Compiler::impImportCall: opcode is call, kind=0, callRetType is void, structSize is 0 | |
[000021] ------------ * STMT void (IL ???... ???) | |
[000019] I-C-G------- \--* CALL void _1020.MethodBelow.set_Value (exactContextHnd=0x030E517D) | |
[000001] ------------ this in ecx +--* LCL_VAR ref V00 this | |
[000015] ------------ | /--* CNS_DBL double 100.00000000000000 | |
[000016] ------------ | /--* DIV double | |
[000014] ------------ | | \--* LCL_VAR double V01 arg1 | |
[000017] --C--------- | /--* MUL double | |
[000013] --C--------- | | \--* RET_EXPR double(inl return from call [000007]) | |
[000018] --C--------- arg1 \--* ADD double | |
[000012] ------------ \--* LCL_VAR double V02 tmp0 | |
[ 0] 31 (0x01f) ret | |
[000023] ------------ * STMT void (IL 0x01F... ???) | |
[000022] ------------ \--* RETURN void | |
New BlockSet epoch 1, # of blocks (including unused BB00): 2, bitset array size: 1 (short) | |
*************** In fgMorph() | |
*************** In fgDebugCheckBBlist | |
*************** In fgInline() | |
Expanding INLINE_CANDIDATE in statement [000004] in BB01: | |
[000004] ------------ * STMT void (IL 0x000...0x01F) | |
[000003] I-C-G------- \--* CALL double _1020.MethodBelow.get_Value (exactContextHnd=0x030E517D) | |
[000002] ------------ this in ecx \--* LCL_VAR ref V00 this | |
thisArg: is a local var | |
[000002] ------------ * LCL_VAR ref V00 this | |
INLINER: inlineInfo.tokenLookupContextHandle for _1020.MethodBelow:get_Value():double:this set to 0x030E517D: | |
Invoking compiler for the inlinee method _1020.MethodBelow:get_Value():double:this : | |
IL to import: | |
IL_0000 02 ldarg.0 | |
IL_0001 7b 01 00 00 04 ldfld 0x4000001 | |
IL_0006 2a ret | |
INLINER impTokenLookupContextHandle for _1020.MethodBelow:get_Value():double:this is 0x030E517D. | |
*************** In fgFindBasicBlocks() for _1020.MethodBelow:get_Value():double:this | |
Jump targets: | |
none | |
New Basic Block BB02 [0001] created. | |
BB02 [000..007) | |
Basic block list for '_1020.MethodBelow:get_Value():double:this' | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB02 [0001] 1 1 [000..007) (return) | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In impImport() for _1020.MethodBelow:get_Value():double:this | |
impImportBlockPending for BB02 | |
Importing BB02 (PC=000) of '_1020.MethodBelow:get_Value():double:this' | |
[ 0] 0 (0x000) ldarg.0 | |
[ 1] 1 (0x001) ldfld 04000001 | |
[ 1] 6 (0x006) ret | |
Inlinee Return expression (before normalization) => | |
[000025] ---XG------- * FIELD double _value | |
[000002] ------------ \--* LCL_VAR ref V00 this | |
Inlinee Return expression (after normalization) => | |
[000025] ---XG------- * FIELD double _value | |
[000002] ------------ \--* LCL_VAR ref V00 this | |
----------- Statements (and blocks) added due to the inlining of call [000003] ----------- | |
Arguments setup: | |
Inlinee method body:fgInlineAppendStatements: no gc ref inline locals. | |
Return expression for call at [000003] is | |
[000025] ---XG------- * FIELD double _value | |
[000002] ------------ \--* LCL_VAR ref V00 this | |
Successfully inlined _1020.MethodBelow:get_Value():double:this (7 IL bytes) (depth 1) [below ALWAYS_INLINE size] | |
-------------------------------------------------------------------------------------------- | |
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for '_1020.MethodBelow:RaiseValue(double):this' calling '_1020.MethodBelow:get_Value():double:this' | |
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' | |
Replacing the return expression placeholder [000005] with [000025] | |
[000005] --C--------- * RET_EXPR double(inl return from call [000025]) | |
Inserting the inline return expression | |
[000025] ---XG------- * FIELD double _value | |
[000002] ------------ \--* LCL_VAR ref V00 this | |
Expanding INLINE_CANDIDATE in statement [000008] in BB01: | |
[000008] ------------ * STMT void (IL ???... ???) | |
[000007] I-C-G------- \--* CALL double _1020.MethodBelow.get_Value (exactContextHnd=0x030E517D) | |
[000006] ------------ this in ecx \--* LCL_VAR ref V00 this | |
thisArg: is a local var | |
[000006] ------------ * LCL_VAR ref V00 this | |
INLINER: inlineInfo.tokenLookupContextHandle for _1020.MethodBelow:get_Value():double:this set to 0x030E517D: | |
Invoking compiler for the inlinee method _1020.MethodBelow:get_Value():double:this : | |
IL to import: | |
IL_0000 02 ldarg.0 | |
IL_0001 7b 01 00 00 04 ldfld 0x4000001 | |
IL_0006 2a ret | |
INLINER impTokenLookupContextHandle for _1020.MethodBelow:get_Value():double:this is 0x030E517D. | |
*************** In fgFindBasicBlocks() for _1020.MethodBelow:get_Value():double:this | |
Jump targets: | |
none | |
New Basic Block BB03 [0002] created. | |
BB03 [000..007) | |
Basic block list for '_1020.MethodBelow:get_Value():double:this' | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB03 [0002] 1 1 [000..007) (return) | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In impImport() for _1020.MethodBelow:get_Value():double:this | |
impImportBlockPending for BB03 | |
Importing BB03 (PC=000) of '_1020.MethodBelow:get_Value():double:this' | |
[ 0] 0 (0x000) ldarg.0 | |
[ 1] 1 (0x001) ldfld 04000001 | |
[ 1] 6 (0x006) ret | |
Inlinee Return expression (before normalization) => | |
[000028] ---XG------- * FIELD double _value | |
[000006] ------------ \--* LCL_VAR ref V00 this | |
Inlinee Return expression (after normalization) => | |
[000028] ---XG------- * FIELD double _value | |
[000006] ------------ \--* LCL_VAR ref V00 this | |
----------- Statements (and blocks) added due to the inlining of call [000007] ----------- | |
Arguments setup: | |
Inlinee method body:fgInlineAppendStatements: no gc ref inline locals. | |
Return expression for call at [000007] is | |
[000028] ---XG------- * FIELD double _value | |
[000006] ------------ \--* LCL_VAR ref V00 this | |
Successfully inlined _1020.MethodBelow:get_Value():double:this (7 IL bytes) (depth 1) [below ALWAYS_INLINE size] | |
-------------------------------------------------------------------------------------------- | |
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for '_1020.MethodBelow:RaiseValue(double):this' calling '_1020.MethodBelow:get_Value():double:this' | |
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' | |
Expanding INLINE_CANDIDATE in statement [000021] in BB01: | |
[000021] ------------ * STMT void (IL ???... ???) | |
[000019] I-C-G------- \--* CALL void _1020.MethodBelow.set_Value (exactContextHnd=0x030E517D) | |
[000001] ------------ this in ecx +--* LCL_VAR ref V00 this | |
[000015] ------------ | /--* CNS_DBL double 100.00000000000000 | |
[000016] ------------ | /--* DIV double | |
[000014] ------------ | | \--* LCL_VAR double V01 arg1 | |
[000017] --C--------- | /--* MUL double | |
[000013] --C--------- | | \--* RET_EXPR double(inl return from call [000028]) | |
[000018] --C--------- arg1 \--* ADD double | |
[000012] ------------ \--* LCL_VAR double V02 tmp0 | |
thisArg: is a local var | |
[000001] ------------ * LCL_VAR ref V00 this | |
Argument #1: has side effects | |
[000015] ------------ /--* CNS_DBL double 100.00000000000000 | |
[000016] ------------ /--* DIV double | |
[000014] ------------ | \--* LCL_VAR double V01 arg1 | |
[000017] --C--------- /--* MUL double | |
[000013] --C--------- | \--* RET_EXPR double(inl return from call [000028]) | |
[000018] --C--------- * ADD double | |
[000012] ------------ \--* LCL_VAR double V02 tmp0 | |
INLINER: inlineInfo.tokenLookupContextHandle for _1020.MethodBelow:set_Value(double):this set to 0x030E517D: | |
Invoking compiler for the inlinee method _1020.MethodBelow:set_Value(double):this : | |
IL to import: | |
IL_0000 02 ldarg.0 | |
IL_0001 03 ldarg.1 | |
IL_0002 7d 01 00 00 04 stfld 0x4000001 | |
IL_0007 2a ret | |
INLINER impTokenLookupContextHandle for _1020.MethodBelow:set_Value(double):this is 0x030E517D. | |
*************** In fgFindBasicBlocks() for _1020.MethodBelow:set_Value(double):this | |
Jump targets: | |
none | |
New Basic Block BB04 [0003] created. | |
BB04 [000..008) | |
Basic block list for '_1020.MethodBelow:set_Value(double):this' | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB04 [0003] 1 1 [000..008) (return) | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In impImport() for _1020.MethodBelow:set_Value(double):this | |
impImportBlockPending for BB04 | |
Importing BB04 (PC=000) of '_1020.MethodBelow:set_Value(double):this' | |
[ 0] 0 (0x000) ldarg.0 | |
[ 1] 1 (0x001) ldarg.1 | |
lvaGrabTemp returning 3 (V03 tmp1) called for Inlining Arg. | |
[ 2] 2 (0x002) stfld 04000001 | |
[000034] ------------ * STMT void | |
[000031] ------------ | /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG------- \--* ASG double | |
[000032] ---XG--N---- \--* FIELD double _value | |
[000001] ------------ \--* LCL_VAR ref V00 this | |
[ 0] 7 (0x007) ret | |
----------- Statements (and blocks) added due to the inlining of call [000019] ----------- | |
Arguments setup: | |
[000037] ------------ * STMT void (IL ???... ???) | |
[000015] ------------ | /--* CNS_DBL double 100.00000000000000 | |
[000016] ------------ | /--* DIV double | |
[000014] ------------ | | \--* LCL_VAR double V01 arg1 | |
[000017] --C--------- | /--* MUL double | |
[000013] --C--------- | | \--* RET_EXPR double(inl return from call [000028]) | |
[000018] --C--------- | /--* ADD double | |
[000012] ------------ | | \--* LCL_VAR double V02 tmp0 | |
[000036] -AC--------- \--* ASG double | |
[000035] D------N---- \--* LCL_VAR double V03 tmp1 | |
Inlinee method body: | |
[000034] ------------ * STMT void (IL ???... ???) | |
[000031] ------------ | /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG------- \--* ASG double | |
[000032] ---XG--N---- \--* FIELD double _value | |
[000001] ------------ \--* LCL_VAR ref V00 this | |
fgInlineAppendStatements: no gc ref inline locals. | |
Successfully inlined _1020.MethodBelow:set_Value(double):this (8 IL bytes) (depth 1) [below ALWAYS_INLINE size] | |
-------------------------------------------------------------------------------------------- | |
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for '_1020.MethodBelow:RaiseValue(double):this' calling '_1020.MethodBelow:set_Value(double):this' | |
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' | |
Replacing the return expression placeholder [000013] with [000028] | |
[000013] --C--------- * RET_EXPR double(inl return from call [000028]) | |
Inserting the inline return expression | |
[000028] ---XG------- * FIELD double _value | |
[000006] ------------ \--* LCL_VAR ref V00 this | |
*************** After fgInline() | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
[000011] ------------ * STMT void (IL ???... ???) | |
[000025] ---XG------- | /--* FIELD double _value | |
[000002] ------------ | | \--* LCL_VAR ref V00 this | |
[000010] -AC--------- \--* ASG double | |
[000009] D------N---- \--* LCL_VAR double V02 tmp0 | |
***** BB01, stmt 2 | |
[000037] ------------ * STMT void (IL ???... ???) | |
[000015] ------------ | /--* CNS_DBL double 100.00000000000000 | |
[000016] ------------ | /--* DIV double | |
[000014] ------------ | | \--* LCL_VAR double V01 arg1 | |
[000017] --C--------- | /--* MUL double | |
[000028] ---XG------- | | \--* FIELD double _value | |
[000006] ------------ | | \--* LCL_VAR ref V00 this | |
[000018] --C--------- | /--* ADD double | |
[000012] ------------ | | \--* LCL_VAR double V02 tmp0 | |
[000036] -AC--------- \--* ASG double | |
[000035] D------N---- \--* LCL_VAR double V03 tmp1 | |
***** BB01, stmt 3 | |
[000034] ------------ * STMT void (IL ???... ???) | |
[000031] ------------ | /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG------- \--* ASG double | |
[000032] ---XG--N---- \--* FIELD double _value | |
[000001] ------------ \--* LCL_VAR ref V00 this | |
***** BB01, stmt 4 | |
[000023] ------------ * STMT void (IL 0x01F... ???) | |
[000022] ------------ \--* RETURN void | |
------------------------------------------------------------------------------------------------------------------- | |
*************** Exception Handling table is empty | |
**************** Inline Tree | |
Inlines into 06000004 _1020.MethodBelow:RaiseValue(double):this | |
[1 IL=0002 TR=000003 06000002] [below ALWAYS_INLINE size] _1020.MethodBelow:get_Value():double:this | |
[2 IL=0008 TR=000007 06000002] [below ALWAYS_INLINE size] _1020.MethodBelow:get_Value():double:this | |
[3 IL=0026 TR=000019 06000003] [below ALWAYS_INLINE size] _1020.MethodBelow:set_Value(double):this | |
Budget: initialTime=156, finalTime=158, initialBudget=1560, currentBudget=1560 | |
Budget: initialSize=860, finalSize=860 | |
*************** After fgAddInternal() | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** Exception Handling table is empty | |
*************** In fgDebugCheckBBlist | |
*************** In fgRemoveEmptyTry() | |
No EH in this method, nothing to remove. | |
*************** In fgRemoveEmptyFinally() | |
No EH in this method, nothing to remove. | |
*************** In fgMergeFinallyChains() | |
No EH in this method, nothing to merge. | |
*************** In fgCloneFinally() | |
No EH in this method, no cloning. | |
*************** In fgPromoteStructs() | |
lvaTable before fgPromoteStructs | |
; Initial local variable assignments | |
; | |
; V00 this ref this class-hnd | |
; V01 arg1 double | |
; V02 tmp0 double | |
; V03 tmp1 double | |
lvaTable after fgPromoteStructs | |
; Initial local variable assignments | |
; | |
; V00 this ref this class-hnd | |
; V01 arg1 double | |
; V02 tmp0 double | |
; V03 tmp1 double | |
*************** In fgMarkAddressExposedLocals() | |
*************** In fgMorphBlocks() | |
Morphing BB01 of '_1020.MethodBelow:RaiseValue(double):this' | |
fgMorphTree BB01, stmt 1 (before) | |
[000025] ---XG------- /--* FIELD double _value | |
[000002] ------------ | \--* LCL_VAR ref V00 this | |
[000010] -AC--------- * ASG double | |
[000009] D------N---- \--* LCL_VAR double V02 tmp0 | |
GenTreeNode creates assertion: | |
[000025] ---XG------- * IND double | |
In BB01 New Local Constant Assertion: V00 != null index=#01, mask=0000000000000001 | |
fgMorphTree BB01, stmt 1 (after) | |
[000025] ---XG+------ /--* IND double | |
[000039] -----+------ | | /--* CNS_INT int 4 field offset Fseq[_value] | |
[000040] -----+------ | \--* ADD byref | |
[000002] -----+------ | \--* LCL_VAR ref V00 this | |
[000010] -A-XG+------ * ASG double | |
[000009] D----+-N---- \--* LCL_VAR double V02 tmp0 | |
fgMorphTree BB01, stmt 2 (before) | |
[000015] ------------ /--* CNS_DBL double 100.00000000000000 | |
[000016] ------------ /--* DIV double | |
[000014] ------------ | \--* LCL_VAR double V01 arg1 | |
[000017] --C--------- /--* MUL double | |
[000028] ---XG------- | \--* FIELD double _value | |
[000006] ------------ | \--* LCL_VAR ref V00 this | |
[000018] --C--------- /--* ADD double | |
[000012] ------------ | \--* LCL_VAR double V02 tmp0 | |
[000036] -AC--------- * ASG double | |
[000035] D------N---- \--* LCL_VAR double V03 tmp1 | |
fgMorphTree BB01, stmt 2 (after) | |
[000015] -----+------ /--* CNS_DBL double 100.00000000000000 | |
[000016] -----+------ /--* DIV double | |
[000014] -----+------ | \--* LCL_VAR double V01 arg1 | |
[000017] ---XG+------ /--* MUL double | |
[000028] ---XG+------ | \--* IND double | |
[000041] -----+------ | | /--* CNS_INT int 4 field offset Fseq[_value] | |
[000042] -----+------ | \--* ADD byref | |
[000006] -----+------ | \--* LCL_VAR ref V00 this | |
[000018] ---XG+------ /--* ADD double | |
[000012] -----+------ | \--* LCL_VAR double V02 tmp0 | |
[000036] -A-XG+------ * ASG double | |
[000035] D----+-N---- \--* LCL_VAR double V03 tmp1 | |
fgMorphTree BB01, stmt 3 (before) | |
[000031] ------------ /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG------- * ASG double | |
[000032] ---XG--N---- \--* FIELD double _value | |
[000001] ------------ \--* LCL_VAR ref V00 this | |
fgMorphTree BB01, stmt 3 (after) | |
[000031] -----+------ /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG+------ * ASG double | |
[000032] ---XG+-N---- \--* IND double | |
[000043] -----+------ | /--* CNS_INT int 4 field offset Fseq[_value] | |
[000044] -----+------ \--* ADD byref | |
[000001] -----+------ \--* LCL_VAR ref V00 this | |
fgMorphTree BB01, stmt 4 (before) | |
[000022] ------------ * RETURN void | |
Renumbering the basic blocks for fgComputePred | |
*************** Before renumbering the basic blocks | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** Exception Handling table is empty | |
*************** After renumbering the basic blocks | |
=============== No blocks renumbered! | |
New BlockSet epoch 2, # of blocks (including unused BB00): 2, bitset array size: 1 (short) | |
*************** In fgComputePreds() | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** After fgComputePreds() | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In fgComputeEdgeWeights() | |
fgComputeEdgeWeights() we do not have any profile data so we are not using the edge weights | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
fgComputeEdgeWeights() was able to compute exact edge weights for all of the 0 edges, using 1 passes. | |
*************** In optOptimizeLayout() | |
*************** Exception Handling table is empty | |
*************** In fgDebugCheckBBlist | |
*************** In fgUpdateFlowGraph() | |
Before updating the flow graph: | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
*************** In fgUpdateFlowGraph() | |
Before updating the flow graph: | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
*************** In fgComputeReachability | |
*************** In fgDebugCheckBBlist | |
Renumbering the basic blocks for fgComputeReachability pass #1 | |
*************** Before renumbering the basic blocks | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** Exception Handling table is empty | |
*************** After renumbering the basic blocks | |
=============== No blocks renumbered! | |
Enter blocks: BB01 | |
After computing reachability sets: | |
------------------------------------------------ | |
BBnum Reachable by | |
------------------------------------------------ | |
BB01 : BB01 | |
After computing reachability: | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
*************** In fgComputeDoms | |
*************** In fgDebugCheckBBlist | |
Dominator computation start blocks (those blocks with no incoming edges): | |
BB01 | |
------------------------------------------------ | |
BBnum Dominated by | |
------------------------------------------------ | |
BB01: BB01 | |
Inside fgBuildDomTree | |
After computing the Dominance Tree: | |
*************** In Allocate Objects | |
Trees before Allocate Objects | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
[000011] ------------ * STMT void (IL ???... ???) | |
[000025] ---XG+------ | /--* IND double | |
[000039] -----+------ | | | /--* CNS_INT int 4 field offset Fseq[_value] | |
[000040] -----+------ | | \--* ADD byref | |
[000002] -----+------ | | \--* LCL_VAR ref V00 this | |
[000010] -A-XG+------ \--* ASG double | |
[000009] D----+-N---- \--* LCL_VAR double V02 tmp0 | |
***** BB01, stmt 2 | |
[000037] ------------ * STMT void (IL ???... ???) | |
[000015] -----+------ | /--* CNS_DBL double 100.00000000000000 | |
[000016] -----+------ | /--* DIV double | |
[000014] -----+------ | | \--* LCL_VAR double V01 arg1 | |
[000017] ---XG+------ | /--* MUL double | |
[000028] ---XG+------ | | \--* IND double | |
[000041] -----+------ | | | /--* CNS_INT int 4 field offset Fseq[_value] | |
[000042] -----+------ | | \--* ADD byref | |
[000006] -----+------ | | \--* LCL_VAR ref V00 this | |
[000018] ---XG+------ | /--* ADD double | |
[000012] -----+------ | | \--* LCL_VAR double V02 tmp0 | |
[000036] -A-XG+------ \--* ASG double | |
[000035] D----+-N---- \--* LCL_VAR double V03 tmp1 | |
***** BB01, stmt 3 | |
[000034] ------------ * STMT void (IL ???... ???) | |
[000031] -----+------ | /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG+------ \--* ASG double | |
[000032] ---XG+-N---- \--* IND double | |
[000043] -----+------ | /--* CNS_INT int 4 field offset Fseq[_value] | |
[000044] -----+------ \--* ADD byref | |
[000001] -----+------ \--* LCL_VAR ref V00 this | |
***** BB01, stmt 4 | |
[000023] ------------ * STMT void (IL 0x01F... ???) | |
[000022] -----+------ \--* RETURN void | |
------------------------------------------------------------------------------------------------------------------- | |
*************** Exiting Allocate Objects | |
Trees after Allocate Objects | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
[000011] ------------ * STMT void (IL ???... ???) | |
[000025] ---XG+------ | /--* IND double | |
[000039] -----+------ | | | /--* CNS_INT int 4 field offset Fseq[_value] | |
[000040] -----+------ | | \--* ADD byref | |
[000002] -----+------ | | \--* LCL_VAR ref V00 this | |
[000010] -A-XG+------ \--* ASG double | |
[000009] D----+-N---- \--* LCL_VAR double V02 tmp0 | |
***** BB01, stmt 2 | |
[000037] ------------ * STMT void (IL ???... ???) | |
[000015] -----+------ | /--* CNS_DBL double 100.00000000000000 | |
[000016] -----+------ | /--* DIV double | |
[000014] -----+------ | | \--* LCL_VAR double V01 arg1 | |
[000017] ---XG+------ | /--* MUL double | |
[000028] ---XG+------ | | \--* IND double | |
[000041] -----+------ | | | /--* CNS_INT int 4 field offset Fseq[_value] | |
[000042] -----+------ | | \--* ADD byref | |
[000006] -----+------ | | \--* LCL_VAR ref V00 this | |
[000018] ---XG+------ | /--* ADD double | |
[000012] -----+------ | | \--* LCL_VAR double V02 tmp0 | |
[000036] -A-XG+------ \--* ASG double | |
[000035] D----+-N---- \--* LCL_VAR double V03 tmp1 | |
***** BB01, stmt 3 | |
[000034] ------------ * STMT void (IL ???... ???) | |
[000031] -----+------ | /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG+------ \--* ASG double | |
[000032] ---XG+-N---- \--* IND double | |
[000043] -----+------ | /--* CNS_INT int 4 field offset Fseq[_value] | |
[000044] -----+------ \--* ADD byref | |
[000001] -----+------ \--* LCL_VAR ref V00 this | |
***** BB01, stmt 4 | |
[000023] ------------ * STMT void (IL 0x01F... ???) | |
[000022] -----+------ \--* RETURN void | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
*************** In optOptimizeLoops() | |
*************** In fgDebugCheckBBlist | |
*************** In optCloneLoops() | |
*************** In lvaMarkLocalVars() | |
*** marking local variables in block BB01 (weight=1 ) | |
[000011] ------------ * STMT void (IL ???... ???) | |
[000025] ---XG+------ | /--* IND double | |
[000039] -----+------ | | | /--* CNS_INT int 4 field offset Fseq[_value] | |
[000040] -----+------ | | \--* ADD byref | |
[000002] -----+------ | | \--* LCL_VAR ref V00 this | |
[000010] -A-XG+------ \--* ASG double | |
[000009] D----+-N---- \--* LCL_VAR double V02 tmp0 | |
New refCnts for V02: refCnt = 1, refCntWtd = 2 | |
New refCnts for V00: refCnt = 1, refCntWtd = 1 | |
[000037] ------------ * STMT void (IL ???... ???) | |
[000015] -----+------ | /--* CNS_DBL double 100.00000000000000 | |
[000016] -----+------ | /--* DIV double | |
[000014] -----+------ | | \--* LCL_VAR double V01 arg1 | |
[000017] ---XG+------ | /--* MUL double | |
[000028] ---XG+------ | | \--* IND double | |
[000041] -----+------ | | | /--* CNS_INT int 4 field offset Fseq[_value] | |
[000042] -----+------ | | \--* ADD byref | |
[000006] -----+------ | | \--* LCL_VAR ref V00 this | |
[000018] ---XG+------ | /--* ADD double | |
[000012] -----+------ | | \--* LCL_VAR double V02 tmp0 | |
[000036] -A-XG+------ \--* ASG double | |
[000035] D----+-N---- \--* LCL_VAR double V03 tmp1 | |
New refCnts for V03: refCnt = 1, refCntWtd = 2 | |
New refCnts for V02: refCnt = 2, refCntWtd = 4 | |
New refCnts for V00: refCnt = 2, refCntWtd = 2 | |
New refCnts for V01: refCnt = 1, refCntWtd = 1 | |
[000034] ------------ * STMT void (IL ???... ???) | |
[000031] -----+------ | /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG+------ \--* ASG double | |
[000032] ---XG+-N---- \--* IND double | |
[000043] -----+------ | /--* CNS_INT int 4 field offset Fseq[_value] | |
[000044] -----+------ \--* ADD byref | |
[000001] -----+------ \--* LCL_VAR ref V00 this | |
New refCnts for V00: refCnt = 3, refCntWtd = 3 | |
New refCnts for V03: refCnt = 2, refCntWtd = 4 | |
[000023] ------------ * STMT void (IL 0x01F... ???) | |
[000022] -----+------ \--* RETURN void | |
New refCnts for V00: refCnt = 4, refCntWtd = 4 | |
New refCnts for V00: refCnt = 5, refCntWtd = 5 | |
*************** In optAddCopies() | |
refCnt table for 'RaiseValue': | |
V00 this [ ref]: refCnt = 5, refCntWtd = 5 pref [ecx] | |
V02 tmp0 [double]: refCnt = 2, refCntWtd = 4 | |
V03 tmp1 [double]: refCnt = 2, refCntWtd = 4 | |
V01 arg1 [double]: refCnt = 1, refCntWtd = 1 | |
*************** In optOptimizeBools() | |
*************** In fgDebugCheckBBlist | |
*************** In fgFindOperOrder() | |
*************** In fgSetBlockOrder() | |
The biggest BB has 12 tree nodes | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
( 9, 7) [000011] ------------ * STMT void (IL ???... ???) | |
N004 ( 5, 4) [000025] ---XG------- | /--* IND double | |
N002 ( 1, 1) [000039] ------------ | | | /--* CNS_INT int 4 field offset Fseq[_value] | |
N003 ( 2, 2) [000040] -------N---- | | \--* ADD byref | |
N001 ( 1, 1) [000002] ------------ | | \--* LCL_VAR ref V00 this | |
N006 ( 9, 7) [000010] -A-XG---R--- \--* ASG double | |
N005 ( 3, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 | |
***** BB01, stmt 2 | |
( 64, 27) [000037] ------------ * STMT void (IL ???... ???) | |
N009 ( 3, 2) [000012] ------------ | /--* LCL_VAR double V02 tmp0 | |
N010 ( 60, 24) [000018] ---XG------- | /--* ADD double | |
N006 ( 3, 4) [000015] ------------ | | | /--* CNS_DBL double 100.00000000000000 | |
N007 ( 42, 10) [000016] ------------ | | | /--* DIV double | |
N005 ( 3, 2) [000014] ------------ | | | | \--* LCL_VAR double V01 arg1 | |
N008 ( 52, 18) [000017] ---XG------- | | \--* MUL double | |
N004 ( 5, 4) [000028] ---XG------- | | \--* IND double | |
N002 ( 1, 1) [000041] ------------ | | | /--* CNS_INT int 4 field offset Fseq[_value] | |
N003 ( 2, 2) [000042] -------N---- | | \--* ADD byref | |
N001 ( 1, 1) [000006] ------------ | | \--* LCL_VAR ref V00 this | |
N012 ( 64, 27) [000036] -A-XG---R--- \--* ASG double | |
N011 ( 3, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 | |
***** BB01, stmt 3 | |
( 9, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 3, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 | |
N006 ( 9, 7) [000033] -A-XG------- \--* ASG double | |
N004 ( 5, 4) [000032] ---XG--N---- \--* IND double | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT int 4 field offset Fseq[_value] | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this | |
***** BB01, stmt 4 | |
( 0, 0) [000023] ------------ * STMT void (IL 0x01F... ???) | |
N001 ( 0, 0) [000022] ------------ \--* RETURN void | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In SsaBuilder::Build() | |
[SsaBuilder] Max block count is 2. | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** Exception Handling table is empty | |
[SsaBuilder] Topologically sorted the graph. | |
[SsaBuilder::ComputeImmediateDom] | |
*************** In SsaBuilder::ComputeDominators(BasicBlock** postOrder, int count, ...) | |
*************** In SsaBuilder::InsertPhiFunctions() | |
*************** In fgLocalVarLiveness() | |
*************** In fgPerBlockLocalVarLiveness() | |
BB01 USE(2)={V00 V01} + ByrefExposed + GcHeap | |
DEF(2)={ V02 V03 } + ByrefExposed + GcHeap | |
** Memory liveness computed, GcHeap states and ByrefExposed states match | |
*************** In fgInterBlockLocalVarLiveness() | |
BB liveness after fgLiveVarAnalysis(): | |
BB01 IN (2)={V00 V01} + ByrefExposed + GcHeap | |
OUT(0)={ } | |
Inserting phi functions: | |
*************** In SsaBuilder::RenameVariables() | |
After fgSsaBuild: | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
( 9, 7) [000011] ------------ * STMT void (IL ???... ???) | |
N004 ( 5, 4) [000025] ---XG------- | /--* IND double | |
N002 ( 1, 1) [000039] ------------ | | | /--* CNS_INT int 4 field offset Fseq[_value] | |
N003 ( 2, 2) [000040] -------N---- | | \--* ADD byref | |
N001 ( 1, 1) [000002] ------------ | | \--* LCL_VAR ref V00 this u:2 | |
N006 ( 9, 7) [000010] -A-XG---R--- \--* ASG double | |
N005 ( 3, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 | |
***** BB01, stmt 2 | |
( 64, 27) [000037] ------------ * STMT void (IL ???... ???) | |
N009 ( 3, 2) [000012] ------------ | /--* LCL_VAR double V02 tmp0 u:2 (last use) | |
N010 ( 60, 24) [000018] ---XG------- | /--* ADD double | |
N006 ( 3, 4) [000015] ------------ | | | /--* CNS_DBL double 100.00000000000000 | |
N007 ( 42, 10) [000016] ------------ | | | /--* DIV double | |
N005 ( 3, 2) [000014] ------------ | | | | \--* LCL_VAR double V01 arg1 u:2 (last use) | |
N008 ( 52, 18) [000017] ---XG------- | | \--* MUL double | |
N004 ( 5, 4) [000028] ---XG------- | | \--* IND double | |
N002 ( 1, 1) [000041] ------------ | | | /--* CNS_INT int 4 field offset Fseq[_value] | |
N003 ( 2, 2) [000042] -------N---- | | \--* ADD byref | |
N001 ( 1, 1) [000006] ------------ | | \--* LCL_VAR ref V00 this u:2 | |
N012 ( 64, 27) [000036] -A-XG---R--- \--* ASG double | |
N011 ( 3, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 | |
***** BB01, stmt 3 | |
( 9, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 3, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 u:2 (last use) | |
N006 ( 9, 7) [000033] -A-XG------- \--* ASG double | |
N004 ( 5, 4) [000032] ---XG--N---- \--* IND double | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT int 4 field offset Fseq[_value] | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) | |
***** BB01, stmt 4 | |
( 0, 0) [000023] ------------ * STMT void (IL 0x01F... ???) | |
N001 ( 0, 0) [000022] ------------ \--* RETURN void | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In optEarlyProp() | |
*************** In fgValueNumber() | |
Memory Initial Value in BB01 is: $81 | |
The SSA definition for ByrefExposed (#2) at start of BB01 is $81 {InitVal($42)} | |
The SSA definition for GcHeap (#2) at start of BB01 is $81 {InitVal($42)} | |
***** BB01, stmt 1 (before) | |
N004 ( 5, 4) [000025] ---XG------- /--* IND double | |
N002 ( 1, 1) [000039] ------------ | | /--* CNS_INT int 4 field offset Fseq[_value] | |
N003 ( 2, 2) [000040] -------N---- | \--* ADD byref | |
N001 ( 1, 1) [000002] ------------ | \--* LCL_VAR ref V00 this u:2 | |
N006 ( 9, 7) [000010] -A-XG---R--- * ASG double | |
N005 ( 3, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 | |
N001 [000002] LCL_VAR V00 this u:2 => $80 {InitVal($40)} | |
N002 [000039] CNS_INT 4 field offset Fseq[_value] => $43 {IntCns 4} | |
N003 [000040] ADD => $100 {ADD($43, $80)} | |
VNApplySelectors: | |
VNForHandle(Fseq[_value]) is $140, fieldType is double | |
VNForMapSelect($81, $140):double returns $180 {$81[$140]} | |
VNForMapSelect($180, $80):double returns $181 {$180[$80]} | |
N004 [000025] IND => <l:$181 {$180[$80]}, c:$1c0 {1c0}> | |
N005 [000009] LCL_VAR V02 tmp0 d:2 => <l:$181 {$180[$80]}, c:$1c0 {1c0}> | |
N006 [000010] ASG => <l:$181 {$180[$80]}, c:$1c0 {1c0}> | |
***** BB01, stmt 1 (after) | |
N004 ( 5, 4) [000025] ---XG------- /--* IND double <l:$181, c:$1c0> | |
N002 ( 1, 1) [000039] ------------ | | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000040] -------N---- | \--* ADD byref $100 | |
N001 ( 1, 1) [000002] ------------ | \--* LCL_VAR ref V00 this u:2 $80 | |
N006 ( 9, 7) [000010] -A-XG---R--- * ASG double <l:$181, c:$1c0> | |
N005 ( 3, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 <l:$181, c:$1c0> | |
--------- | |
***** BB01, stmt 2 (before) | |
N009 ( 3, 2) [000012] ------------ /--* LCL_VAR double V02 tmp0 u:2 (last use) | |
N010 ( 60, 24) [000018] ---XG------- /--* ADD double | |
N006 ( 3, 4) [000015] ------------ | | /--* CNS_DBL double 100.00000000000000 | |
N007 ( 42, 10) [000016] ------------ | | /--* DIV double | |
N005 ( 3, 2) [000014] ------------ | | | \--* LCL_VAR double V01 arg1 u:2 (last use) | |
N008 ( 52, 18) [000017] ---XG------- | \--* MUL double | |
N004 ( 5, 4) [000028] ---XG------- | \--* IND double | |
N002 ( 1, 1) [000041] ------------ | | /--* CNS_INT int 4 field offset Fseq[_value] | |
N003 ( 2, 2) [000042] -------N---- | \--* ADD byref | |
N001 ( 1, 1) [000006] ------------ | \--* LCL_VAR ref V00 this u:2 | |
N012 ( 64, 27) [000036] -A-XG---R--- * ASG double | |
N011 ( 3, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 | |
N001 [000006] LCL_VAR V00 this u:2 => $80 {InitVal($40)} | |
N002 [000041] CNS_INT 4 field offset Fseq[_value] => $43 {IntCns 4} | |
N003 [000042] ADD => $100 {ADD($43, $80)} | |
VNApplySelectors: | |
VNForHandle(Fseq[_value]) is $140, fieldType is double | |
VNForMapSelect($81, $140):double returns $180 {$81[$140]} | |
VNForMapSelect($180, $80):double returns $181 {$180[$80]} | |
N004 [000028] IND => <l:$181 {$180[$80]}, c:$1c2 {1c2}> | |
N005 [000014] LCL_VAR V01 arg1 u:2 (last use) => $c0 {InitVal($41)} | |
N006 [000015] CNS_DBL 100.00000000000000 => $200 {DblCns[100.000000]} | |
N007 [000016] DIV => $182 {DIV($c0, $200)} | |
N008 [000017] MUL => <l:$184 {MUL($181, $182)}, c:$183 {MUL($182, $1c2)}> | |
N009 [000012] LCL_VAR V02 tmp0 u:2 (last use) => <l:$181 {$180[$80]}, c:$1c0 {1c0}> | |
N010 [000018] ADD => <l:$186 {ADD($181, $184)}, c:$185 {ADD($183, $1c0)}> | |
N011 [000035] LCL_VAR V03 tmp1 d:2 => <l:$186 {ADD($181, $184)}, c:$185 {ADD($183, $1c0)}> | |
N012 [000036] ASG => <l:$186 {ADD($181, $184)}, c:$185 {ADD($183, $1c0)}> | |
***** BB01, stmt 2 (after) | |
N009 ( 3, 2) [000012] ------------ /--* LCL_VAR double V02 tmp0 u:2 (last use) <l:$181, c:$1c0> | |
N010 ( 60, 24) [000018] ---XG------- /--* ADD double <l:$186, c:$185> | |
N006 ( 3, 4) [000015] ------------ | | /--* CNS_DBL double 100.00000000000000 $200 | |
N007 ( 42, 10) [000016] ------------ | | /--* DIV double $182 | |
N005 ( 3, 2) [000014] ------------ | | | \--* LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N008 ( 52, 18) [000017] ---XG------- | \--* MUL double <l:$184, c:$183> | |
N004 ( 5, 4) [000028] ---XG------- | \--* IND double <l:$181, c:$1c2> | |
N002 ( 1, 1) [000041] ------------ | | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000042] -------N---- | \--* ADD byref $100 | |
N001 ( 1, 1) [000006] ------------ | \--* LCL_VAR ref V00 this u:2 $80 | |
N012 ( 64, 27) [000036] -A-XG---R--- * ASG double <l:$186, c:$185> | |
N011 ( 3, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 <l:$186, c:$185> | |
--------- | |
***** BB01, stmt 3 (before) | |
N005 ( 3, 2) [000031] ------------ /--* LCL_VAR double V03 tmp1 u:2 (last use) | |
N006 ( 9, 7) [000033] -A-XG------- * ASG double | |
N004 ( 5, 4) [000032] ---XG--N---- \--* IND double | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT int 4 field offset Fseq[_value] | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) | |
N001 [000001] LCL_VAR V00 this u:2 (last use) => $80 {InitVal($40)} | |
N002 [000043] CNS_INT 4 field offset Fseq[_value] => $43 {IntCns 4} | |
N003 [000044] ADD => $100 {ADD($43, $80)} | |
N005 [000031] LCL_VAR V03 tmp1 u:2 (last use) => <l:$186 {ADD($181, $184)}, c:$185 {ADD($183, $1c0)}> | |
VNApplySelectors: | |
VNForHandle(Fseq[_value]) is $140, fieldType is double | |
VNForMapSelect($81, $140):double returns $180 {$81[$140]} | |
VNForMapSelect($180, $80):double returns $181 {$180[$80]} | |
VNForMapStore($180, $80, $186):double returns $240 {$180[$80 := $186]} | |
fgCurMemoryVN assigned: | |
fieldHnd $140 is {Hnd const: 0x030E50B8} | |
fieldSeq $280 is {_value} | |
VNForMapStore($81, $140, $240):double returns $241 {$81[$140 := $240]} | |
fgCurMemoryVN[GcHeap] assigned by StoreField at [000033] to VN: $241. | |
N006 [000033] ASG => $VN.Void | |
***** BB01, stmt 3 (after) | |
N005 ( 3, 2) [000031] ------------ /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$186, c:$185> | |
N006 ( 9, 7) [000033] -A-XG------- * ASG double $VN.Void | |
N004 ( 5, 4) [000032] ---XG--N---- \--* IND double $186 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $100 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
--------- | |
***** BB01, stmt 4 (before) | |
N001 ( 0, 0) [000022] ------------ * RETURN void | |
N001 [000022] RETURN => $2c0 {2c0} | |
***** BB01, stmt 4 (after) | |
N001 ( 0, 0) [000022] ------------ * RETURN void $2c0 | |
finish(BB01). | |
*************** In optVnCopyProp() | |
*************** In SsaBuilder::ComputeDominators(Compiler*, ...) | |
Copy Assertion for BB01 | |
Live vars: {V00 V01} => {V00 V01 V02} | |
Live vars: {V00 V01 V02} => {V00 V02} | |
Live vars: {V00 V02} => {V00} | |
Live vars: {V00} => {V00 V03} | |
Live vars: {V00 V03} => {V03} | |
Live vars: {V03} => {} | |
*************** In optOptimizeCSEs() | |
Blocks/Trees at start of optOptimizeCSE phase | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
( 9, 7) [000011] ------------ * STMT void (IL ???... ???) | |
N004 ( 5, 4) [000025] ---XG------- | /--* IND double <l:$181, c:$1c0> | |
N002 ( 1, 1) [000039] ------------ | | | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000040] -------N---- | | \--* ADD byref $100 | |
N001 ( 1, 1) [000002] ------------ | | \--* LCL_VAR ref V00 this u:2 $80 | |
N006 ( 9, 7) [000010] -A-XG---R--- \--* ASG double <l:$181, c:$1c0> | |
N005 ( 3, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 <l:$181, c:$1c0> | |
***** BB01, stmt 2 | |
( 64, 27) [000037] ------------ * STMT void (IL ???... ???) | |
N009 ( 3, 2) [000012] ------------ | /--* LCL_VAR double V02 tmp0 u:2 (last use) <l:$181, c:$1c0> | |
N010 ( 60, 24) [000018] ---XG------- | /--* ADD double <l:$186, c:$185> | |
N006 ( 3, 4) [000015] ------------ | | | /--* CNS_DBL double 100.00000000000000 $200 | |
N007 ( 42, 10) [000016] ------------ | | | /--* DIV double $182 | |
N005 ( 3, 2) [000014] ------------ | | | | \--* LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N008 ( 52, 18) [000017] ---XG------- | | \--* MUL double <l:$184, c:$183> | |
N004 ( 5, 4) [000028] ---XG------- | | \--* IND double <l:$181, c:$1c2> | |
N002 ( 1, 1) [000041] ------------ | | | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000042] -------N---- | | \--* ADD byref $100 | |
N001 ( 1, 1) [000006] ------------ | | \--* LCL_VAR ref V00 this u:2 $80 | |
N012 ( 64, 27) [000036] -A-XG---R--- \--* ASG double <l:$186, c:$185> | |
N011 ( 3, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 <l:$186, c:$185> | |
***** BB01, stmt 3 | |
( 9, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 3, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$186, c:$185> | |
N006 ( 9, 7) [000033] -A-XG------- \--* ASG double $VN.Void | |
N004 ( 5, 4) [000032] ---XG--N---- \--* IND double $186 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $100 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
***** BB01, stmt 4 | |
( 0, 0) [000023] ------------ * STMT void (IL 0x01F... ???) | |
N001 ( 0, 0) [000022] ------------ \--* RETURN void $2c0 | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In optOptimizeValnumCSEs() | |
CSE candidate #01, vn=$181 cseMask=0000000000000001 in BB01, [cost= 5, size= 4]: | |
N004 ( 5, 4) CSE #01 (use)[000028] ---XG------- * IND double <l:$181, c:$1c2> | |
N002 ( 1, 1) [000041] ------------ | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000042] -------N---- \--* ADD byref $100 | |
N001 ( 1, 1) [000006] ------------ \--* LCL_VAR ref V00 this u:2 $80 | |
Blocks that generate CSE def/uses | |
BB01 cseGen = 0000000000000001 | |
After performing DataFlow for ValnumCSE's | |
BB01 cseIn = 0000000000000000 cseOut = 0000000000000001 | |
Labeling the CSEs with Use/Def information | |
BB01 [000025] Def of CSE #01 [weight=1 ] | |
BB01 [000028] Use of CSE #01 [weight=1 ] | |
************ Trees at start of optValnumCSE_Heuristic() | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
( 9, 7) [000011] ------------ * STMT void (IL ???... ???) | |
N004 ( 5, 4) CSE #01 (def)[000025] ---XG------- | /--* IND double <l:$181, c:$1c0> | |
N002 ( 1, 1) [000039] ------------ | | | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000040] -------N---- | | \--* ADD byref $100 | |
N001 ( 1, 1) [000002] ------------ | | \--* LCL_VAR ref V00 this u:2 $80 | |
N006 ( 9, 7) [000010] -A-XG---R--- \--* ASG double <l:$181, c:$1c0> | |
N005 ( 3, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 <l:$181, c:$1c0> | |
***** BB01, stmt 2 | |
( 64, 27) [000037] ------------ * STMT void (IL ???... ???) | |
N009 ( 3, 2) [000012] ------------ | /--* LCL_VAR double V02 tmp0 u:2 (last use) <l:$181, c:$1c0> | |
N010 ( 60, 24) [000018] ---XG------- | /--* ADD double <l:$186, c:$185> | |
N006 ( 3, 4) [000015] ------------ | | | /--* CNS_DBL double 100.00000000000000 $200 | |
N007 ( 42, 10) [000016] ------------ | | | /--* DIV double $182 | |
N005 ( 3, 2) [000014] ------------ | | | | \--* LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N008 ( 52, 18) [000017] ---XG------- | | \--* MUL double <l:$184, c:$183> | |
N004 ( 5, 4) CSE #01 (use)[000028] ---XG------- | | \--* IND double <l:$181, c:$1c2> | |
N002 ( 1, 1) [000041] ------------ | | | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000042] -------N---- | | \--* ADD byref $100 | |
N001 ( 1, 1) [000006] ------------ | | \--* LCL_VAR ref V00 this u:2 $80 | |
N012 ( 64, 27) [000036] -A-XG---R--- \--* ASG double <l:$186, c:$185> | |
N011 ( 3, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 <l:$186, c:$185> | |
***** BB01, stmt 3 | |
( 9, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 3, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$186, c:$185> | |
N006 ( 9, 7) [000033] -A-XG------- \--* ASG double $VN.Void | |
N004 ( 5, 4) [000032] ---XG--N---- \--* IND double $186 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $100 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
***** BB01, stmt 4 | |
( 0, 0) [000023] ------------ * STMT void (IL 0x01F... ???) | |
N001 ( 0, 0) [000022] ------------ \--* RETURN void $2c0 | |
------------------------------------------------------------------------------------------------------------------- | |
Aggressive CSE Promotion cutoff is 100 | |
Moderate CSE Promotion cutoff is 50 | |
Framesize estimate is 0x0018 | |
We have a small frame | |
Sorted CSE candidates: | |
CSE #01,cseMask=0000000000000001,useCnt=1: [def=100, use=100] :: N004 ( 5, 4) CSE #01 (def)[000025] ---XG------- * IND double <l:$181, c:$1c0> | |
Considering CSE #01 [def=100, use=100, cost= 5] CSE Expression: | |
N004 ( 5, 4) CSE #01 (def)[000025] ---XG------- * IND double <l:$181, c:$1c0> | |
N002 ( 1, 1) [000039] ------------ | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000040] -------N---- \--* ADD byref $100 | |
N001 ( 1, 1) [000002] ------------ \--* LCL_VAR ref V00 this u:2 $80 | |
Aggressive CSE Promotion (300 >= 100) | |
cseRefCnt=300, aggressiveRefCnt=100, moderateRefCnt=50 | |
defCnt=100, useCnt=100, cost=5, size=4 | |
def_cost=1, use_cost=1, extra_no_cost=6, extra_yes_cost=0 | |
CSE cost savings check (506 >= 200) passes | |
Promoting CSE: | |
lvaGrabTemp returning 4 (V04 rat0) (a long lifetime temp) called for ValNumCSE. | |
CSE #01 def at [000025] replaced in BB01 with def of V04 | |
New refCnts for V04: refCnt = 1, refCntWtd = 1 | |
New refCnts for V04: refCnt = 2, refCntWtd = 2 | |
New refCnts for V02: refCnt = 3, refCntWtd = 6 | |
New refCnts for V04: refCnt = 3, refCntWtd = 3 | |
New refCnts for V00: refCnt = 6, refCntWtd = 6 | |
New refCnts for V04: refCnt = 4, refCntWtd = 4 | |
optValnumCSE morphed tree: | |
N007 ( 3, 2) [000047] ------------ /--* LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N008 ( 12, 9) [000048] -A-XG------- /--* COMMA double <l:$181, c:$1c0> | |
N004 ( 5, 4) [000025] ---XG------- | | /--* IND double <l:$181, c:$1c0> | |
N002 ( 1, 1) [000039] ------------ | | | | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000040] -------N---- | | | \--* ADD byref $100 | |
N001 ( 1, 1) [000002] ------------ | | | \--* LCL_VAR ref V00 this u:2 $80 | |
N006 ( 9, 7) [000046] -A-XG---R--- | \--* ASG double $VN.Void | |
N005 ( 3, 2) [000045] D------N---- | \--* LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N010 ( 16, 12) [000010] -A-XG---R--- * ASG double <l:$181, c:$1c0> | |
N009 ( 3, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 <l:$181, c:$1c0> | |
CSE #01 use at [000028] replaced in BB01 with temp use. | |
New refCnts for V00: refCnt = 5, refCntWtd = 5 | |
New refCnts for V04: refCnt = 5, refCntWtd = 5 | |
New refCnts for V03: refCnt = 3, refCntWtd = 6 | |
New refCnts for V04: refCnt = 6, refCntWtd = 6 | |
New refCnts for V01: refCnt = 2, refCntWtd = 2 | |
New refCnts for V02: refCnt = 4, refCntWtd = 8 | |
optValnumCSE morphed tree: | |
N006 ( 3, 2) [000012] ------------ /--* LCL_VAR double V02 tmp0 u:2 (last use) <l:$181, c:$1c0> | |
N007 ( 58, 22) [000018] ----G------- /--* ADD double <l:$186, c:$185> | |
N003 ( 3, 4) [000015] ------------ | | /--* CNS_DBL double 100.00000000000000 $200 | |
N004 ( 42, 10) [000016] ------------ | | /--* DIV double $182 | |
N002 ( 3, 2) [000014] ------------ | | | \--* LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N005 ( 50, 16) [000017] ----G------- | \--* MUL double <l:$184, c:$183> | |
N001 ( 3, 2) [000049] ------------ | \--* LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N009 ( 62, 25) [000036] -A--G---R--- * ASG double <l:$186, c:$185> | |
N008 ( 3, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 <l:$186, c:$185> | |
*************** In optAssertionPropMain() | |
Blocks/Trees at start of phase | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
( 16, 12) [000011] ------------ * STMT void (IL ???... ???) | |
N007 ( 3, 2) [000047] ------------ | /--* LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N008 ( 12, 9) [000048] -A-XG------- | /--* COMMA double <l:$181, c:$1c0> | |
N004 ( 5, 4) [000025] ---XG------- | | | /--* IND double <l:$181, c:$1c0> | |
N002 ( 1, 1) [000039] ------------ | | | | | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000040] -------N---- | | | | \--* ADD byref $100 | |
N001 ( 1, 1) [000002] ------------ | | | | \--* LCL_VAR ref V00 this u:2 $80 | |
N006 ( 9, 7) [000046] -A-XG---R--- | | \--* ASG double $VN.Void | |
N005 ( 3, 2) [000045] D------N---- | | \--* LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N010 ( 16, 12) [000010] -A-XG---R--- \--* ASG double <l:$181, c:$1c0> | |
N009 ( 3, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 <l:$181, c:$1c0> | |
***** BB01, stmt 2 | |
( 62, 25) [000037] ------------ * STMT void (IL ???... ???) | |
N006 ( 3, 2) [000012] ------------ | /--* LCL_VAR double V02 tmp0 u:2 (last use) <l:$181, c:$1c0> | |
N007 ( 58, 22) [000018] ----G------- | /--* ADD double <l:$186, c:$185> | |
N003 ( 3, 4) [000015] ------------ | | | /--* CNS_DBL double 100.00000000000000 $200 | |
N004 ( 42, 10) [000016] ------------ | | | /--* DIV double $182 | |
N002 ( 3, 2) [000014] ------------ | | | | \--* LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N005 ( 50, 16) [000017] ----G------- | | \--* MUL double <l:$184, c:$183> | |
N001 ( 3, 2) [000049] ------------ | | \--* LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N009 ( 62, 25) [000036] -A--G---R--- \--* ASG double <l:$186, c:$185> | |
N008 ( 3, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 <l:$186, c:$185> | |
***** BB01, stmt 3 | |
( 9, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 3, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$186, c:$185> | |
N006 ( 9, 7) [000033] -A-XG------- \--* ASG double $VN.Void | |
N004 ( 5, 4) [000032] ---XG--N---- \--* IND double $186 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $100 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
***** BB01, stmt 4 | |
( 0, 0) [000023] ------------ * STMT void (IL 0x01F... ???) | |
N001 ( 0, 0) [000022] ------------ \--* RETURN void $2c0 | |
------------------------------------------------------------------------------------------------------------------- | |
GenTreeNode creates assertion: | |
N004 ( 5, 4) [000025] ---XG------- * IND double <l:$181, c:$1c0> | |
In BB01 New Global Constant Assertion: (128, 0) ($80,$0) V00.02 != null index=#01, mask=0000000000000001 | |
BB01 valueGen = 0000000000000001AssertionPropCallback::StartMerge: BB01 in -> 0000000000000000 | |
AssertionPropCallback::EndMerge : BB01 in -> 0000000000000000 | |
AssertionPropCallback::Changed : BB01 before out -> 0000000000000001; after out -> 0000000000000001; | |
jumpDest before out -> 0000000000000001; jumpDest after out -> 0000000000000000; | |
BB01 valueIn = 0000000000000000 valueOut = 0000000000000001 | |
Propagating 0000000000000000 assertions for BB01, stmt [000011], tree [000002], tree -> 0 | |
Propagating 0000000000000000 assertions for BB01, stmt [000011], tree [000039], tree -> 0 | |
Propagating 0000000000000000 assertions for BB01, stmt [000011], tree [000040], tree -> 0 | |
Propagating 0000000000000000 assertions for BB01, stmt [000011], tree [000025], tree -> 1 | |
Propagating 0000000000000001 assertions for BB01, stmt [000011], tree [000045], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000011], tree [000046], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000011], tree [000047], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000011], tree [000048], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000011], tree [000009], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000011], tree [000010], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000049], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000014], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000015], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000016], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000017], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000012], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000018], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000035], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000036], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000034], tree [000001], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000034], tree [000043], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000034], tree [000044], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000034], tree [000032], tree -> 1 | |
Non-null prop for index #01 in BB01: | |
N004 ( 5, 4) [000032] ---XG--N---- * IND double $186 | |
Propagating 0000000000000001 assertions for BB01, stmt [000034], tree [000031], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000034], tree [000033], tree -> 0 | |
Re-morphing this stmt: | |
( 9, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 3, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$186, c:$185> | |
N006 ( 9, 7) [000033] -A-XG------- \--* ASG double $VN.Void | |
N004 ( 5, 4) [000032] x---GO-N---- \--* IND double $186 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $100 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
New refCnts for V00: refCnt = 6, refCntWtd = 6 | |
New refCnts for V03: refCnt = 4, refCntWtd = 8 | |
optAssertionPropMain morphed tree: | |
N005 ( 3, 2) [000031] ------------ /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$186, c:$185> | |
N006 ( 9, 7) [000033] -A--GO------ * ASG double $VN.Void | |
N004 ( 5, 4) [000032] x---GO-N---- \--* IND double $186 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $100 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
Propagating 0000000000000001 assertions for BB01, stmt [000023], tree [000022], tree -> 0 | |
*************** In fgDebugCheckBBlist | |
*************** In OptimizeRangeChecks() | |
Blocks/trees before phase | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
( 16, 12) [000011] ------------ * STMT void (IL ???... ???) | |
N007 ( 3, 2) [000047] ------------ | /--* LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N008 ( 12, 9) [000048] -A-XG------- | /--* COMMA double <l:$181, c:$1c0> | |
N004 ( 5, 4) [000025] ---XG------- | | | /--* IND double <l:$181, c:$1c0> | |
N002 ( 1, 1) [000039] ------------ | | | | | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000040] -------N---- | | | | \--* ADD byref $100 | |
N001 ( 1, 1) [000002] ------------ | | | | \--* LCL_VAR ref V00 this u:2 $80 | |
N006 ( 9, 7) [000046] -A-XG---R--- | | \--* ASG double $VN.Void | |
N005 ( 3, 2) [000045] D------N---- | | \--* LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N010 ( 16, 12) [000010] -A-XG---R--- \--* ASG double <l:$181, c:$1c0> | |
N009 ( 3, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 <l:$181, c:$1c0> | |
***** BB01, stmt 2 | |
( 62, 25) [000037] ------------ * STMT void (IL ???... ???) | |
N006 ( 3, 2) [000012] ------------ | /--* LCL_VAR double V02 tmp0 u:2 (last use) <l:$181, c:$1c0> | |
N007 ( 58, 22) [000018] ----G------- | /--* ADD double <l:$186, c:$185> | |
N003 ( 3, 4) [000015] ------------ | | | /--* CNS_DBL double 100.00000000000000 $200 | |
N004 ( 42, 10) [000016] ------------ | | | /--* DIV double $182 | |
N002 ( 3, 2) [000014] ------------ | | | | \--* LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N005 ( 50, 16) [000017] ----G------- | | \--* MUL double <l:$184, c:$183> | |
N001 ( 3, 2) [000049] ------------ | | \--* LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N009 ( 62, 25) [000036] -A--G---R--- \--* ASG double <l:$186, c:$185> | |
N008 ( 3, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 <l:$186, c:$185> | |
***** BB01, stmt 3 | |
( 9, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 3, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$186, c:$185> | |
N006 ( 9, 7) [000033] -A--GO------ \--* ASG double $VN.Void | |
N004 ( 5, 4) [000032] x---GO-N---- \--* IND double $186 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $100 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
***** BB01, stmt 4 | |
( 0, 0) [000023] ------------ * STMT void (IL 0x01F... ???) | |
N001 ( 0, 0) [000022] ------------ \--* RETURN void $2c0 | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDetermineFirstColdBlock() | |
No procedure splitting will be done for this method | |
*************** In IR Rationalize | |
Trees before IR Rationalize | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
( 16, 12) [000011] ------------ * STMT void (IL ???... ???) | |
N007 ( 3, 2) [000047] ------------ | /--* LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N008 ( 12, 9) [000048] -A-XG------- | /--* COMMA double <l:$181, c:$1c0> | |
N004 ( 5, 4) [000025] ---XG------- | | | /--* IND double <l:$181, c:$1c0> | |
N002 ( 1, 1) [000039] ------------ | | | | | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000040] -------N---- | | | | \--* ADD byref $100 | |
N001 ( 1, 1) [000002] ------------ | | | | \--* LCL_VAR ref V00 this u:2 $80 | |
N006 ( 9, 7) [000046] -A-XG---R--- | | \--* ASG double $VN.Void | |
N005 ( 3, 2) [000045] D------N---- | | \--* LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N010 ( 16, 12) [000010] -A-XG---R--- \--* ASG double <l:$181, c:$1c0> | |
N009 ( 3, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 <l:$181, c:$1c0> | |
***** BB01, stmt 2 | |
( 62, 25) [000037] ------------ * STMT void (IL ???... ???) | |
N006 ( 3, 2) [000012] ------------ | /--* LCL_VAR double V02 tmp0 u:2 (last use) <l:$181, c:$1c0> | |
N007 ( 58, 22) [000018] ----G------- | /--* ADD double <l:$186, c:$185> | |
N003 ( 3, 4) [000015] ------------ | | | /--* CNS_DBL double 100.00000000000000 $200 | |
N004 ( 42, 10) [000016] ------------ | | | /--* DIV double $182 | |
N002 ( 3, 2) [000014] ------------ | | | | \--* LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N005 ( 50, 16) [000017] ----G------- | | \--* MUL double <l:$184, c:$183> | |
N001 ( 3, 2) [000049] ------------ | | \--* LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N009 ( 62, 25) [000036] -A--G---R--- \--* ASG double <l:$186, c:$185> | |
N008 ( 3, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 <l:$186, c:$185> | |
***** BB01, stmt 3 | |
( 9, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 3, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$186, c:$185> | |
N006 ( 9, 7) [000033] -A--GO------ \--* ASG double $VN.Void | |
N004 ( 5, 4) [000032] x---GO-N---- \--* IND double $186 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $100 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
***** BB01, stmt 4 | |
( 0, 0) [000023] ------------ * STMT void (IL 0x01F... ???) | |
N001 ( 0, 0) [000022] ------------ \--* RETURN void $2c0 | |
------------------------------------------------------------------------------------------------------------------- | |
rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) | |
N006 ( 9, 7) [000046] DA-XG------- * STORE_LCL_VAR double V04 cse0 | |
rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) | |
N010 ( 16, 12) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 | |
rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) | |
N009 ( 62, 25) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 | |
*************** Exiting IR Rationalize | |
Trees after IR Rationalize | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
N001 ( 1, 1) [000002] ------------ t2 = LCL_VAR ref V00 this u:2 $80 | |
N002 ( 1, 1) [000039] ------------ t39 = CNS_INT int 4 field offset Fseq[_value] $43 | |
/--* t2 ref | |
+--* t39 int | |
N003 ( 2, 2) [000040] -------N---- t40 = * ADD byref $100 | |
/--* t40 byref | |
N004 ( 5, 4) [000025] ---XG------- t25 = * IND double <l:$181, c:$1c0> | |
/--* t25 double | |
N006 ( 9, 7) [000046] DA-XG------- * STORE_LCL_VAR double V04 cse0 | |
N007 ( 3, 2) [000047] ------------ t47 = LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
/--* t47 double | |
N010 ( 16, 12) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 | |
N001 ( 3, 2) [000049] ------------ t49 = LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N002 ( 3, 2) [000014] ------------ t14 = LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N003 ( 3, 4) [000015] ------------ t15 = CNS_DBL double 100.00000000000000 $200 | |
/--* t14 double | |
+--* t15 double | |
N004 ( 42, 10) [000016] ------------ t16 = * DIV double $182 | |
/--* t49 double | |
+--* t16 double | |
N005 ( 50, 16) [000017] ----G------- t17 = * MUL double <l:$184, c:$183> | |
N006 ( 3, 2) [000012] ------------ t12 = LCL_VAR double V02 tmp0 u:2 (last use) <l:$181, c:$1c0> | |
/--* t17 double | |
+--* t12 double | |
N007 ( 58, 22) [000018] ----G------- t18 = * ADD double <l:$186, c:$185> | |
/--* t18 double | |
N009 ( 62, 25) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 | |
N001 ( 1, 1) [000001] ------------ t1 = LCL_VAR ref V00 this u:2 (last use) $80 | |
N002 ( 1, 1) [000043] ------------ t43 = CNS_INT int 4 field offset Fseq[_value] $43 | |
/--* t1 ref | |
+--* t43 int | |
N003 ( 2, 2) [000044] -------N---- t44 = * ADD byref $100 | |
N005 ( 3, 2) [000031] ------------ t31 = LCL_VAR double V03 tmp1 u:2 (last use) <l:$186, c:$185> | |
/--* t44 byref | |
+--* t31 double | |
[000050] -A--GO------ * STOREIND double | |
( 0, 0) [000023] ------------ IL_OFFSET void IL offset: 0x1f | |
N001 ( 0, 0) [000022] ------------ RETURN void $2c0 | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
*************** In fgDebugCheckBBlist | |
*************** In Lowering | |
Trees before Lowering | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
N001 ( 1, 1) [000002] ------------ t2 = LCL_VAR ref V00 this u:2 $80 | |
N002 ( 1, 1) [000039] ------------ t39 = CNS_INT int 4 field offset Fseq[_value] $43 | |
/--* t2 ref | |
+--* t39 int | |
N003 ( 2, 2) [000040] -------N---- t40 = * ADD byref $100 | |
/--* t40 byref | |
N004 ( 5, 4) [000025] ---XG------- t25 = * IND double <l:$181, c:$1c0> | |
/--* t25 double | |
N006 ( 9, 7) [000046] DA-XG------- * STORE_LCL_VAR double V04 cse0 | |
N007 ( 3, 2) [000047] ------------ t47 = LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
/--* t47 double | |
N010 ( 16, 12) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 | |
N001 ( 3, 2) [000049] ------------ t49 = LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N002 ( 3, 2) [000014] ------------ t14 = LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N003 ( 3, 4) [000015] ------------ t15 = CNS_DBL double 100.00000000000000 $200 | |
/--* t14 double | |
+--* t15 double | |
N004 ( 42, 10) [000016] ------------ t16 = * DIV double $182 | |
/--* t49 double | |
+--* t16 double | |
N005 ( 50, 16) [000017] ----G------- t17 = * MUL double <l:$184, c:$183> | |
N006 ( 3, 2) [000012] ------------ t12 = LCL_VAR double V02 tmp0 u:2 (last use) <l:$181, c:$1c0> | |
/--* t17 double | |
+--* t12 double | |
N007 ( 58, 22) [000018] ----G------- t18 = * ADD double <l:$186, c:$185> | |
/--* t18 double | |
N009 ( 62, 25) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 | |
N001 ( 1, 1) [000001] ------------ t1 = LCL_VAR ref V00 this u:2 (last use) $80 | |
N002 ( 1, 1) [000043] ------------ t43 = CNS_INT int 4 field offset Fseq[_value] $43 | |
/--* t1 ref | |
+--* t43 int | |
N003 ( 2, 2) [000044] -------N---- t44 = * ADD byref $100 | |
N005 ( 3, 2) [000031] ------------ t31 = LCL_VAR double V03 tmp1 u:2 (last use) <l:$186, c:$185> | |
/--* t44 byref | |
+--* t31 double | |
[000050] -A--GO------ * STOREIND double | |
( 0, 0) [000023] ------------ IL_OFFSET void IL offset: 0x1f | |
N001 ( 0, 0) [000022] ------------ RETURN void $2c0 | |
------------------------------------------------------------------------------------------------------------------- | |
Addressing mode: | |
Base | |
N001 ( 1, 1) [000002] ------------ * LCL_VAR ref V00 this u:2 $80 | |
+ 4 | |
New addressing mode node: | |
[000051] ------------ * LEA(b+4) byref | |
Addressing mode: | |
Base | |
N001 ( 1, 1) [000001] ------------ * LCL_VAR ref V00 this u:2 (last use) $80 | |
+ 4 | |
New addressing mode node: | |
[000052] ------------ * LEA(b+4) byref | |
lowering GT_RETURN | |
N001 ( 0, 0) [000022] ------------ * RETURN void $2c0 | |
============Lower has completed modifying nodes. | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
N001 ( 1, 1) [000002] ------------ t2 = LCL_VAR ref V00 this u:2 $80 | |
/--* t2 ref | |
[000051] -c---------- t51 = * LEA(b+4) byref | |
/--* t51 byref | |
N004 ( 5, 4) [000025] ---XG------- t25 = * IND double <l:$181, c:$1c0> | |
/--* t25 double | |
N006 ( 9, 7) [000046] DA-XG------- * STORE_LCL_VAR double V04 cse0 | |
N007 ( 3, 2) [000047] ------------ t47 = LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
/--* t47 double | |
N010 ( 16, 12) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 | |
N001 ( 3, 2) [000049] ------------ t49 = LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N002 ( 3, 2) [000014] ------------ t14 = LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N003 ( 3, 4) [000015] -c---------- t15 = CNS_DBL double 100.00000000000000 $200 | |
/--* t14 double | |
+--* t15 double | |
N004 ( 42, 10) [000016] ------------ t16 = * DIV double $182 | |
/--* t49 double | |
+--* t16 double | |
N005 ( 50, 16) [000017] ----G------- t17 = * MUL double <l:$184, c:$183> | |
N006 ( 3, 2) [000012] ------------ t12 = LCL_VAR double V02 tmp0 u:2 (last use) <l:$181, c:$1c0> | |
/--* t17 double | |
+--* t12 double | |
N007 ( 58, 22) [000018] ----G------- t18 = * ADD double <l:$186, c:$185> | |
/--* t18 double | |
N009 ( 62, 25) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 | |
N001 ( 1, 1) [000001] ------------ t1 = LCL_VAR ref V00 this u:2 (last use) $80 | |
/--* t1 ref | |
[000052] -c---------- t52 = * LEA(b+4) byref | |
N005 ( 3, 2) [000031] ------------ t31 = LCL_VAR double V03 tmp1 u:2 (last use) <l:$186, c:$185> | |
/--* t52 byref | |
+--* t31 double | |
[000050] -A--GO------ * STOREIND double | |
( 0, 0) [000023] ------------ IL_OFFSET void IL offset: 0x1f | |
N001 ( 0, 0) [000022] ------------ RETURN void $2c0 | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In fgLocalVarLiveness() | |
; Initial local variable assignments | |
; | |
; V00 this ref this class-hnd | |
; V01 arg1 double | |
; V02 tmp0 double | |
; V03 tmp1 double | |
; V04 cse0 double | |
In fgLocalVarLivenessInit, sorting locals | |
refCnt table for 'RaiseValue': | |
V00 this [ ref]: refCnt = 6, refCntWtd = 6 pref [ecx] | |
V02 tmp0 [double]: refCnt = 4, refCntWtd = 8 | |
V03 tmp1 [double]: refCnt = 4, refCntWtd = 8 | |
V04 cse0 [double]: refCnt = 6, refCntWtd = 6 | |
V01 arg1 [double]: refCnt = 2, refCntWtd = 2 | |
*************** In fgPerBlockLocalVarLiveness() | |
BB01 USE(2)={V00 V01} + ByrefExposed + GcHeap | |
DEF(3)={ V02 V03 V04 } | |
** Memory liveness computed, GcHeap states and ByrefExposed states match | |
*************** In fgInterBlockLocalVarLiveness() | |
BB liveness after fgLiveVarAnalysis(): | |
BB01 IN (2)={V00 V01} + ByrefExposed + GcHeap | |
OUT(0)={ } | |
*************** In fgUpdateFlowGraph() | |
Before updating the flow graph: | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
Liveness pass finished after lowering, IR: | |
lvasortagain = 0 | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
N001 ( 1, 1) [000002] ------------ t2 = LCL_VAR ref V00 this u:2 $80 | |
/--* t2 ref | |
[000051] -c---------- t51 = * LEA(b+4) byref | |
/--* t51 byref | |
N004 ( 5, 4) [000025] ---XG------- t25 = * IND double <l:$181, c:$1c0> | |
/--* t25 double | |
N006 ( 9, 7) [000046] DA-XG------- * STORE_LCL_VAR double V04 cse0 | |
N007 ( 3, 2) [000047] ------------ t47 = LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
/--* t47 double | |
N010 ( 16, 12) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 | |
N001 ( 3, 2) [000049] ------------ t49 = LCL_VAR double V04 cse0 (last use) <l:$181, c:$1c0> | |
N002 ( 3, 2) [000014] ------------ t14 = LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N003 ( 3, 4) [000015] -c---------- t15 = CNS_DBL double 100.00000000000000 $200 | |
/--* t14 double | |
+--* t15 double | |
N004 ( 42, 10) [000016] ------------ t16 = * DIV double $182 | |
/--* t49 double | |
+--* t16 double | |
N005 ( 50, 16) [000017] ----G------- t17 = * MUL double <l:$184, c:$183> | |
N006 ( 3, 2) [000012] ------------ t12 = LCL_VAR double V02 tmp0 u:2 (last use) <l:$181, c:$1c0> | |
/--* t17 double | |
+--* t12 double | |
N007 ( 58, 22) [000018] ----G------- t18 = * ADD double <l:$186, c:$185> | |
/--* t18 double | |
N009 ( 62, 25) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 | |
N001 ( 1, 1) [000001] ------------ t1 = LCL_VAR ref V00 this u:2 (last use) $80 | |
/--* t1 ref | |
[000052] -c---------- t52 = * LEA(b+4) byref | |
N005 ( 3, 2) [000031] ------------ t31 = LCL_VAR double V03 tmp1 u:2 (last use) <l:$186, c:$185> | |
/--* t52 byref | |
+--* t31 double | |
[000050] -A--GO------ * STOREIND double | |
( 0, 0) [000023] ------------ IL_OFFSET void IL offset: 0x1f | |
N001 ( 0, 0) [000022] ------------ RETURN void $2c0 | |
------------------------------------------------------------------------------------------------------------------- | |
*************** Exiting Lowering | |
Trees after Lowering | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
N001 ( 1, 1) [000002] ------------ t2 = LCL_VAR ref V00 this u:2 $80 | |
/--* t2 ref | |
[000051] -c---------- t51 = * LEA(b+4) byref | |
/--* t51 byref | |
N004 ( 5, 4) [000025] ---XG------- t25 = * IND double <l:$181, c:$1c0> | |
/--* t25 double | |
N006 ( 9, 7) [000046] DA-XG------- * STORE_LCL_VAR double V04 cse0 | |
N007 ( 3, 2) [000047] ------------ t47 = LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
/--* t47 double | |
N010 ( 16, 12) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 | |
N001 ( 3, 2) [000049] ------------ t49 = LCL_VAR double V04 cse0 (last use) <l:$181, c:$1c0> | |
N002 ( 3, 2) [000014] ------------ t14 = LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N003 ( 3, 4) [000015] -c---------- t15 = CNS_DBL double 100.00000000000000 $200 | |
/--* t14 double | |
+--* t15 double | |
N004 ( 42, 10) [000016] ------------ t16 = * DIV double $182 | |
/--* t49 double | |
+--* t16 double | |
N005 ( 50, 16) [000017] ----G------- t17 = * MUL double <l:$184, c:$183> | |
N006 ( 3, 2) [000012] ------------ t12 = LCL_VAR double V02 tmp0 u:2 (last use) <l:$181, c:$1c0> | |
/--* t17 double | |
+--* t12 double | |
N007 ( 58, 22) [000018] ----G------- t18 = * ADD double <l:$186, c:$185> | |
/--* t18 double | |
N009 ( 62, 25) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 | |
N001 ( 1, 1) [000001] ------------ t1 = LCL_VAR ref V00 this u:2 (last use) $80 | |
/--* t1 ref | |
[000052] -c---------- t52 = * LEA(b+4) byref | |
N005 ( 3, 2) [000031] ------------ t31 = LCL_VAR double V03 tmp1 u:2 (last use) <l:$186, c:$185> | |
/--* t52 byref | |
+--* t31 double | |
[000050] -A--GO------ * STOREIND double | |
( 0, 0) [000023] ------------ IL_OFFSET void IL offset: 0x1f | |
N001 ( 0, 0) [000022] ------------ RETURN void $2c0 | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
Clearing modified regs. | |
buildIntervals ======== | |
----------------- | |
LIVENESS: | |
----------------- | |
BB01 use def in out | |
{V00 V01} | |
{V02 V03 V04} | |
{V00 V01} | |
{} | |
Interval 0: RefPositions {} physReg:NA Preferences=[allInt] | |
Interval 1: RefPositions {} physReg:NA Preferences=[allFloat] | |
Interval 2: RefPositions {} physReg:NA Preferences=[allFloat] | |
Interval 3: RefPositions {} physReg:NA Preferences=[allFloat] | |
Interval 4: RefPositions {} physReg:NA Preferences=[allFloat] | |
Double alignment: | |
Bytes that could be saved by not using EBP frame: 7 | |
Sum of weighted ref counts for EBP enregistered variables: 350 | |
Sum of weighted ref counts for weighted stack based doubles: 0 | |
Predicting not to double-align ESP to save 7 bytes of code. | |
FP callee save candidate vars: {V02 V03 V04} | |
floatVarCount = 4; hasLoops = 0, singleExit = 1 | |
TUPLE STYLE DUMP BEFORE LSRA | |
LSRA Block Sequence: BB01( 1 ) | |
BB01 [000..020) (return), preds={} succs={} | |
===== | |
N001. V00(t2) | |
N000. LEA(b+4) | |
N004. IND | |
N006. V04(t46) | |
N007. V04(t47) | |
N010. V02(t10) | |
N001. V04(t49*) | |
N002. V01(t14*) | |
N003. CNS_DBL 100.00000000000000 | |
N004. DIV | |
N005. MUL | |
N006. V02(t12*) | |
N007. ADD | |
N009. V03(t36) | |
N001. V00(t1*) | |
N000. LEA(b+4) | |
N005. V03(t31*) | |
N000. STOREIND | |
N000. IL_OFFSET IL offset: 0x1f | |
N001. RETURN | |
buildIntervals second part ======== | |
Int arg V00 in reg ecx | |
<RefPosition #0 @0 RefTypeParamDef <Ivl:0 V00> BB00 regmask=[ecx] fixed> | |
<RefPosition #1 @0 RefTypeParamDef <Ivl:1 V01> BB00 regmask=[allFloat]> | |
NEW BLOCK BB01 | |
<RefPosition #2 @1 RefTypeBB BB01 regmask=[]> | |
N003 ( 1, 1) [000002] ------------ * LCL_VAR ref V00 this u:2 NA REG NA $80 | |
+<TreeNodeInfo @ 3 1=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I> | |
N003. V00(L0) | |
consume=0 produce=1 | |
N005 (???,???) [000051] -c---------- * LEA(b+4) byref REG NA | |
+<TreeNodeInfo @ 5 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I> | |
N005. LEA(b+4) | |
Contained | |
N007 ( 5, 4) [000025] ---XG------- * IND double REG NA <l:$181, c:$1c0> | |
+<TreeNodeInfo @ 7 1=1 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N007. t25 = IND | |
consume=1 produce=1 | |
at start of tree, map contains: { N005. LEA -> (3.N003) } | |
<RefPosition #3 @7 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] last> | |
Def candidates [allFloat], Use candidates [allFloat] | |
Interval 5: RefPositions {} physReg:NA Preferences=[allFloat] | |
<RefPosition #4 @8 RefTypeDef <Ivl:5> IND BB01 regmask=[allFloat]> | |
N009 ( 9, 7) [000046] DA-XG------- * STORE_LCL_VAR double V04 cse0 NA REG NA | |
+<TreeNodeInfo @ 9 0=1 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N009. V04(L4) | |
consume=1 produce=0 | |
at start of tree, map contains: { N007. IND -> (8.N007) } | |
Assigning related <L4> to <I5> | |
<RefPosition #5 @9 RefTypeUse <Ivl:5> BB01 regmask=[allFloat] last> | |
Def candidates [allFloat], Use candidates [allFloat] | |
<RefPosition #6 @10 RefTypeDef <Ivl:4 V04> STORE_LCL_VAR BB01 regmask=[allFloat] last> | |
N011 ( 3, 2) [000047] ------------ * LCL_VAR double V04 cse0 NA REG NA <l:$181, c:$1c0> | |
+<TreeNodeInfo @ 11 1=0 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N011. V04(L4) | |
consume=0 produce=1 | |
N013 ( 16, 12) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 NA REG NA | |
+<TreeNodeInfo @ 13 0=1 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N013. V02(L2) | |
consume=1 produce=0 | |
at start of tree, map contains: { N011. LCL_VAR -> (11.N011) } | |
<RefPosition #7 @13 RefTypeUse <Ivl:4 V04> LCL_VAR BB01 regmask=[allFloat] last> | |
Def candidates [allFloat], Use candidates [allFloat] | |
<RefPosition #8 @14 RefTypeDef <Ivl:2 V02> STORE_LCL_VAR BB01 regmask=[allFloat] last> | |
N015 ( 3, 2) [000049] ------------ * LCL_VAR double V04 cse0 NA (last use) REG NA <l:$181, c:$1c0> | |
+<TreeNodeInfo @ 15 1=0 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I O> | |
N015. V04(L4) | |
consume=0 produce=1 | |
N017 ( 3, 2) [000014] ------------ * LCL_VAR double V01 arg1 u:2 NA (last use) REG NA $c0 | |
+<TreeNodeInfo @ 17 1=0 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N017. V01(L1) | |
consume=0 produce=1 | |
N019 ( 3, 4) [000015] -c---------- * CNS_DBL double 100.00000000000000 REG NA $200 | |
+<TreeNodeInfo @ 19 0=0 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N019. CNS_DBL 100.00000000000000 REG NA | |
Contained | |
N021 ( 42, 10) [000016] ------------ * DIV double REG NA $182 | |
+<TreeNodeInfo @ 21 1=1 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N021. t16 = DIV | |
consume=1 produce=1 | |
at start of tree, map contains: { N017. LCL_VAR -> (17.N017); N015. LCL_VAR -> (15.N015) } | |
<RefPosition #9 @21 RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[allFloat] last> | |
Def candidates [allFloat], Use candidates [allFloat] | |
Interval 6: RefPositions {} physReg:NA Preferences=[allFloat] | |
Assigning related <L1> to <I6> | |
<RefPosition #10 @22 RefTypeDef <Ivl:6> DIV BB01 regmask=[allFloat]> | |
N023 ( 50, 16) [000017] ----G------- * MUL double REG NA <l:$184, c:$183> | |
+<TreeNodeInfo @ 23 1=2 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N023. t17 = MUL | |
consume=2 produce=1 | |
at start of tree, map contains: { N015. LCL_VAR -> (15.N015); N021. DIV -> (22.N021) } | |
<RefPosition #11 @23 RefTypeUse <Ivl:4 V04> LCL_VAR BB01 regmask=[allFloat] last> | |
<RefPosition #12 @23 RefTypeUse <Ivl:6> BB01 regmask=[allFloat] last> | |
Def candidates [allFloat], Use candidates [allFloat] | |
Interval 7: RefPositions {} physReg:NA Preferences=[allFloat] | |
Assigning related <L4> to <I7> | |
<RefPosition #13 @24 RefTypeDef <Ivl:7> MUL BB01 regmask=[allFloat]> | |
N025 ( 3, 2) [000012] ------------ * LCL_VAR double V02 tmp0 u:2 NA (last use) REG NA <l:$181, c:$1c0> | |
+<TreeNodeInfo @ 25 1=0 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I O> | |
N025. V02(L2) | |
consume=0 produce=1 | |
N027 ( 58, 22) [000018] ----G------- * ADD double REG NA <l:$186, c:$185> | |
+<TreeNodeInfo @ 27 1=2 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N027. t18 = ADD | |
consume=2 produce=1 | |
at start of tree, map contains: { N025. LCL_VAR -> (25.N025); N023. MUL -> (24.N023) } | |
<RefPosition #14 @27 RefTypeUse <Ivl:7> BB01 regmask=[allFloat] last> | |
<RefPosition #15 @27 RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[allFloat] last> | |
Def candidates [allFloat], Use candidates [allFloat] | |
Interval 8: RefPositions {} physReg:NA Preferences=[allFloat] | |
Assigning related <I7> to <I8> | |
<RefPosition #16 @28 RefTypeDef <Ivl:8> ADD BB01 regmask=[allFloat]> | |
N029 ( 62, 25) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 NA REG NA | |
+<TreeNodeInfo @ 29 0=1 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N029. V03(L3) | |
consume=1 produce=0 | |
at start of tree, map contains: { N027. ADD -> (28.N027) } | |
Assigning related <L3> to <I8> | |
<RefPosition #17 @29 RefTypeUse <Ivl:8> BB01 regmask=[allFloat] last> | |
Def candidates [allFloat], Use candidates [allFloat] | |
<RefPosition #18 @30 RefTypeDef <Ivl:3 V03> STORE_LCL_VAR BB01 regmask=[allFloat] last> | |
N031 ( 1, 1) [000001] ------------ * LCL_VAR ref V00 this u:2 NA (last use) REG NA $80 | |
+<TreeNodeInfo @ 31 1=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I> | |
N031. V00(L0) | |
consume=0 produce=1 | |
N033 (???,???) [000052] -c---------- * LEA(b+4) byref REG NA | |
+<TreeNodeInfo @ 33 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I> | |
N033. LEA(b+4) | |
Contained | |
N035 ( 3, 2) [000031] ------------ * LCL_VAR double V03 tmp1 u:2 NA (last use) REG NA <l:$186, c:$185> | |
+<TreeNodeInfo @ 35 1=0 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N035. V03(L3) | |
consume=0 produce=1 | |
N037 (???,???) [000050] -A--GO------ * STOREIND double REG NA | |
+<TreeNodeInfo @ 37 0=2 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N037. STOREIND | |
consume=2 produce=0 | |
at start of tree, map contains: { N035. LCL_VAR -> (35.N035); N033. LEA -> (31.N031) } | |
<RefPosition #19 @37 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] last> | |
<RefPosition #20 @37 RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[allFloat] last> | |
N039 ( 0, 0) [000023] ------------ * IL_OFFSET void IL offset: 0x1f REG NA | |
+<TreeNodeInfo @ 39 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I> | |
N039. IL_OFFSET IL offset: 0x1f REG NA | |
consume=0 produce=0 | |
N041 ( 0, 0) [000022] ------------ * RETURN void REG NA $2c0 | |
+<TreeNodeInfo @ 41 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I> | |
N041. RETURN | |
consume=0 produce=0 | |
CHECKING LAST USES for block 1, liveout={} | |
============================== | |
use: {V00 V01} | |
def: {V02 V03 V04} | |
Linear scan intervals BEFORE VALIDATING INTERVALS: | |
Interval 0: (V00) RefPositions {#0@0 #3@7 #19@37} physReg:ecx Preferences=[ecx] | |
Interval 1: (V01) RefPositions {#1@0 #9@21} physReg:NA Preferences=[allFloat] | |
Interval 2: (V02) RefPositions {#8@14 #15@27} physReg:NA Preferences=[allFloat] | |
Interval 3: (V03) RefPositions {#18@30 #20@37} physReg:NA Preferences=[allFloat] | |
Interval 4: (V04) RefPositions {#6@10 #7@13 #11@23} physReg:NA Preferences=[allFloat] | |
Interval 5: RefPositions {#4@8 #5@9} physReg:NA Preferences=[allFloat] RelatedInterval <L4>[0326BE5C] | |
Interval 6: RefPositions {#10@22 #12@23} physReg:NA Preferences=[allFloat] RelatedInterval <L1>[0326BDC0] | |
Interval 7: RefPositions {#13@24 #14@27} physReg:NA Preferences=[allFloat] RelatedInterval <L4>[0326BE5C] | |
Interval 8: RefPositions {#16@28 #17@29} physReg:NA Preferences=[allFloat] RelatedInterval <L3>[0326BE28] | |
------------ | |
REFPOSITIONS BEFORE VALIDATING INTERVALS: | |
------------ | |
<RefPosition #0 @0 ->#3 RefTypeParamDef <Ivl:0 V00> BB00 regmask=[ecx] fixed> | |
<RefPosition #1 @0 ->#9 RefTypeParamDef <Ivl:1 V01> BB00 regmask=[allFloat]> | |
<RefPosition #2 @1 RefTypeBB BB01 regmask=[]> | |
<RefPosition #3 @7 ->#19 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt]> | |
<RefPosition #4 @8 ->#5 RefTypeDef <Ivl:5> IND BB01 regmask=[allFloat]> | |
<RefPosition #5 @9 RefTypeUse <Ivl:5> BB01 regmask=[allFloat] last> | |
<RefPosition #6 @10 ->#7 RefTypeDef <Ivl:4 V04> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #7 @13 ->#11 RefTypeUse <Ivl:4 V04> LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #8 @14 ->#15 RefTypeDef <Ivl:2 V02> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #9 @21 RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[allFloat] last> | |
<RefPosition #10 @22 ->#12 RefTypeDef <Ivl:6> DIV BB01 regmask=[allFloat]> | |
<RefPosition #11 @23 RefTypeUse <Ivl:4 V04> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
<RefPosition #12 @23 RefTypeUse <Ivl:6> BB01 regmask=[allFloat] last> | |
<RefPosition #13 @24 ->#14 RefTypeDef <Ivl:7> MUL BB01 regmask=[allFloat]> | |
<RefPosition #14 @27 RefTypeUse <Ivl:7> BB01 regmask=[allFloat] last> | |
<RefPosition #15 @27 RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
<RefPosition #16 @28 ->#17 RefTypeDef <Ivl:8> ADD BB01 regmask=[allFloat]> | |
<RefPosition #17 @29 RefTypeUse <Ivl:8> BB01 regmask=[allFloat] last> | |
<RefPosition #18 @30 ->#20 RefTypeDef <Ivl:3 V03> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #19 @37 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] last> | |
<RefPosition #20 @37 RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[allFloat] last> | |
----------------- | |
<RefPosition #0 @0 ->#3 RefTypeParamDef <Ivl:0 V00> BB00 regmask=[ecx] fixed> | |
<RefPosition #3 @7 ->#19 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt]> | |
<RefPosition #19 @37 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] last> | |
----------------- | |
<RefPosition #8 @14 ->#15 RefTypeDef <Ivl:2 V02> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #15 @27 RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
----------------- | |
<RefPosition #18 @30 ->#20 RefTypeDef <Ivl:3 V03> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #20 @37 RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[allFloat] last> | |
----------------- | |
<RefPosition #6 @10 ->#7 RefTypeDef <Ivl:4 V04> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #7 @13 ->#11 RefTypeUse <Ivl:4 V04> LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #11 @23 RefTypeUse <Ivl:4 V04> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
----------------- | |
<RefPosition #1 @0 ->#9 RefTypeParamDef <Ivl:1 V01> BB00 regmask=[allFloat]> | |
<RefPosition #9 @21 RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[allFloat] last> | |
TUPLE STYLE DUMP WITH REF POSITIONS | |
Incoming Parameters: V00 V01 | |
BB01 [000..020) (return), preds={} succs={} | |
===== | |
N003. V00(L0) | |
N005. LEA(b+4) | |
N007. IND | |
Use:<L0>(#3) | |
Def:<I5>(#4) Pref:<L4> | |
N009. V04(L4) | |
Use:<I5>(#5) * | |
Def:<L4>(#6) | |
N011. V04(L4) | |
N013. V02(L2) | |
Use:<L4>(#7) | |
Def:<L2>(#8) | |
N015. V04(L4) | |
N017. V01(L1) | |
N019. CNS_DBL 100.00000000000000 REG NA | |
N021. DIV | |
Use:<L1>(#9) * | |
Def:<I6>(#10) Pref:<L1> | |
N023. MUL | |
Use:<L4>(#11) * | |
Use:<I6>(#12) * | |
Def:<I7>(#13) Pref:<L4> | |
N025. V02(L2) | |
N027. ADD | |
Use:<I7>(#14) * | |
Use:<L2>(#15) * | |
Def:<I8>(#16) Pref:<L3> | |
N029. V03(L3) | |
Use:<I8>(#17) * | |
Def:<L3>(#18) | |
N031. V00(L0) | |
N033. LEA(b+4) | |
N035. V03(L3) | |
N037. STOREIND | |
Use:<L0>(#19) * | |
Use:<L3>(#20) * | |
N039. IL_OFFSET IL offset: 0x1f REG NA | |
N041. RETURN | |
Linear scan intervals after buildIntervals: | |
Interval 0: (V00) RefPositions {#0@0 #3@7 #19@37} physReg:ecx Preferences=[ecx] | |
Interval 1: (V01) RefPositions {#1@0 #9@21} physReg:NA Preferences=[allFloat] | |
Interval 2: (V02) RefPositions {#8@14 #15@27} physReg:NA Preferences=[allFloat] | |
Interval 3: (V03) RefPositions {#18@30 #20@37} physReg:NA Preferences=[allFloat] | |
Interval 4: (V04) RefPositions {#6@10 #7@13 #11@23} physReg:NA Preferences=[allFloat] | |
Interval 5: RefPositions {#4@8 #5@9} physReg:NA Preferences=[allFloat] RelatedInterval <L4>[0326BE5C] | |
Interval 6: RefPositions {#10@22 #12@23} physReg:NA Preferences=[allFloat] RelatedInterval <L1>[0326BDC0] | |
Interval 7: RefPositions {#13@24 #14@27} physReg:NA Preferences=[allFloat] RelatedInterval <L4>[0326BE5C] | |
Interval 8: RefPositions {#16@28 #17@29} physReg:NA Preferences=[allFloat] RelatedInterval <L3>[0326BE28] | |
*************** In LinearScan::allocateRegisters() | |
Linear scan intervals before allocateRegisters: | |
Interval 0: (V00) RefPositions {#0@0 #3@7 #19@37} physReg:ecx Preferences=[ecx] | |
Interval 1: (V01) RefPositions {#1@0 #9@21} physReg:NA Preferences=[allFloat] | |
Interval 2: (V02) RefPositions {#8@14 #15@27} physReg:NA Preferences=[allFloat] | |
Interval 3: (V03) RefPositions {#18@30 #20@37} physReg:NA Preferences=[allFloat] | |
Interval 4: (V04) RefPositions {#6@10 #7@13 #11@23} physReg:NA Preferences=[allFloat] | |
Interval 5: RefPositions {#4@8 #5@9} physReg:NA Preferences=[allFloat] RelatedInterval <L4>[0326BE5C] | |
Interval 6: RefPositions {#10@22 #12@23} physReg:NA Preferences=[allFloat] RelatedInterval <L1>[0326BDC0] | |
Interval 7: RefPositions {#13@24 #14@27} physReg:NA Preferences=[allFloat] RelatedInterval <L4>[0326BE5C] | |
Interval 8: RefPositions {#16@28 #17@29} physReg:NA Preferences=[allFloat] RelatedInterval <L3>[0326BE28] | |
------------ | |
REFPOSITIONS BEFORE ALLOCATION: | |
------------ | |
<RefPosition #0 @0 ->#3 RefTypeParamDef <Ivl:0 V00> BB00 regmask=[ecx] fixed> | |
<RefPosition #1 @0 ->#9 RefTypeParamDef <Ivl:1 V01> BB00 regmask=[allFloat]> | |
<RefPosition #2 @1 RefTypeBB BB01 regmask=[]> | |
<RefPosition #3 @7 ->#19 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt]> | |
<RefPosition #4 @8 ->#5 RefTypeDef <Ivl:5> IND BB01 regmask=[allFloat]> | |
<RefPosition #5 @9 RefTypeUse <Ivl:5> BB01 regmask=[allFloat] last> | |
<RefPosition #6 @10 ->#7 RefTypeDef <Ivl:4 V04> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #7 @13 ->#11 RefTypeUse <Ivl:4 V04> LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #8 @14 ->#15 RefTypeDef <Ivl:2 V02> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #9 @21 RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[allFloat] last> | |
<RefPosition #10 @22 ->#12 RefTypeDef <Ivl:6> DIV BB01 regmask=[allFloat]> | |
<RefPosition #11 @23 RefTypeUse <Ivl:4 V04> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
<RefPosition #12 @23 RefTypeUse <Ivl:6> BB01 regmask=[allFloat] last> | |
<RefPosition #13 @24 ->#14 RefTypeDef <Ivl:7> MUL BB01 regmask=[allFloat]> | |
<RefPosition #14 @27 RefTypeUse <Ivl:7> BB01 regmask=[allFloat] last> | |
<RefPosition #15 @27 RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
<RefPosition #16 @28 ->#17 RefTypeDef <Ivl:8> ADD BB01 regmask=[allFloat]> | |
<RefPosition #17 @29 RefTypeUse <Ivl:8> BB01 regmask=[allFloat] last> | |
<RefPosition #18 @30 ->#20 RefTypeDef <Ivl:3 V03> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #19 @37 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] last> | |
<RefPosition #20 @37 RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[allFloat] last> | |
VAR REFPOSITIONS BEFORE ALLOCATION | |
--- V00 | |
<RefPosition #0 @0 ->#3 RefTypeParamDef <Ivl:0 V00> BB00 regmask=[ecx] fixed> | |
<RefPosition #3 @7 ->#19 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt]> | |
<RefPosition #19 @37 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] last> | |
--- V01 | |
<RefPosition #1 @0 ->#9 RefTypeParamDef <Ivl:1 V01> BB00 regmask=[allFloat]> | |
<RefPosition #9 @21 RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[allFloat] last> | |
--- V02 | |
<RefPosition #8 @14 ->#15 RefTypeDef <Ivl:2 V02> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #15 @27 RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
--- V03 | |
<RefPosition #18 @30 ->#20 RefTypeDef <Ivl:3 V03> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #20 @37 RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[allFloat] last> | |
--- V04 | |
<RefPosition #6 @10 ->#7 RefTypeDef <Ivl:4 V04> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #7 @13 ->#11 RefTypeUse <Ivl:4 V04> LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #11 @23 RefTypeUse <Ivl:4 V04> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
Allocating Registers | |
-------------------- | |
The following table has one or more rows for each RefPosition that is handled during allocation. | |
The first column provides the basic information about the RefPosition, with its type (e.g. Def, | |
Use, Fixd) followed by a '*' if it is a last use, and a 'D' if it is delayRegFree, and then the | |
action taken during allocation (e.g. Alloc a new register, or Keep an existing one). | |
The subsequent columns show the Interval occupying each register, if any, followed by 'a' if it is | |
active, and 'i'if it is inactive. Columns are only printed up to the last modifed register, which | |
may increase during allocation, in which case additional columns will appear. Registers which are | |
not marked modified have ---- in their column. | |
------------------------------+----+----+ | |
LocRP# Name Type Action Reg |eax |ecx | | |
------------------------------+----+----+ | |
|----|V0 a| | |
0.#0 V0 Parm Keep ecx |----|V0 a| | |
0.#1 V1 Parm Alloc mm0 |----|V0 a|----|----|----|----|----|----|V1 a| | |
1.#2 BB1 PredBB0 |----|V0 a|----|----|----|----|----|----|V1 a| | |
7.#3 V0 Use Keep ecx |----|V0 a|----|----|----|----|----|----|V1 a| | |
8.#4 I5 Def Alloc mm1 |----|V0 a|----|----|----|----|----|----|V1 a|I5 a| | |
9.#5 I5 Use * Keep mm1 |----|V0 a|----|----|----|----|----|----|V1 a|I5 a| | |
10.#6 V4 Def Alloc mm1 |----|V0 a|----|----|----|----|----|----|V1 a|V4 a| | |
13.#7 V4 Use Keep mm1 |----|V0 a|----|----|----|----|----|----|V1 a|V4 a| | |
14.#8 V2 Def Alloc mm2 |----|V0 a|----|----|----|----|----|----|V1 a|V4 a|V2 a| | |
21.#9 V1 Use * Keep mm0 |----|V0 a|----|----|----|----|----|----|V1 a|V4 a|V2 a| | |
22.#10 I6 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|I6 a|V4 a|V2 a| | |
23.#11 V4 Use * Keep mm1 |----|V0 a|----|----|----|----|----|----|I6 a|V4 a|V2 a| | |
23.#12 I6 Use * Keep mm0 |----|V0 a|----|----|----|----|----|----|I6 a|V4 a|V2 a| | |
24.#13 I7 Def Alloc mm1 |----|V0 a|----|----|----|----|----|----| |I7 a|V2 a| | |
27.#14 I7 Use * Keep mm1 |----|V0 a|----|----|----|----|----|----| |I7 a|V2 a| | |
27.#15 V2 Use * Keep mm2 |----|V0 a|----|----|----|----|----|----| |I7 a|V2 a| | |
28.#16 I8 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|I8 a| | | | |
29.#17 I8 Use * Keep mm0 |----|V0 a|----|----|----|----|----|----|I8 a| | | | |
30.#18 V3 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|V3 a| | | | |
37.#19 V0 Use * Keep ecx |----|V0 a|----|----|----|----|----|----|V3 a| | | | |
37.#20 V3 Use * Keep mm0 |----| |----|----|----|----|----|----| | | | | |
------------ | |
REFPOSITIONS AFTER ALLOCATION: | |
------------ | |
<RefPosition #0 @0 ->#3 RefTypeParamDef <Ivl:0 V00> BB00 regmask=[ecx] fixed> | |
<RefPosition #1 @0 ->#9 RefTypeParamDef <Ivl:1 V01> BB00 regmask=[mm0]> | |
<RefPosition #2 @1 RefTypeBB BB01 regmask=[]> | |
<RefPosition #3 @7 ->#19 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[ecx]> | |
<RefPosition #4 @8 ->#5 RefTypeDef <Ivl:5> IND BB01 regmask=[mm1]> | |
<RefPosition #5 @9 RefTypeUse <Ivl:5> BB01 regmask=[mm1] last> | |
<RefPosition #6 @10 ->#7 RefTypeDef <Ivl:4 V04> STORE_LCL_VAR BB01 regmask=[mm1]> | |
<RefPosition #7 @13 ->#11 RefTypeUse <Ivl:4 V04> LCL_VAR BB01 regmask=[mm1]> | |
<RefPosition #8 @14 ->#15 RefTypeDef <Ivl:2 V02> STORE_LCL_VAR BB01 regmask=[mm2]> | |
<RefPosition #9 @21 RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[mm0] last> | |
<RefPosition #10 @22 ->#12 RefTypeDef <Ivl:6> DIV BB01 regmask=[mm0]> | |
<RefPosition #11 @23 RefTypeUse <Ivl:4 V04> LCL_VAR BB01 regmask=[mm1] last regOptional> | |
<RefPosition #12 @23 RefTypeUse <Ivl:6> BB01 regmask=[mm0] last> | |
<RefPosition #13 @24 ->#14 RefTypeDef <Ivl:7> MUL BB01 regmask=[mm1]> | |
<RefPosition #14 @27 RefTypeUse <Ivl:7> BB01 regmask=[mm1] last> | |
<RefPosition #15 @27 RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[mm2] last regOptional> | |
<RefPosition #16 @28 ->#17 RefTypeDef <Ivl:8> ADD BB01 regmask=[mm0]> | |
<RefPosition #17 @29 RefTypeUse <Ivl:8> BB01 regmask=[mm0] last> | |
<RefPosition #18 @30 ->#20 RefTypeDef <Ivl:3 V03> STORE_LCL_VAR BB01 regmask=[mm0]> | |
<RefPosition #19 @37 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[ecx] last> | |
<RefPosition #20 @37 RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[mm0] last> | |
VAR REFPOSITIONS AFTER ALLOCATION | |
--- V00 | |
<RefPosition #0 @0 ->#3 RefTypeParamDef <Ivl:0 V00> BB00 regmask=[ecx] fixed> | |
<RefPosition #3 @7 ->#19 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[ecx]> | |
<RefPosition #19 @37 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[ecx] last> | |
--- V01 | |
<RefPosition #1 @0 ->#9 RefTypeParamDef <Ivl:1 V01> BB00 regmask=[mm0]> | |
<RefPosition #9 @21 RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[mm0] last> | |
--- V02 | |
<RefPosition #8 @14 ->#15 RefTypeDef <Ivl:2 V02> STORE_LCL_VAR BB01 regmask=[mm2]> | |
<RefPosition #15 @27 RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[mm2] last regOptional> | |
--- V03 | |
<RefPosition #18 @30 ->#20 RefTypeDef <Ivl:3 V03> STORE_LCL_VAR BB01 regmask=[mm0]> | |
<RefPosition #20 @37 RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[mm0] last> | |
--- V04 | |
<RefPosition #6 @10 ->#7 RefTypeDef <Ivl:4 V04> STORE_LCL_VAR BB01 regmask=[mm1]> | |
<RefPosition #7 @13 ->#11 RefTypeUse <Ivl:4 V04> LCL_VAR BB01 regmask=[mm1]> | |
<RefPosition #11 @23 RefTypeUse <Ivl:4 V04> LCL_VAR BB01 regmask=[mm1] last regOptional> | |
Active intervals at end of allocation: | |
----------------------- | |
RESOLVING BB BOUNDARIES | |
----------------------- | |
Resolution Candidates: {V00 V01} | |
Has NoCritical Edges | |
Prior to Resolution | |
BB01 use def in out | |
{V00 V01} | |
{V02 V03 V04} | |
{V00 V01} | |
{} | |
Var=Reg beg of BB01: V00=ecx V01=mm0 | |
Var=Reg end of BB01: none | |
RESOLVING EDGES | |
Set V00 argument initial register to ecx | |
Set V01 argument initial register to mm0 | |
Trees after linear scan register allocator (LSRA) | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
N003 ( 1, 1) [000002] ------------ t2 = LCL_VAR ref V00 this u:2 ecx REG ecx $80 | |
/--* t2 ref | |
N005 (???,???) [000051] -c---------- t51 = * LEA(b+4) byref REG NA | |
/--* t51 byref | |
N007 ( 5, 4) [000025] ---XG------- t25 = * IND double REG mm1 <l:$181, c:$1c0> | |
/--* t25 double | |
N009 ( 9, 7) [000046] DA-XG------- * STORE_LCL_VAR double V04 cse0 mm1 REG mm1 | |
N011 ( 3, 2) [000047] ------------ t47 = LCL_VAR double V04 cse0 mm1 REG mm1 <l:$181, c:$1c0> | |
/--* t47 double | |
N013 ( 16, 12) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 mm2 REG mm2 | |
N015 ( 3, 2) [000049] ------------ t49 = LCL_VAR double V04 cse0 mm1 (last use) REG mm1 <l:$181, c:$1c0> | |
N017 ( 3, 2) [000014] ------------ t14 = LCL_VAR double V01 arg1 u:2 mm0 (last use) REG mm0 $c0 | |
N019 ( 3, 4) [000015] -c---------- t15 = CNS_DBL double 100.00000000000000 REG NA $200 | |
/--* t14 double | |
+--* t15 double | |
N021 ( 42, 10) [000016] ------------ t16 = * DIV double REG mm0 $182 | |
/--* t49 double | |
+--* t16 double | |
N023 ( 50, 16) [000017] ----G------- t17 = * MUL double REG mm1 <l:$184, c:$183> | |
N025 ( 3, 2) [000012] ------------ t12 = LCL_VAR double V02 tmp0 u:2 mm2 (last use) REG mm2 <l:$181, c:$1c0> | |
/--* t17 double | |
+--* t12 double | |
N027 ( 58, 22) [000018] ----G------- t18 = * ADD double REG mm0 <l:$186, c:$185> | |
/--* t18 double | |
N029 ( 62, 25) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 mm0 REG mm0 | |
N031 ( 1, 1) [000001] ------------ t1 = LCL_VAR ref V00 this u:2 ecx (last use) REG ecx $80 | |
/--* t1 ref | |
N033 (???,???) [000052] -c---------- t52 = * LEA(b+4) byref REG NA | |
N035 ( 3, 2) [000031] ------------ t31 = LCL_VAR double V03 tmp1 u:2 mm0 (last use) REG mm0 <l:$186, c:$185> | |
/--* t52 byref | |
+--* t31 double | |
N037 (???,???) [000050] -A--GO------ * STOREIND double REG NA | |
N039 ( 0, 0) [000023] ------------ IL_OFFSET void IL offset: 0x1f REG NA | |
N041 ( 0, 0) [000022] ------------ RETURN void REG NA $2c0 | |
------------------------------------------------------------------------------------------------------------------- | |
Final allocation | |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+ | |
LocRP# Name Type Action Reg |eax |ecx |edx |ebx |esp |ebp |esi |edi |mm0 |mm1 |mm2 | | |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+ | |
0.#0 V0 Parm Alloc ecx |----|V0 a|----|----|----|----|----|----| | | | | |
0.#1 V1 Parm Alloc mm0 |----|V0 a|----|----|----|----|----|----|V1 a| | | | |
1.#2 BB1 PredBB0 |----|V0 a|----|----|----|----|----|----|V1 a| | | | |
7.#3 V0 Use Keep ecx |----|V0 a|----|----|----|----|----|----|V1 a| | | | |
8.#4 I5 Def Alloc mm1 |----|V0 a|----|----|----|----|----|----|V1 a|I5 a| | | |
9.#5 I5 Use * Keep mm1 |----|V0 a|----|----|----|----|----|----|V1 a|I5 i| | | |
10.#6 V4 Def Alloc mm1 |----|V0 a|----|----|----|----|----|----|V1 a|V4 a| | | |
13.#7 V4 Use Keep mm1 |----|V0 a|----|----|----|----|----|----|V1 a|V4 a| | | |
14.#8 V2 Def Alloc mm2 |----|V0 a|----|----|----|----|----|----|V1 a|V4 a|V2 a| | |
21.#9 V1 Use * Keep mm0 |----|V0 a|----|----|----|----|----|----|V1 i|V4 a|V2 a| | |
22.#10 I6 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|I6 a|V4 a|V2 a| | |
23.#11 V4 Use * Keep mm1 |----|V0 a|----|----|----|----|----|----|I6 a|V4 i|V2 a| | |
23.#12 I6 Use * Keep mm0 |----|V0 a|----|----|----|----|----|----|I6 i| |V2 a| | |
24.#13 I7 Def Alloc mm1 |----|V0 a|----|----|----|----|----|----| |I7 a|V2 a| | |
27.#14 I7 Use * Keep mm1 |----|V0 a|----|----|----|----|----|----| |I7 i|V2 a| | |
27.#15 V2 Use * Keep mm2 |----|V0 a|----|----|----|----|----|----| | |V2 i| | |
28.#16 I8 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|I8 a| | | | |
29.#17 I8 Use * Keep mm0 |----|V0 a|----|----|----|----|----|----|I8 i| | | | |
30.#18 V3 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|V3 a| | | | |
37.#19 V0 Use * Keep ecx |----|V0 i|----|----|----|----|----|----|V3 a| | | | |
37.#20 V3 Use * Keep mm0 |----| |----|----|----|----|----|----|V3 i| | | | |
Recording the maximum number of concurrent spills: | |
---------- | |
LSRA Stats | |
---------- | |
Total Tracked Vars: 5 | |
Total Reg Cand Vars: 5 | |
Total number of Intervals: 8 | |
Total number of RefPositions: 20 | |
Total Spill Count: 0 Weighted: 0 | |
Total CopyReg Count: 0 Weighted: 0 | |
Total ResolutionMov Count: 0 Weighted: 0 | |
Total number of split edges: 0 | |
Total Number of spill temps created: 0 | |
TUPLE STYLE DUMP WITH REGISTER ASSIGNMENTS | |
Incoming Parameters: V00(ecx) V01(STK=>mm0) | |
BB01 [000..020) (return), preds={} succs={} | |
===== | |
N003. V00(ecx) | |
N005. LEA(b+4) | |
N007. mm1 = IND ; ecx | |
* N009. V04(mm1); mm1 | |
N011. V04(mm1) | |
* N013. V02(mm2); mm1 | |
N015. V04(mm1*) | |
N017. V01(mm0*) | |
N019. CNS_DBL 100.00000000000000 REG NA | |
N021. mm0 = DIV ; mm0* | |
N023. mm1 = MUL ; mm1*,mm0 | |
N025. V02(mm2*) | |
N027. mm0 = ADD ; mm1,mm2* | |
* N029. V03(mm0); mm0 | |
N031. V00(ecx*) | |
N033. LEA(b+4) | |
N035. V03(mm0*) | |
N037. STOREIND ; ecx*,mm0* | |
N039. IL_OFFSET IL offset: 0x1f REG NA | |
N041. RETURN | |
Var=Reg end of BB01: none | |
*************** In genGenerateCode() | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
; Assembly listing for method _1020.MethodBelow:RaiseValue(double):this | |
; Emitting BLENDED_CODE for generic X86 CPU | |
; optimized code | |
; ebp based frame | |
; partially interruptible | |
Finalizing stack frame | |
Recording Var Locations at start of BB01 | |
V00(ecx) V01(mm0) | |
Modified regs: [ecx mm0-mm2] | |
Callee-saved registers pushed: 0 [] | |
*************** In lvaAssignFrameOffsets(FINAL_FRAME_LAYOUT) | |
; Final local variable assignments | |
; | |
; V00 this [V00,T00] ( 6, 6 ) ref -> ecx this class-hnd | |
; V01 arg1 [V01,T04] ( 2, 2 ) double -> mm0 | |
; V02 tmp0 [V02,T01] ( 4, 8 ) double -> mm2 | |
; V03 tmp1 [V03,T02] ( 4, 8 ) double -> mm0 | |
; V04 cse0 [V04,T03] ( 6, 6 ) double -> mm1 | |
; | |
; Lcl frame size = 0 | |
=============== Generating BB01 [000..020) (return), preds={} succs={} flags=0x00000000.40030020: i label target LIR | |
BB01 IN (2)={V00 V01} + ByrefExposed + GcHeap | |
OUT(0)={ } | |
Recording Var Locations at start of BB01 | |
V00(ecx) V01(mm0) | |
Change life 00000000 {} -> 00000011 {V00 V01} | |
V00 in reg ecx is becoming live [------] | |
Live regs: 00000000 {} => 00000002 {ecx} | |
V01 in reg mm0 is becoming live [------] | |
Live regs: 00000002 {ecx} => 00000002 {ecx xmm0} | |
Live regs: (unchanged) 00000002 {ecx xmm0} | |
GC regs: (unchanged) 00000002 {ecx} | |
Byref regs: (unchanged) 00000000 {} | |
L_M22417_BB01: | |
Label: IG02, GCvars=00000000 {}, gcrefRegs=00000002 {ecx}, byrefRegs=00000000 {} | |
Setting stack level from -1 to 0 | |
Scope info: begin block BB01, IL range [000..020) | |
Scope info: open scopes = | |
0 (V00 this) [000..020) | |
1 (V01 arg1) [000..020) | |
Generating: N003 ( 1, 1) [000002] ------------ t2 = LCL_VAR ref V00 this u:2 ecx REG ecx $80 | |
/--* t2 ref | |
Generating: N005 (???,???) [000051] -c---------- t51 = * LEA(b+4) byref REG NA | |
/--* t51 byref | |
Generating: N007 ( 5, 4) [000025] ---XG------- t25 = * IND double REG mm1 <l:$181, c:$1c0> | |
IN0001: vmovsd xmm1, qword ptr [ecx+4] | |
/--* t25 double | |
Generating: N009 ( 9, 7) [000046] DA-XG------- * STORE_LCL_VAR double V04 cse0 mm1 REG mm1 | |
V04 in reg mm1 is becoming live [000046] | |
Live regs: 00000002 {ecx xmm0} => 00000002 {ecx xmm0 xmm1} | |
Live vars: {V00 V01} => {V00 V01 V04} | |
Generating: N011 ( 3, 2) [000047] ------------ t47 = LCL_VAR double V04 cse0 mm1 REG mm1 <l:$181, c:$1c0> | |
/--* t47 double | |
Generating: N013 ( 16, 12) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 mm2 REG mm2 | |
IN0002: vmovaps xmm2, xmm1 | |
V02 in reg mm2 is becoming live [000010] | |
Live regs: 00000002 {ecx xmm0 xmm1} => 00000002 {ecx xmm0 xmm1 xmm2} | |
Live vars: {V00 V01 V04} => {V00 V01 V02 V04} | |
Generating: N015 ( 3, 2) [000049] ------------ t49 = LCL_VAR double V04 cse0 mm1 (last use) REG mm1 <l:$181, c:$1c0> | |
Generating: N017 ( 3, 2) [000014] ------------ t14 = LCL_VAR double V01 arg1 u:2 mm0 (last use) REG mm0 $c0 | |
Generating: N019 ( 3, 4) [000015] -c---------- t15 = CNS_DBL double 100.00000000000000 REG NA $200 | |
/--* t14 double | |
+--* t15 double | |
Generating: N021 ( 42, 10) [000016] ------------ t16 = * DIV double REG mm0 $182 | |
V01 in reg mm0 is becoming dead [000014] | |
Live regs: 00000002 {ecx xmm0 xmm1 xmm2} => 00000002 {ecx xmm1 xmm2} | |
Live vars: {V00 V01 V02 V04} => {V00 V02 V04} | |
IN0003: vdivsd xmm0, qword ptr [@RWD00] | |
/--* t49 double | |
+--* t16 double | |
Generating: N023 ( 50, 16) [000017] ----G------- t17 = * MUL double REG mm1 <l:$184, c:$183> | |
V04 in reg mm1 is becoming dead [000049] | |
Live regs: 00000002 {ecx xmm1 xmm2} => 00000002 {ecx xmm2} | |
Live vars: {V00 V02 V04} => {V00 V02} | |
IN0004: vmulsd xmm1, xmm0 | |
Generating: N025 ( 3, 2) [000012] ------------ t12 = LCL_VAR double V02 tmp0 u:2 mm2 (last use) REG mm2 <l:$181, c:$1c0> | |
/--* t17 double | |
+--* t12 double | |
Generating: N027 ( 58, 22) [000018] ----G------- t18 = * ADD double REG mm0 <l:$186, c:$185> | |
V02 in reg mm2 is becoming dead [000012] | |
Live regs: 00000002 {ecx xmm2} => 00000002 {ecx} | |
Live vars: {V00 V02} => {V00} | |
IN0005: vmovaps xmm0, xmm1 | |
IN0006: vaddsd xmm0, xmm2 | |
/--* t18 double | |
Generating: N029 ( 62, 25) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 mm0 REG mm0 | |
V03 in reg mm0 is becoming live [000036] | |
Live regs: 00000002 {ecx} => 00000002 {ecx xmm0} | |
Live vars: {V00} => {V00 V03} | |
Generating: N031 ( 1, 1) [000001] ------------ t1 = LCL_VAR ref V00 this u:2 ecx (last use) REG ecx $80 | |
/--* t1 ref | |
Generating: N033 (???,???) [000052] -c---------- t52 = * LEA(b+4) byref REG NA | |
Generating: N035 ( 3, 2) [000031] ------------ t31 = LCL_VAR double V03 tmp1 u:2 mm0 (last use) REG mm0 <l:$186, c:$185> | |
/--* t52 byref | |
+--* t31 double | |
Generating: N037 (???,???) [000050] -A--GO------ * STOREIND double REG NA | |
V00 in reg ecx is becoming dead [000001] | |
Live regs: 00000002 {ecx xmm0} => 00000000 {xmm0} | |
Live vars: {V00 V03} => {V03} | |
GC regs: 00000002 {ecx} => 00000000 {} | |
V03 in reg mm0 is becoming dead [000031] | |
Live regs: 00000000 {xmm0} => 00000000 {} | |
Live vars: {V03} => {} | |
IN0007: vmovsd qword ptr [ecx+4], xmm0 | |
Added IP mapping: 0x001F STACK_EMPTY (G_M22417_IG02,ins#7,ofs#41) label | |
Generating: N039 ( 0, 0) [000023] ------------ IL_OFFSET void IL offset: 0x1f REG NA | |
Generating: N041 ( 0, 0) [000022] ------------ RETURN void REG NA $2c0 | |
Scope info: end block BB01, IL range [000..020) | |
Scope info: ending scope, LVnum=1 [000..020) | |
Scope info: ending scope, LVnum=0 [000..020) | |
Scope info: open scopes = | |
<none> | |
Added IP mapping: EPILOG STACK_EMPTY (G_M22417_IG02,ins#7,ofs#41) label | |
Reserving epilog IG for block BB01 | |
G_M22417_IG02: ; offs=000000H, funclet=00 | |
*************** After placeholder IG creation | |
G_M22417_IG01: ; func=00, offs=000000H, size=0000H, gcrefRegs=00000000 {} <-- Prolog IG | |
G_M22417_IG02: ; offs=000000H, size=0029H, gcrefRegs=00000002 {ecx}, byrefRegs=00000000 {}, byref | |
G_M22417_IG03: ; epilog placeholder, next placeholder=<END>, BB01 [0000], epilog, emitadd <-- First placeholder <-- Last placeholder | |
; PrevGCVars=00000000 {}, PrevGCrefRegs=00000000 {}, PrevByrefRegs=00000000 {} | |
; InitGCVars=00000000 {}, InitGCrefRegs=00000002 {ecx}, InitByrefRegs=00000000 {} | |
Liveness not changing: 00000000 {} | |
# compCycleEstimate = 87, compSizeEstimate = 44 _1020.MethodBelow:RaiseValue(double):this | |
; Final local variable assignments | |
; | |
; V00 this [V00,T00] ( 6, 6 ) ref -> ecx this class-hnd | |
; V01 arg1 [V01,T04] ( 2, 2 ) double -> mm0 | |
; V02 tmp0 [V02,T01] ( 4, 8 ) double -> mm2 | |
; V03 tmp1 [V03,T02] ( 4, 8 ) double -> mm0 | |
; V04 cse0 [V04,T03] ( 6, 6 ) double -> mm1 | |
; | |
; Lcl frame size = 0 | |
*************** Before prolog / epilog generation | |
G_M22417_IG01: ; func=00, offs=000000H, size=0000H, gcrefRegs=00000000 {} <-- Prolog IG | |
G_M22417_IG02: ; offs=000000H, size=0029H, gcrefRegs=00000002 {ecx}, byrefRegs=00000000 {}, byref | |
G_M22417_IG03: ; epilog placeholder, next placeholder=<END>, BB01 [0000], epilog, emitadd <-- First placeholder <-- Last placeholder | |
; PrevGCVars=00000000 {}, PrevGCrefRegs=00000000 {}, PrevByrefRegs=00000000 {} | |
; InitGCVars=00000000 {}, InitGCrefRegs=00000002 {ecx}, InitByrefRegs=00000000 {} | |
Recording Var Locations at start of BB01 | |
V00(ecx) V01(mm0) | |
*************** In genFnProlog() | |
Added IP mapping to front: PROLOG STACK_EMPTY (G_M22417_IG01,ins#0,ofs#0) label | |
__prolog: | |
IN0008: push ebp | |
IN0009: mov ebp, esp | |
IN000a: vzeroupper | |
*************** In genFnPrologCalleeRegArgs() for int regs | |
*************** In genEnregisterIncomingStackArgs() | |
IN000b: vmovsd xmm0, qword ptr [V01 ebp+08H] | |
G_M22417_IG01: ; offs=000000H, funclet=00 | |
*************** In genFnEpilog() | |
__epilog: | |
gcVarPtrSetCur=00000000 {}, gcRegGCrefSetCur=00000002 {ecx}, gcRegByrefSetCur=00000000 {} | |
IN000c: pop ebp | |
IN000d: ret 8 | |
G_M22417_IG03: ; offs=000029H, funclet=00 | |
0 prologs, 1 epilogs | |
*************** After prolog / epilog generation | |
G_M22417_IG01: ; func=00, offs=000000H, size=000CH, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG | |
G_M22417_IG02: ; offs=00000CH, size=0029H, gcrefRegs=00000002 {ecx}, byrefRegs=00000000 {}, byref | |
G_M22417_IG03: ; offs=000035H, size=0004H, epilog, nogc, emitadd | |
*************** In emitJumpDistBind() | |
Hot code size = 0x39 bytes | |
Cold code size = 0x0 bytes | |
*************** In emitEndCodeGen() | |
Converting emitMaxStackDepth from bytes (0) to elements (0) | |
*************************************************************************** | |
Instructions as they come out of the scheduler | |
G_M22417_IG01: ; func=00, offs=000000H, size=000CH, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG | |
IN0008: 000000 55 push ebp | |
IN0009: 000001 8BEC mov ebp, esp | |
IN000a: 000003 C5F877 vzeroupper | |
IN000b: 000006 C4E17B104508 vmovsd xmm0, qword ptr [ebp+08H] | |
G_M22417_IG02: ; func=00, offs=00000CH, size=0029H, gcrefRegs=00000002 {ecx}, byrefRegs=00000000 {}, byref | |
New gcrReg live regs=00000002 {ecx} | |
IN0001: 00000C C4E17B104904 vmovsd xmm1, qword ptr [ecx+4] | |
IN0002: 000012 C4E17828D1 vmovaps xmm2, xmm1 | |
IN0003: 000017 C4E17B5E05580DFB04 vdivsd xmm0, qword ptr [@RWD00] | |
IN0004: 000020 C4E17359C8 vmulsd xmm1, xmm0 | |
IN0005: 000025 C4E17828C1 vmovaps xmm0, xmm1 | |
IN0006: 00002A C4E17B58C2 vaddsd xmm0, xmm2 | |
IN0007: 00002F C4E17B114104 vmovsd qword ptr [ecx+4], xmm0 | |
G_M22417_IG03: ; func=00, offs=000035H, size=0004H, epilog, nogc, emitadd | |
IN000c: 000035 5D pop ebp | |
IN000d: 000036 C20800 ret 8 | |
Emitting data sections: 8 total bytes | |
section 0, size 8, raw data | |
00 00 00 00 00 00 59 40 | |
New gcrReg live regs=00000000 {} | |
Allocated method code size = 57 , actual size = 57 | |
; Total bytes of code 57, prolog size 6 for method _1020.MethodBelow:RaiseValue(double):this | |
; ============================================================ | |
*************** After end code gen, before unwindEmit() | |
G_M22417_IG01: ; func=00, offs=000000H, size=000CH, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG | |
IN0008: 000000 push ebp | |
IN0009: 000001 mov ebp, esp | |
IN000a: 000003 vzeroupper | |
IN000b: 000006 vmovsd xmm0, qword ptr [V01 ebp+08H] | |
G_M22417_IG02: ; offs=00000CH, size=0029H, gcrefRegs=00000002 {ecx}, byrefRegs=00000000 {}, byref | |
IN0001: 00000C vmovsd xmm1, qword ptr [ecx+4] | |
IN0002: 000012 vmovaps xmm2, xmm1 | |
IN0003: 000017 vdivsd xmm0, qword ptr [@RWD00] | |
IN0004: 000020 vmulsd xmm1, xmm0 | |
IN0005: 000025 vmovaps xmm0, xmm1 | |
IN0006: 00002A vaddsd xmm0, xmm2 | |
IN0007: 00002F vmovsd qword ptr [ecx+4], xmm0 | |
G_M22417_IG03: ; offs=000035H, size=0004H, epilog, nogc, emitadd | |
IN000c: 000035 pop ebp | |
IN000d: 000036 ret 8 | |
*************** In genIPmappingGen() | |
IP mapping count : 3 | |
IL offs PROLOG : 0x00000000 ( STACK_EMPTY ) | |
IL offs 0x001F : 0x00000035 ( STACK_EMPTY ) | |
IL offs EPILOG : 0x00000035 ( STACK_EMPTY ) | |
*************** In genSetScopeInfo() | |
VarLocInfo count is 4 | |
*************** Variable debug info | |
4 vars | |
1( UNKNOWN) : From 00000000h to 0000000Ch, in esp[4] (1 slot) | |
0( UNKNOWN) : From 00000000h to 0000000Ch, in ecx | |
1( UNKNOWN) : From 0000000Ch to 00000017h, in ST(L-8) | |
0( UNKNOWN) : From 0000000Ch to 0000002Fh, in ecx | |
*************** In gcInfoBlockHdrSave() | |
GCINFO: untrckVars = 0 | |
GCINFO: trackdLcls = 0 | |
*************** In gcInfoBlockHdrSave() | |
GCINFO: methodSize = 0039 | |
GCINFO: prologSize = 0006 | |
GCINFO: epilogSize = 0004 | |
GC Info for method _1020.MethodBelow:RaiseValue(double):this | |
GC info size = 6 | |
Method info block: | |
method size = 0039 | |
prolog size = 6 | |
epilog size = 4 | |
epilog count = 1 | |
epilog end = yes | |
callee-saved regs = EBP | |
ebp frame = yes | |
fully interruptible= no | |
double align = no | |
arguments size = 2 DWORDs | |
stack frame size = 0 DWORDs | |
untracked count = 0 | |
var ptr tab count = 0 | |
epilog at 0035 | |
39 D2 8A 80 46 | | |
Pointer table: | |
FF | | |
Method code size: 57 | |
Allocations for _1020.MethodBelow:RaiseValue(double):this (MethodHash=aa0b1cbf) | |
count: 534, size: 39533, max = 3172 | |
allocateMemory: 65536, nraUsed: 61640 | |
Alloc'd bytes by kind: | |
kind | size | pct | |
---------------------+------------+-------- | |
AssertionProp | 5412 | 13.69% | |
ASTNode | 5064 | 12.81% | |
InstDesc | 1692 | 4.28% | |
ImpStack | 0 | 0.00% | |
BasicBlock | 188 | 0.48% | |
fgArgInfo | 0 | 0.00% | |
fgArgInfoPtrArr | 0 | 0.00% | |
FlowList | 0 | 0.00% | |
TreeStatementList | 32 | 0.08% | |
SiScope | 168 | 0.42% | |
FlatFPStateX87 | 0 | 0.00% | |
DominatorMemory | 32 | 0.08% | |
LSRA | 1552 | 3.93% | |
LSRA_Interval | 468 | 1.18% | |
LSRA_RefPosition | 924 | 2.34% | |
Reachability | 8 | 0.02% | |
SSA | 392 | 0.99% | |
ValueNumber | 9970 | 25.22% | |
LvaTable | 1572 | 3.98% | |
UnwindInfo | 0 | 0.00% | |
hashBv | 20 | 0.05% | |
bitset | 344 | 0.87% | |
FixedBitVect | 0 | 0.00% | |
AsIAllocator | 884 | 2.24% | |
IndirAssignMap | 40 | 0.10% | |
FieldSeqStore | 108 | 0.27% | |
ZeroOffsetFieldMap | 40 | 0.10% | |
ArrayInfoMap | 40 | 0.10% | |
MemoryPhiArg | 0 | 0.00% | |
CSE | 728 | 1.84% | |
GC | 12 | 0.03% | |
CorSig | 156 | 0.39% | |
Inlining | 1220 | 3.09% | |
ArrayStack | 0 | 0.00% | |
DebugInfo | 116 | 0.29% | |
DebugOnly | 8110 | 20.51% | |
Codegen | 0 | 0.00% | |
LoopOpt | 0 | 0.00% | |
LoopHoist | 0 | 0.00% | |
Unknown | 241 | 0.61% | |
****** DONE compiling _1020.MethodBelow:RaiseValue(double):this | |
****** START compiling _1020.MethodAbove:RaiseValue(double):this (MethodHash=a9a18473) | |
Generating code for Windows x86 | |
OPTIONS: compCodeOpt = BLENDED_CODE | |
OPTIONS: compDbgCode = false | |
OPTIONS: compDbgInfo = true | |
OPTIONS: compDbgEnC = false | |
OPTIONS: compProcedureSplitting = false | |
OPTIONS: compProcedureSplittingEH = false | |
OPTIONS: Stack probing is DISABLED | |
IL to import: | |
IL_0000 02 ldarg.0 | |
IL_0001 02 ldarg.0 | |
IL_0002 28 07 00 00 06 call 0x6000007 | |
IL_0007 02 ldarg.0 | |
IL_0008 28 07 00 00 06 call 0x6000007 | |
IL_000d 03 ldarg.1 | |
IL_000e 23 00 00 00 00 00 00 59 40 ldc.r8 100.000000 | |
IL_0017 5b div | |
IL_0018 5a mul | |
IL_0019 58 add | |
IL_001a 28 08 00 00 06 call 0x6000008 | |
IL_001f 2a ret | |
lvaSetClass: setting class for V00 to (030E52D0) _1020.MethodAbove | |
Set preferred register for V00 to [ecx] | |
'this' passed in register ecx | |
; Initial local variable assignments | |
; | |
; V00 this ref this class-hnd | |
; V01 arg1 double | |
*************** In compInitDebuggingInfo() for _1020.MethodAbove:RaiseValue(double):this | |
getVars() returned cVars = 0, extendOthers = true | |
info.compVarScopesCount = 2 | |
VarNum LVNum Name Beg End | |
0: 00h 00h V00 this 000h 020h | |
1: 01h 01h V01 arg1 000h 020h | |
info.compStmtOffsetsCount = 0 | |
info.compStmtOffsetsImplicit = 0005h ( STACK_EMPTY CALL_SITE ) | |
*************** In fgFindBasicBlocks() for _1020.MethodAbove:RaiseValue(double):this | |
Jump targets: | |
none | |
New Basic Block BB01 [0000] created. | |
BB01 [000..020) | |
IL Code Size,Instr 32, 12, Basic Block count 1, Local Variable Num,Ref count 2, 4 for method _1020.MethodAbove:RaiseValue(double):this | |
OPTIONS: opts.MinOpts() == false | |
Basic block list for '_1020.MethodAbove:RaiseValue(double):this' | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In impImport() for _1020.MethodAbove:RaiseValue(double):this | |
impImportBlockPending for BB01 | |
Importing BB01 (PC=000) of '_1020.MethodAbove:RaiseValue(double):this' | |
[ 0] 0 (0x000) ldarg.0 | |
[ 1] 1 (0x001) ldarg.0 | |
[ 2] 2 (0x002) call 06000007 | |
In Compiler::impImportCall: opcode is call, kind=0, callRetType is double, structSize is 0 | |
[000004] ------------ * STMT void (IL 0x000... ???) | |
[000003] I-C-G------- \--* CALL double _1020.MethodAbove.get_Value (exactContextHnd=0x030E52D1) | |
[000002] ------------ this in ecx \--* LCL_VAR ref V00 this | |
[ 2] 7 (0x007) ldarg.0 | |
[ 3] 8 (0x008) call 06000007 | |
In Compiler::impImportCall: opcode is call, kind=0, callRetType is double, structSize is 0 | |
lvaGrabTemp returning 2 (V02 tmp0) called for impAppendStmt. | |
[000011] ------------ * STMT void (IL ???... ???) | |
[000005] --C--------- | /--* RET_EXPR double(inl return from call [000003]) | |
[000010] -AC--------- \--* ASG double | |
[000009] D------N---- \--* LCL_VAR double V02 tmp0 | |
[000008] ------------ * STMT void (IL ???... ???) | |
[000007] I-C-G------- \--* CALL double _1020.MethodAbove.get_Value (exactContextHnd=0x030E52D1) | |
[000006] ------------ this in ecx \--* LCL_VAR ref V00 this | |
[ 3] 13 (0x00d) ldarg.1 | |
[ 4] 14 (0x00e) ldc.r8 100.00000000000000 | |
[ 5] 23 (0x017) div | |
[ 4] 24 (0x018) mul | |
[ 3] 25 (0x019) add | |
[ 2] 26 (0x01a) call 06000008 | |
In Compiler::impImportCall: opcode is call, kind=0, callRetType is void, structSize is 0 | |
[000021] ------------ * STMT void (IL ???... ???) | |
[000019] I-C-G------- \--* CALL void _1020.MethodAbove.set_Value (exactContextHnd=0x030E52D1) | |
[000001] ------------ this in ecx +--* LCL_VAR ref V00 this | |
[000015] ------------ | /--* CNS_DBL double 100.00000000000000 | |
[000016] ------------ | /--* DIV double | |
[000014] ------------ | | \--* LCL_VAR double V01 arg1 | |
[000017] --C--------- | /--* MUL double | |
[000013] --C--------- | | \--* RET_EXPR double(inl return from call [000007]) | |
[000018] --C--------- arg1 \--* ADD double | |
[000012] ------------ \--* LCL_VAR double V02 tmp0 | |
[ 0] 31 (0x01f) ret | |
[000023] ------------ * STMT void (IL 0x01F... ???) | |
[000022] ------------ \--* RETURN void | |
New BlockSet epoch 1, # of blocks (including unused BB00): 2, bitset array size: 1 (short) | |
*************** In fgMorph() | |
*************** In fgDebugCheckBBlist | |
*************** In fgInline() | |
Expanding INLINE_CANDIDATE in statement [000004] in BB01: | |
[000004] ------------ * STMT void (IL 0x000...0x01F) | |
[000003] I-C-G------- \--* CALL double _1020.MethodAbove.get_Value (exactContextHnd=0x030E52D1) | |
[000002] ------------ this in ecx \--* LCL_VAR ref V00 this | |
thisArg: is a local var | |
[000002] ------------ * LCL_VAR ref V00 this | |
INLINER: inlineInfo.tokenLookupContextHandle for _1020.MethodAbove:get_Value():double:this set to 0x030E52D1: | |
Invoking compiler for the inlinee method _1020.MethodAbove:get_Value():double:this : | |
IL to import: | |
IL_0000 02 ldarg.0 | |
IL_0001 7b 02 00 00 04 ldfld 0x4000002 | |
IL_0006 2a ret | |
INLINER impTokenLookupContextHandle for _1020.MethodAbove:get_Value():double:this is 0x030E52D1. | |
*************** In fgFindBasicBlocks() for _1020.MethodAbove:get_Value():double:this | |
Jump targets: | |
none | |
New Basic Block BB02 [0001] created. | |
BB02 [000..007) | |
Basic block list for '_1020.MethodAbove:get_Value():double:this' | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB02 [0001] 1 1 [000..007) (return) | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In impImport() for _1020.MethodAbove:get_Value():double:this | |
impImportBlockPending for BB02 | |
Importing BB02 (PC=000) of '_1020.MethodAbove:get_Value():double:this' | |
[ 0] 0 (0x000) ldarg.0 | |
[ 1] 1 (0x001) ldfld 04000002 | |
[ 1] 6 (0x006) ret | |
Inlinee Return expression (before normalization) => | |
[000025] ---XG------- * FIELD double _value | |
[000002] ------------ \--* LCL_VAR ref V00 this | |
Inlinee Return expression (after normalization) => | |
[000025] ---XG------- * FIELD double _value | |
[000002] ------------ \--* LCL_VAR ref V00 this | |
----------- Statements (and blocks) added due to the inlining of call [000003] ----------- | |
Arguments setup: | |
Inlinee method body:fgInlineAppendStatements: no gc ref inline locals. | |
Return expression for call at [000003] is | |
[000025] ---XG------- * FIELD double _value | |
[000002] ------------ \--* LCL_VAR ref V00 this | |
Successfully inlined _1020.MethodAbove:get_Value():double:this (7 IL bytes) (depth 1) [below ALWAYS_INLINE size] | |
-------------------------------------------------------------------------------------------- | |
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for '_1020.MethodAbove:RaiseValue(double):this' calling '_1020.MethodAbove:get_Value():double:this' | |
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' | |
Replacing the return expression placeholder [000005] with [000025] | |
[000005] --C--------- * RET_EXPR double(inl return from call [000025]) | |
Inserting the inline return expression | |
[000025] ---XG------- * FIELD double _value | |
[000002] ------------ \--* LCL_VAR ref V00 this | |
Expanding INLINE_CANDIDATE in statement [000008] in BB01: | |
[000008] ------------ * STMT void (IL ???... ???) | |
[000007] I-C-G------- \--* CALL double _1020.MethodAbove.get_Value (exactContextHnd=0x030E52D1) | |
[000006] ------------ this in ecx \--* LCL_VAR ref V00 this | |
thisArg: is a local var | |
[000006] ------------ * LCL_VAR ref V00 this | |
INLINER: inlineInfo.tokenLookupContextHandle for _1020.MethodAbove:get_Value():double:this set to 0x030E52D1: | |
Invoking compiler for the inlinee method _1020.MethodAbove:get_Value():double:this : | |
IL to import: | |
IL_0000 02 ldarg.0 | |
IL_0001 7b 02 00 00 04 ldfld 0x4000002 | |
IL_0006 2a ret | |
INLINER impTokenLookupContextHandle for _1020.MethodAbove:get_Value():double:this is 0x030E52D1. | |
*************** In fgFindBasicBlocks() for _1020.MethodAbove:get_Value():double:this | |
Jump targets: | |
none | |
New Basic Block BB03 [0002] created. | |
BB03 [000..007) | |
Basic block list for '_1020.MethodAbove:get_Value():double:this' | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB03 [0002] 1 1 [000..007) (return) | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In impImport() for _1020.MethodAbove:get_Value():double:this | |
impImportBlockPending for BB03 | |
Importing BB03 (PC=000) of '_1020.MethodAbove:get_Value():double:this' | |
[ 0] 0 (0x000) ldarg.0 | |
[ 1] 1 (0x001) ldfld 04000002 | |
[ 1] 6 (0x006) ret | |
Inlinee Return expression (before normalization) => | |
[000028] ---XG------- * FIELD double _value | |
[000006] ------------ \--* LCL_VAR ref V00 this | |
Inlinee Return expression (after normalization) => | |
[000028] ---XG------- * FIELD double _value | |
[000006] ------------ \--* LCL_VAR ref V00 this | |
----------- Statements (and blocks) added due to the inlining of call [000007] ----------- | |
Arguments setup: | |
Inlinee method body:fgInlineAppendStatements: no gc ref inline locals. | |
Return expression for call at [000007] is | |
[000028] ---XG------- * FIELD double _value | |
[000006] ------------ \--* LCL_VAR ref V00 this | |
Successfully inlined _1020.MethodAbove:get_Value():double:this (7 IL bytes) (depth 1) [below ALWAYS_INLINE size] | |
-------------------------------------------------------------------------------------------- | |
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for '_1020.MethodAbove:RaiseValue(double):this' calling '_1020.MethodAbove:get_Value():double:this' | |
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' | |
Expanding INLINE_CANDIDATE in statement [000021] in BB01: | |
[000021] ------------ * STMT void (IL ???... ???) | |
[000019] I-C-G------- \--* CALL void _1020.MethodAbove.set_Value (exactContextHnd=0x030E52D1) | |
[000001] ------------ this in ecx +--* LCL_VAR ref V00 this | |
[000015] ------------ | /--* CNS_DBL double 100.00000000000000 | |
[000016] ------------ | /--* DIV double | |
[000014] ------------ | | \--* LCL_VAR double V01 arg1 | |
[000017] --C--------- | /--* MUL double | |
[000013] --C--------- | | \--* RET_EXPR double(inl return from call [000028]) | |
[000018] --C--------- arg1 \--* ADD double | |
[000012] ------------ \--* LCL_VAR double V02 tmp0 | |
thisArg: is a local var | |
[000001] ------------ * LCL_VAR ref V00 this | |
Argument #1: has side effects | |
[000015] ------------ /--* CNS_DBL double 100.00000000000000 | |
[000016] ------------ /--* DIV double | |
[000014] ------------ | \--* LCL_VAR double V01 arg1 | |
[000017] --C--------- /--* MUL double | |
[000013] --C--------- | \--* RET_EXPR double(inl return from call [000028]) | |
[000018] --C--------- * ADD double | |
[000012] ------------ \--* LCL_VAR double V02 tmp0 | |
INLINER: inlineInfo.tokenLookupContextHandle for _1020.MethodAbove:set_Value(double):this set to 0x030E52D1: | |
Invoking compiler for the inlinee method _1020.MethodAbove:set_Value(double):this : | |
IL to import: | |
IL_0000 02 ldarg.0 | |
IL_0001 03 ldarg.1 | |
IL_0002 7d 02 00 00 04 stfld 0x4000002 | |
IL_0007 2a ret | |
INLINER impTokenLookupContextHandle for _1020.MethodAbove:set_Value(double):this is 0x030E52D1. | |
*************** In fgFindBasicBlocks() for _1020.MethodAbove:set_Value(double):this | |
Jump targets: | |
none | |
New Basic Block BB04 [0003] created. | |
BB04 [000..008) | |
Basic block list for '_1020.MethodAbove:set_Value(double):this' | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB04 [0003] 1 1 [000..008) (return) | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In impImport() for _1020.MethodAbove:set_Value(double):this | |
impImportBlockPending for BB04 | |
Importing BB04 (PC=000) of '_1020.MethodAbove:set_Value(double):this' | |
[ 0] 0 (0x000) ldarg.0 | |
[ 1] 1 (0x001) ldarg.1 | |
lvaGrabTemp returning 3 (V03 tmp1) called for Inlining Arg. | |
[ 2] 2 (0x002) stfld 04000002 | |
[000034] ------------ * STMT void | |
[000031] ------------ | /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG------- \--* ASG double | |
[000032] ---XG--N---- \--* FIELD double _value | |
[000001] ------------ \--* LCL_VAR ref V00 this | |
[ 0] 7 (0x007) ret | |
----------- Statements (and blocks) added due to the inlining of call [000019] ----------- | |
Arguments setup: | |
[000037] ------------ * STMT void (IL ???... ???) | |
[000015] ------------ | /--* CNS_DBL double 100.00000000000000 | |
[000016] ------------ | /--* DIV double | |
[000014] ------------ | | \--* LCL_VAR double V01 arg1 | |
[000017] --C--------- | /--* MUL double | |
[000013] --C--------- | | \--* RET_EXPR double(inl return from call [000028]) | |
[000018] --C--------- | /--* ADD double | |
[000012] ------------ | | \--* LCL_VAR double V02 tmp0 | |
[000036] -AC--------- \--* ASG double | |
[000035] D------N---- \--* LCL_VAR double V03 tmp1 | |
Inlinee method body: | |
[000034] ------------ * STMT void (IL ???... ???) | |
[000031] ------------ | /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG------- \--* ASG double | |
[000032] ---XG--N---- \--* FIELD double _value | |
[000001] ------------ \--* LCL_VAR ref V00 this | |
fgInlineAppendStatements: no gc ref inline locals. | |
Successfully inlined _1020.MethodAbove:set_Value(double):this (8 IL bytes) (depth 1) [below ALWAYS_INLINE size] | |
-------------------------------------------------------------------------------------------- | |
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for '_1020.MethodAbove:RaiseValue(double):this' calling '_1020.MethodAbove:set_Value(double):this' | |
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' | |
Replacing the return expression placeholder [000013] with [000028] | |
[000013] --C--------- * RET_EXPR double(inl return from call [000028]) | |
Inserting the inline return expression | |
[000028] ---XG------- * FIELD double _value | |
[000006] ------------ \--* LCL_VAR ref V00 this | |
*************** After fgInline() | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
[000011] ------------ * STMT void (IL ???... ???) | |
[000025] ---XG------- | /--* FIELD double _value | |
[000002] ------------ | | \--* LCL_VAR ref V00 this | |
[000010] -AC--------- \--* ASG double | |
[000009] D------N---- \--* LCL_VAR double V02 tmp0 | |
***** BB01, stmt 2 | |
[000037] ------------ * STMT void (IL ???... ???) | |
[000015] ------------ | /--* CNS_DBL double 100.00000000000000 | |
[000016] ------------ | /--* DIV double | |
[000014] ------------ | | \--* LCL_VAR double V01 arg1 | |
[000017] --C--------- | /--* MUL double | |
[000028] ---XG------- | | \--* FIELD double _value | |
[000006] ------------ | | \--* LCL_VAR ref V00 this | |
[000018] --C--------- | /--* ADD double | |
[000012] ------------ | | \--* LCL_VAR double V02 tmp0 | |
[000036] -AC--------- \--* ASG double | |
[000035] D------N---- \--* LCL_VAR double V03 tmp1 | |
***** BB01, stmt 3 | |
[000034] ------------ * STMT void (IL ???... ???) | |
[000031] ------------ | /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG------- \--* ASG double | |
[000032] ---XG--N---- \--* FIELD double _value | |
[000001] ------------ \--* LCL_VAR ref V00 this | |
***** BB01, stmt 4 | |
[000023] ------------ * STMT void (IL 0x01F... ???) | |
[000022] ------------ \--* RETURN void | |
------------------------------------------------------------------------------------------------------------------- | |
*************** Exception Handling table is empty | |
**************** Inline Tree | |
Inlines into 06000006 _1020.MethodAbove:RaiseValue(double):this | |
[1 IL=0002 TR=000003 06000007] [below ALWAYS_INLINE size] _1020.MethodAbove:get_Value():double:this | |
[2 IL=0008 TR=000007 06000007] [below ALWAYS_INLINE size] _1020.MethodAbove:get_Value():double:this | |
[3 IL=0026 TR=000019 06000008] [below ALWAYS_INLINE size] _1020.MethodAbove:set_Value(double):this | |
Budget: initialTime=156, finalTime=158, initialBudget=1560, currentBudget=1560 | |
Budget: initialSize=860, finalSize=860 | |
*************** After fgAddInternal() | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** Exception Handling table is empty | |
*************** In fgDebugCheckBBlist | |
*************** In fgRemoveEmptyTry() | |
No EH in this method, nothing to remove. | |
*************** In fgRemoveEmptyFinally() | |
No EH in this method, nothing to remove. | |
*************** In fgMergeFinallyChains() | |
No EH in this method, nothing to merge. | |
*************** In fgCloneFinally() | |
No EH in this method, no cloning. | |
*************** In fgPromoteStructs() | |
lvaTable before fgPromoteStructs | |
; Initial local variable assignments | |
; | |
; V00 this ref this class-hnd | |
; V01 arg1 double | |
; V02 tmp0 double | |
; V03 tmp1 double | |
lvaTable after fgPromoteStructs | |
; Initial local variable assignments | |
; | |
; V00 this ref this class-hnd | |
; V01 arg1 double | |
; V02 tmp0 double | |
; V03 tmp1 double | |
*************** In fgMarkAddressExposedLocals() | |
*************** In fgMorphBlocks() | |
Morphing BB01 of '_1020.MethodAbove:RaiseValue(double):this' | |
fgMorphTree BB01, stmt 1 (before) | |
[000025] ---XG------- /--* FIELD double _value | |
[000002] ------------ | \--* LCL_VAR ref V00 this | |
[000010] -AC--------- * ASG double | |
[000009] D------N---- \--* LCL_VAR double V02 tmp0 | |
GenTreeNode creates assertion: | |
[000025] ---XG------- * IND double | |
In BB01 New Local Constant Assertion: V00 != null index=#01, mask=0000000000000001 | |
fgMorphTree BB01, stmt 1 (after) | |
[000025] ---XG+------ /--* IND double | |
[000039] -----+------ | | /--* CNS_INT int 4 field offset Fseq[_value] | |
[000040] -----+------ | \--* ADD byref | |
[000002] -----+------ | \--* LCL_VAR ref V00 this | |
[000010] -A-XG+------ * ASG double | |
[000009] D----+-N---- \--* LCL_VAR double V02 tmp0 | |
fgMorphTree BB01, stmt 2 (before) | |
[000015] ------------ /--* CNS_DBL double 100.00000000000000 | |
[000016] ------------ /--* DIV double | |
[000014] ------------ | \--* LCL_VAR double V01 arg1 | |
[000017] --C--------- /--* MUL double | |
[000028] ---XG------- | \--* FIELD double _value | |
[000006] ------------ | \--* LCL_VAR ref V00 this | |
[000018] --C--------- /--* ADD double | |
[000012] ------------ | \--* LCL_VAR double V02 tmp0 | |
[000036] -AC--------- * ASG double | |
[000035] D------N---- \--* LCL_VAR double V03 tmp1 | |
fgMorphTree BB01, stmt 2 (after) | |
[000015] -----+------ /--* CNS_DBL double 100.00000000000000 | |
[000016] -----+------ /--* DIV double | |
[000014] -----+------ | \--* LCL_VAR double V01 arg1 | |
[000017] ---XG+------ /--* MUL double | |
[000028] ---XG+------ | \--* IND double | |
[000041] -----+------ | | /--* CNS_INT int 4 field offset Fseq[_value] | |
[000042] -----+------ | \--* ADD byref | |
[000006] -----+------ | \--* LCL_VAR ref V00 this | |
[000018] ---XG+------ /--* ADD double | |
[000012] -----+------ | \--* LCL_VAR double V02 tmp0 | |
[000036] -A-XG+------ * ASG double | |
[000035] D----+-N---- \--* LCL_VAR double V03 tmp1 | |
fgMorphTree BB01, stmt 3 (before) | |
[000031] ------------ /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG------- * ASG double | |
[000032] ---XG--N---- \--* FIELD double _value | |
[000001] ------------ \--* LCL_VAR ref V00 this | |
fgMorphTree BB01, stmt 3 (after) | |
[000031] -----+------ /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG+------ * ASG double | |
[000032] ---XG+-N---- \--* IND double | |
[000043] -----+------ | /--* CNS_INT int 4 field offset Fseq[_value] | |
[000044] -----+------ \--* ADD byref | |
[000001] -----+------ \--* LCL_VAR ref V00 this | |
fgMorphTree BB01, stmt 4 (before) | |
[000022] ------------ * RETURN void | |
Renumbering the basic blocks for fgComputePred | |
*************** Before renumbering the basic blocks | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** Exception Handling table is empty | |
*************** After renumbering the basic blocks | |
=============== No blocks renumbered! | |
New BlockSet epoch 2, # of blocks (including unused BB00): 2, bitset array size: 1 (short) | |
*************** In fgComputePreds() | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** After fgComputePreds() | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In fgComputeEdgeWeights() | |
fgComputeEdgeWeights() we do not have any profile data so we are not using the edge weights | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
fgComputeEdgeWeights() was able to compute exact edge weights for all of the 0 edges, using 1 passes. | |
*************** In optOptimizeLayout() | |
*************** Exception Handling table is empty | |
*************** In fgDebugCheckBBlist | |
*************** In fgUpdateFlowGraph() | |
Before updating the flow graph: | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
*************** In fgUpdateFlowGraph() | |
Before updating the flow graph: | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
*************** In fgComputeReachability | |
*************** In fgDebugCheckBBlist | |
Renumbering the basic blocks for fgComputeReachability pass #1 | |
*************** Before renumbering the basic blocks | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** Exception Handling table is empty | |
*************** After renumbering the basic blocks | |
=============== No blocks renumbered! | |
Enter blocks: BB01 | |
After computing reachability sets: | |
------------------------------------------------ | |
BBnum Reachable by | |
------------------------------------------------ | |
BB01 : BB01 | |
After computing reachability: | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
*************** In fgComputeDoms | |
*************** In fgDebugCheckBBlist | |
Dominator computation start blocks (those blocks with no incoming edges): | |
BB01 | |
------------------------------------------------ | |
BBnum Dominated by | |
------------------------------------------------ | |
BB01: BB01 | |
Inside fgBuildDomTree | |
After computing the Dominance Tree: | |
*************** In Allocate Objects | |
Trees before Allocate Objects | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
[000011] ------------ * STMT void (IL ???... ???) | |
[000025] ---XG+------ | /--* IND double | |
[000039] -----+------ | | | /--* CNS_INT int 4 field offset Fseq[_value] | |
[000040] -----+------ | | \--* ADD byref | |
[000002] -----+------ | | \--* LCL_VAR ref V00 this | |
[000010] -A-XG+------ \--* ASG double | |
[000009] D----+-N---- \--* LCL_VAR double V02 tmp0 | |
***** BB01, stmt 2 | |
[000037] ------------ * STMT void (IL ???... ???) | |
[000015] -----+------ | /--* CNS_DBL double 100.00000000000000 | |
[000016] -----+------ | /--* DIV double | |
[000014] -----+------ | | \--* LCL_VAR double V01 arg1 | |
[000017] ---XG+------ | /--* MUL double | |
[000028] ---XG+------ | | \--* IND double | |
[000041] -----+------ | | | /--* CNS_INT int 4 field offset Fseq[_value] | |
[000042] -----+------ | | \--* ADD byref | |
[000006] -----+------ | | \--* LCL_VAR ref V00 this | |
[000018] ---XG+------ | /--* ADD double | |
[000012] -----+------ | | \--* LCL_VAR double V02 tmp0 | |
[000036] -A-XG+------ \--* ASG double | |
[000035] D----+-N---- \--* LCL_VAR double V03 tmp1 | |
***** BB01, stmt 3 | |
[000034] ------------ * STMT void (IL ???... ???) | |
[000031] -----+------ | /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG+------ \--* ASG double | |
[000032] ---XG+-N---- \--* IND double | |
[000043] -----+------ | /--* CNS_INT int 4 field offset Fseq[_value] | |
[000044] -----+------ \--* ADD byref | |
[000001] -----+------ \--* LCL_VAR ref V00 this | |
***** BB01, stmt 4 | |
[000023] ------------ * STMT void (IL 0x01F... ???) | |
[000022] -----+------ \--* RETURN void | |
------------------------------------------------------------------------------------------------------------------- | |
*************** Exiting Allocate Objects | |
Trees after Allocate Objects | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
[000011] ------------ * STMT void (IL ???... ???) | |
[000025] ---XG+------ | /--* IND double | |
[000039] -----+------ | | | /--* CNS_INT int 4 field offset Fseq[_value] | |
[000040] -----+------ | | \--* ADD byref | |
[000002] -----+------ | | \--* LCL_VAR ref V00 this | |
[000010] -A-XG+------ \--* ASG double | |
[000009] D----+-N---- \--* LCL_VAR double V02 tmp0 | |
***** BB01, stmt 2 | |
[000037] ------------ * STMT void (IL ???... ???) | |
[000015] -----+------ | /--* CNS_DBL double 100.00000000000000 | |
[000016] -----+------ | /--* DIV double | |
[000014] -----+------ | | \--* LCL_VAR double V01 arg1 | |
[000017] ---XG+------ | /--* MUL double | |
[000028] ---XG+------ | | \--* IND double | |
[000041] -----+------ | | | /--* CNS_INT int 4 field offset Fseq[_value] | |
[000042] -----+------ | | \--* ADD byref | |
[000006] -----+------ | | \--* LCL_VAR ref V00 this | |
[000018] ---XG+------ | /--* ADD double | |
[000012] -----+------ | | \--* LCL_VAR double V02 tmp0 | |
[000036] -A-XG+------ \--* ASG double | |
[000035] D----+-N---- \--* LCL_VAR double V03 tmp1 | |
***** BB01, stmt 3 | |
[000034] ------------ * STMT void (IL ???... ???) | |
[000031] -----+------ | /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG+------ \--* ASG double | |
[000032] ---XG+-N---- \--* IND double | |
[000043] -----+------ | /--* CNS_INT int 4 field offset Fseq[_value] | |
[000044] -----+------ \--* ADD byref | |
[000001] -----+------ \--* LCL_VAR ref V00 this | |
***** BB01, stmt 4 | |
[000023] ------------ * STMT void (IL 0x01F... ???) | |
[000022] -----+------ \--* RETURN void | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
*************** In optOptimizeLoops() | |
*************** In fgDebugCheckBBlist | |
*************** In optCloneLoops() | |
*************** In lvaMarkLocalVars() | |
*** marking local variables in block BB01 (weight=1 ) | |
[000011] ------------ * STMT void (IL ???... ???) | |
[000025] ---XG+------ | /--* IND double | |
[000039] -----+------ | | | /--* CNS_INT int 4 field offset Fseq[_value] | |
[000040] -----+------ | | \--* ADD byref | |
[000002] -----+------ | | \--* LCL_VAR ref V00 this | |
[000010] -A-XG+------ \--* ASG double | |
[000009] D----+-N---- \--* LCL_VAR double V02 tmp0 | |
New refCnts for V02: refCnt = 1, refCntWtd = 2 | |
New refCnts for V00: refCnt = 1, refCntWtd = 1 | |
[000037] ------------ * STMT void (IL ???... ???) | |
[000015] -----+------ | /--* CNS_DBL double 100.00000000000000 | |
[000016] -----+------ | /--* DIV double | |
[000014] -----+------ | | \--* LCL_VAR double V01 arg1 | |
[000017] ---XG+------ | /--* MUL double | |
[000028] ---XG+------ | | \--* IND double | |
[000041] -----+------ | | | /--* CNS_INT int 4 field offset Fseq[_value] | |
[000042] -----+------ | | \--* ADD byref | |
[000006] -----+------ | | \--* LCL_VAR ref V00 this | |
[000018] ---XG+------ | /--* ADD double | |
[000012] -----+------ | | \--* LCL_VAR double V02 tmp0 | |
[000036] -A-XG+------ \--* ASG double | |
[000035] D----+-N---- \--* LCL_VAR double V03 tmp1 | |
New refCnts for V03: refCnt = 1, refCntWtd = 2 | |
New refCnts for V02: refCnt = 2, refCntWtd = 4 | |
New refCnts for V00: refCnt = 2, refCntWtd = 2 | |
New refCnts for V01: refCnt = 1, refCntWtd = 1 | |
[000034] ------------ * STMT void (IL ???... ???) | |
[000031] -----+------ | /--* LCL_VAR double V03 tmp1 | |
[000033] -A-XG+------ \--* ASG double | |
[000032] ---XG+-N---- \--* IND double | |
[000043] -----+------ | /--* CNS_INT int 4 field offset Fseq[_value] | |
[000044] -----+------ \--* ADD byref | |
[000001] -----+------ \--* LCL_VAR ref V00 this | |
New refCnts for V00: refCnt = 3, refCntWtd = 3 | |
New refCnts for V03: refCnt = 2, refCntWtd = 4 | |
[000023] ------------ * STMT void (IL 0x01F... ???) | |
[000022] -----+------ \--* RETURN void | |
New refCnts for V00: refCnt = 4, refCntWtd = 4 | |
New refCnts for V00: refCnt = 5, refCntWtd = 5 | |
*************** In optAddCopies() | |
refCnt table for 'RaiseValue': | |
V00 this [ ref]: refCnt = 5, refCntWtd = 5 pref [ecx] | |
V02 tmp0 [double]: refCnt = 2, refCntWtd = 4 | |
V03 tmp1 [double]: refCnt = 2, refCntWtd = 4 | |
V01 arg1 [double]: refCnt = 1, refCntWtd = 1 | |
*************** In optOptimizeBools() | |
*************** In fgDebugCheckBBlist | |
*************** In fgFindOperOrder() | |
*************** In fgSetBlockOrder() | |
The biggest BB has 12 tree nodes | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
( 9, 7) [000011] ------------ * STMT void (IL ???... ???) | |
N004 ( 5, 4) [000025] ---XG------- | /--* IND double | |
N002 ( 1, 1) [000039] ------------ | | | /--* CNS_INT int 4 field offset Fseq[_value] | |
N003 ( 2, 2) [000040] -------N---- | | \--* ADD byref | |
N001 ( 1, 1) [000002] ------------ | | \--* LCL_VAR ref V00 this | |
N006 ( 9, 7) [000010] -A-XG---R--- \--* ASG double | |
N005 ( 3, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 | |
***** BB01, stmt 2 | |
( 64, 27) [000037] ------------ * STMT void (IL ???... ???) | |
N009 ( 3, 2) [000012] ------------ | /--* LCL_VAR double V02 tmp0 | |
N010 ( 60, 24) [000018] ---XG------- | /--* ADD double | |
N006 ( 3, 4) [000015] ------------ | | | /--* CNS_DBL double 100.00000000000000 | |
N007 ( 42, 10) [000016] ------------ | | | /--* DIV double | |
N005 ( 3, 2) [000014] ------------ | | | | \--* LCL_VAR double V01 arg1 | |
N008 ( 52, 18) [000017] ---XG------- | | \--* MUL double | |
N004 ( 5, 4) [000028] ---XG------- | | \--* IND double | |
N002 ( 1, 1) [000041] ------------ | | | /--* CNS_INT int 4 field offset Fseq[_value] | |
N003 ( 2, 2) [000042] -------N---- | | \--* ADD byref | |
N001 ( 1, 1) [000006] ------------ | | \--* LCL_VAR ref V00 this | |
N012 ( 64, 27) [000036] -A-XG---R--- \--* ASG double | |
N011 ( 3, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 | |
***** BB01, stmt 3 | |
( 9, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 3, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 | |
N006 ( 9, 7) [000033] -A-XG------- \--* ASG double | |
N004 ( 5, 4) [000032] ---XG--N---- \--* IND double | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT int 4 field offset Fseq[_value] | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this | |
***** BB01, stmt 4 | |
( 0, 0) [000023] ------------ * STMT void (IL 0x01F... ???) | |
N001 ( 0, 0) [000022] ------------ \--* RETURN void | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In SsaBuilder::Build() | |
[SsaBuilder] Max block count is 2. | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** Exception Handling table is empty | |
[SsaBuilder] Topologically sorted the graph. | |
[SsaBuilder::ComputeImmediateDom] | |
*************** In SsaBuilder::ComputeDominators(BasicBlock** postOrder, int count, ...) | |
*************** In SsaBuilder::InsertPhiFunctions() | |
*************** In fgLocalVarLiveness() | |
*************** In fgPerBlockLocalVarLiveness() | |
BB01 USE(2)={V00 V01} + ByrefExposed + GcHeap | |
DEF(2)={ V02 V03 } + ByrefExposed + GcHeap | |
** Memory liveness computed, GcHeap states and ByrefExposed states match | |
*************** In fgInterBlockLocalVarLiveness() | |
BB liveness after fgLiveVarAnalysis(): | |
BB01 IN (2)={V00 V01} + ByrefExposed + GcHeap | |
OUT(0)={ } | |
Inserting phi functions: | |
*************** In SsaBuilder::RenameVariables() | |
After fgSsaBuild: | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
( 9, 7) [000011] ------------ * STMT void (IL ???... ???) | |
N004 ( 5, 4) [000025] ---XG------- | /--* IND double | |
N002 ( 1, 1) [000039] ------------ | | | /--* CNS_INT int 4 field offset Fseq[_value] | |
N003 ( 2, 2) [000040] -------N---- | | \--* ADD byref | |
N001 ( 1, 1) [000002] ------------ | | \--* LCL_VAR ref V00 this u:2 | |
N006 ( 9, 7) [000010] -A-XG---R--- \--* ASG double | |
N005 ( 3, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 | |
***** BB01, stmt 2 | |
( 64, 27) [000037] ------------ * STMT void (IL ???... ???) | |
N009 ( 3, 2) [000012] ------------ | /--* LCL_VAR double V02 tmp0 u:2 (last use) | |
N010 ( 60, 24) [000018] ---XG------- | /--* ADD double | |
N006 ( 3, 4) [000015] ------------ | | | /--* CNS_DBL double 100.00000000000000 | |
N007 ( 42, 10) [000016] ------------ | | | /--* DIV double | |
N005 ( 3, 2) [000014] ------------ | | | | \--* LCL_VAR double V01 arg1 u:2 (last use) | |
N008 ( 52, 18) [000017] ---XG------- | | \--* MUL double | |
N004 ( 5, 4) [000028] ---XG------- | | \--* IND double | |
N002 ( 1, 1) [000041] ------------ | | | /--* CNS_INT int 4 field offset Fseq[_value] | |
N003 ( 2, 2) [000042] -------N---- | | \--* ADD byref | |
N001 ( 1, 1) [000006] ------------ | | \--* LCL_VAR ref V00 this u:2 | |
N012 ( 64, 27) [000036] -A-XG---R--- \--* ASG double | |
N011 ( 3, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 | |
***** BB01, stmt 3 | |
( 9, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 3, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 u:2 (last use) | |
N006 ( 9, 7) [000033] -A-XG------- \--* ASG double | |
N004 ( 5, 4) [000032] ---XG--N---- \--* IND double | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT int 4 field offset Fseq[_value] | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) | |
***** BB01, stmt 4 | |
( 0, 0) [000023] ------------ * STMT void (IL 0x01F... ???) | |
N001 ( 0, 0) [000022] ------------ \--* RETURN void | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In optEarlyProp() | |
*************** In fgValueNumber() | |
Memory Initial Value in BB01 is: $81 | |
The SSA definition for ByrefExposed (#2) at start of BB01 is $81 {InitVal($42)} | |
The SSA definition for GcHeap (#2) at start of BB01 is $81 {InitVal($42)} | |
***** BB01, stmt 1 (before) | |
N004 ( 5, 4) [000025] ---XG------- /--* IND double | |
N002 ( 1, 1) [000039] ------------ | | /--* CNS_INT int 4 field offset Fseq[_value] | |
N003 ( 2, 2) [000040] -------N---- | \--* ADD byref | |
N001 ( 1, 1) [000002] ------------ | \--* LCL_VAR ref V00 this u:2 | |
N006 ( 9, 7) [000010] -A-XG---R--- * ASG double | |
N005 ( 3, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 | |
N001 [000002] LCL_VAR V00 this u:2 => $80 {InitVal($40)} | |
N002 [000039] CNS_INT 4 field offset Fseq[_value] => $43 {IntCns 4} | |
N003 [000040] ADD => $100 {ADD($43, $80)} | |
VNApplySelectors: | |
VNForHandle(Fseq[_value]) is $140, fieldType is double | |
VNForMapSelect($81, $140):double returns $180 {$81[$140]} | |
VNForMapSelect($180, $80):double returns $181 {$180[$80]} | |
N004 [000025] IND => <l:$181 {$180[$80]}, c:$1c0 {1c0}> | |
N005 [000009] LCL_VAR V02 tmp0 d:2 => <l:$181 {$180[$80]}, c:$1c0 {1c0}> | |
N006 [000010] ASG => <l:$181 {$180[$80]}, c:$1c0 {1c0}> | |
***** BB01, stmt 1 (after) | |
N004 ( 5, 4) [000025] ---XG------- /--* IND double <l:$181, c:$1c0> | |
N002 ( 1, 1) [000039] ------------ | | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000040] -------N---- | \--* ADD byref $100 | |
N001 ( 1, 1) [000002] ------------ | \--* LCL_VAR ref V00 this u:2 $80 | |
N006 ( 9, 7) [000010] -A-XG---R--- * ASG double <l:$181, c:$1c0> | |
N005 ( 3, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 <l:$181, c:$1c0> | |
--------- | |
***** BB01, stmt 2 (before) | |
N009 ( 3, 2) [000012] ------------ /--* LCL_VAR double V02 tmp0 u:2 (last use) | |
N010 ( 60, 24) [000018] ---XG------- /--* ADD double | |
N006 ( 3, 4) [000015] ------------ | | /--* CNS_DBL double 100.00000000000000 | |
N007 ( 42, 10) [000016] ------------ | | /--* DIV double | |
N005 ( 3, 2) [000014] ------------ | | | \--* LCL_VAR double V01 arg1 u:2 (last use) | |
N008 ( 52, 18) [000017] ---XG------- | \--* MUL double | |
N004 ( 5, 4) [000028] ---XG------- | \--* IND double | |
N002 ( 1, 1) [000041] ------------ | | /--* CNS_INT int 4 field offset Fseq[_value] | |
N003 ( 2, 2) [000042] -------N---- | \--* ADD byref | |
N001 ( 1, 1) [000006] ------------ | \--* LCL_VAR ref V00 this u:2 | |
N012 ( 64, 27) [000036] -A-XG---R--- * ASG double | |
N011 ( 3, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 | |
N001 [000006] LCL_VAR V00 this u:2 => $80 {InitVal($40)} | |
N002 [000041] CNS_INT 4 field offset Fseq[_value] => $43 {IntCns 4} | |
N003 [000042] ADD => $100 {ADD($43, $80)} | |
VNApplySelectors: | |
VNForHandle(Fseq[_value]) is $140, fieldType is double | |
VNForMapSelect($81, $140):double returns $180 {$81[$140]} | |
VNForMapSelect($180, $80):double returns $181 {$180[$80]} | |
N004 [000028] IND => <l:$181 {$180[$80]}, c:$1c2 {1c2}> | |
N005 [000014] LCL_VAR V01 arg1 u:2 (last use) => $c0 {InitVal($41)} | |
N006 [000015] CNS_DBL 100.00000000000000 => $200 {DblCns[100.000000]} | |
N007 [000016] DIV => $182 {DIV($c0, $200)} | |
N008 [000017] MUL => <l:$184 {MUL($181, $182)}, c:$183 {MUL($182, $1c2)}> | |
N009 [000012] LCL_VAR V02 tmp0 u:2 (last use) => <l:$181 {$180[$80]}, c:$1c0 {1c0}> | |
N010 [000018] ADD => <l:$186 {ADD($181, $184)}, c:$185 {ADD($183, $1c0)}> | |
N011 [000035] LCL_VAR V03 tmp1 d:2 => <l:$186 {ADD($181, $184)}, c:$185 {ADD($183, $1c0)}> | |
N012 [000036] ASG => <l:$186 {ADD($181, $184)}, c:$185 {ADD($183, $1c0)}> | |
***** BB01, stmt 2 (after) | |
N009 ( 3, 2) [000012] ------------ /--* LCL_VAR double V02 tmp0 u:2 (last use) <l:$181, c:$1c0> | |
N010 ( 60, 24) [000018] ---XG------- /--* ADD double <l:$186, c:$185> | |
N006 ( 3, 4) [000015] ------------ | | /--* CNS_DBL double 100.00000000000000 $200 | |
N007 ( 42, 10) [000016] ------------ | | /--* DIV double $182 | |
N005 ( 3, 2) [000014] ------------ | | | \--* LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N008 ( 52, 18) [000017] ---XG------- | \--* MUL double <l:$184, c:$183> | |
N004 ( 5, 4) [000028] ---XG------- | \--* IND double <l:$181, c:$1c2> | |
N002 ( 1, 1) [000041] ------------ | | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000042] -------N---- | \--* ADD byref $100 | |
N001 ( 1, 1) [000006] ------------ | \--* LCL_VAR ref V00 this u:2 $80 | |
N012 ( 64, 27) [000036] -A-XG---R--- * ASG double <l:$186, c:$185> | |
N011 ( 3, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 <l:$186, c:$185> | |
--------- | |
***** BB01, stmt 3 (before) | |
N005 ( 3, 2) [000031] ------------ /--* LCL_VAR double V03 tmp1 u:2 (last use) | |
N006 ( 9, 7) [000033] -A-XG------- * ASG double | |
N004 ( 5, 4) [000032] ---XG--N---- \--* IND double | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT int 4 field offset Fseq[_value] | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) | |
N001 [000001] LCL_VAR V00 this u:2 (last use) => $80 {InitVal($40)} | |
N002 [000043] CNS_INT 4 field offset Fseq[_value] => $43 {IntCns 4} | |
N003 [000044] ADD => $100 {ADD($43, $80)} | |
N005 [000031] LCL_VAR V03 tmp1 u:2 (last use) => <l:$186 {ADD($181, $184)}, c:$185 {ADD($183, $1c0)}> | |
VNApplySelectors: | |
VNForHandle(Fseq[_value]) is $140, fieldType is double | |
VNForMapSelect($81, $140):double returns $180 {$81[$140]} | |
VNForMapSelect($180, $80):double returns $181 {$180[$80]} | |
VNForMapStore($180, $80, $186):double returns $240 {$180[$80 := $186]} | |
fgCurMemoryVN assigned: | |
fieldHnd $140 is {Hnd const: 0x030E520C} | |
fieldSeq $280 is {_value} | |
VNForMapStore($81, $140, $240):double returns $241 {$81[$140 := $240]} | |
fgCurMemoryVN[GcHeap] assigned by StoreField at [000033] to VN: $241. | |
N006 [000033] ASG => $VN.Void | |
***** BB01, stmt 3 (after) | |
N005 ( 3, 2) [000031] ------------ /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$186, c:$185> | |
N006 ( 9, 7) [000033] -A-XG------- * ASG double $VN.Void | |
N004 ( 5, 4) [000032] ---XG--N---- \--* IND double $186 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $100 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
--------- | |
***** BB01, stmt 4 (before) | |
N001 ( 0, 0) [000022] ------------ * RETURN void | |
N001 [000022] RETURN => $2c0 {2c0} | |
***** BB01, stmt 4 (after) | |
N001 ( 0, 0) [000022] ------------ * RETURN void $2c0 | |
finish(BB01). | |
*************** In optVnCopyProp() | |
*************** In SsaBuilder::ComputeDominators(Compiler*, ...) | |
Copy Assertion for BB01 | |
Live vars: {V00 V01} => {V00 V01 V02} | |
Live vars: {V00 V01 V02} => {V00 V02} | |
Live vars: {V00 V02} => {V00} | |
Live vars: {V00} => {V00 V03} | |
Live vars: {V00 V03} => {V03} | |
Live vars: {V03} => {} | |
*************** In optOptimizeCSEs() | |
Blocks/Trees at start of optOptimizeCSE phase | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
( 9, 7) [000011] ------------ * STMT void (IL ???... ???) | |
N004 ( 5, 4) [000025] ---XG------- | /--* IND double <l:$181, c:$1c0> | |
N002 ( 1, 1) [000039] ------------ | | | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000040] -------N---- | | \--* ADD byref $100 | |
N001 ( 1, 1) [000002] ------------ | | \--* LCL_VAR ref V00 this u:2 $80 | |
N006 ( 9, 7) [000010] -A-XG---R--- \--* ASG double <l:$181, c:$1c0> | |
N005 ( 3, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 <l:$181, c:$1c0> | |
***** BB01, stmt 2 | |
( 64, 27) [000037] ------------ * STMT void (IL ???... ???) | |
N009 ( 3, 2) [000012] ------------ | /--* LCL_VAR double V02 tmp0 u:2 (last use) <l:$181, c:$1c0> | |
N010 ( 60, 24) [000018] ---XG------- | /--* ADD double <l:$186, c:$185> | |
N006 ( 3, 4) [000015] ------------ | | | /--* CNS_DBL double 100.00000000000000 $200 | |
N007 ( 42, 10) [000016] ------------ | | | /--* DIV double $182 | |
N005 ( 3, 2) [000014] ------------ | | | | \--* LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N008 ( 52, 18) [000017] ---XG------- | | \--* MUL double <l:$184, c:$183> | |
N004 ( 5, 4) [000028] ---XG------- | | \--* IND double <l:$181, c:$1c2> | |
N002 ( 1, 1) [000041] ------------ | | | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000042] -------N---- | | \--* ADD byref $100 | |
N001 ( 1, 1) [000006] ------------ | | \--* LCL_VAR ref V00 this u:2 $80 | |
N012 ( 64, 27) [000036] -A-XG---R--- \--* ASG double <l:$186, c:$185> | |
N011 ( 3, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 <l:$186, c:$185> | |
***** BB01, stmt 3 | |
( 9, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 3, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$186, c:$185> | |
N006 ( 9, 7) [000033] -A-XG------- \--* ASG double $VN.Void | |
N004 ( 5, 4) [000032] ---XG--N---- \--* IND double $186 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $100 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
***** BB01, stmt 4 | |
( 0, 0) [000023] ------------ * STMT void (IL 0x01F... ???) | |
N001 ( 0, 0) [000022] ------------ \--* RETURN void $2c0 | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In optOptimizeValnumCSEs() | |
CSE candidate #01, vn=$181 cseMask=0000000000000001 in BB01, [cost= 5, size= 4]: | |
N004 ( 5, 4) CSE #01 (use)[000028] ---XG------- * IND double <l:$181, c:$1c2> | |
N002 ( 1, 1) [000041] ------------ | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000042] -------N---- \--* ADD byref $100 | |
N001 ( 1, 1) [000006] ------------ \--* LCL_VAR ref V00 this u:2 $80 | |
Blocks that generate CSE def/uses | |
BB01 cseGen = 0000000000000001 | |
After performing DataFlow for ValnumCSE's | |
BB01 cseIn = 0000000000000000 cseOut = 0000000000000001 | |
Labeling the CSEs with Use/Def information | |
BB01 [000025] Def of CSE #01 [weight=1 ] | |
BB01 [000028] Use of CSE #01 [weight=1 ] | |
************ Trees at start of optValnumCSE_Heuristic() | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
( 9, 7) [000011] ------------ * STMT void (IL ???... ???) | |
N004 ( 5, 4) CSE #01 (def)[000025] ---XG------- | /--* IND double <l:$181, c:$1c0> | |
N002 ( 1, 1) [000039] ------------ | | | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000040] -------N---- | | \--* ADD byref $100 | |
N001 ( 1, 1) [000002] ------------ | | \--* LCL_VAR ref V00 this u:2 $80 | |
N006 ( 9, 7) [000010] -A-XG---R--- \--* ASG double <l:$181, c:$1c0> | |
N005 ( 3, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 <l:$181, c:$1c0> | |
***** BB01, stmt 2 | |
( 64, 27) [000037] ------------ * STMT void (IL ???... ???) | |
N009 ( 3, 2) [000012] ------------ | /--* LCL_VAR double V02 tmp0 u:2 (last use) <l:$181, c:$1c0> | |
N010 ( 60, 24) [000018] ---XG------- | /--* ADD double <l:$186, c:$185> | |
N006 ( 3, 4) [000015] ------------ | | | /--* CNS_DBL double 100.00000000000000 $200 | |
N007 ( 42, 10) [000016] ------------ | | | /--* DIV double $182 | |
N005 ( 3, 2) [000014] ------------ | | | | \--* LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N008 ( 52, 18) [000017] ---XG------- | | \--* MUL double <l:$184, c:$183> | |
N004 ( 5, 4) CSE #01 (use)[000028] ---XG------- | | \--* IND double <l:$181, c:$1c2> | |
N002 ( 1, 1) [000041] ------------ | | | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000042] -------N---- | | \--* ADD byref $100 | |
N001 ( 1, 1) [000006] ------------ | | \--* LCL_VAR ref V00 this u:2 $80 | |
N012 ( 64, 27) [000036] -A-XG---R--- \--* ASG double <l:$186, c:$185> | |
N011 ( 3, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 <l:$186, c:$185> | |
***** BB01, stmt 3 | |
( 9, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 3, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$186, c:$185> | |
N006 ( 9, 7) [000033] -A-XG------- \--* ASG double $VN.Void | |
N004 ( 5, 4) [000032] ---XG--N---- \--* IND double $186 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $100 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
***** BB01, stmt 4 | |
( 0, 0) [000023] ------------ * STMT void (IL 0x01F... ???) | |
N001 ( 0, 0) [000022] ------------ \--* RETURN void $2c0 | |
------------------------------------------------------------------------------------------------------------------- | |
Aggressive CSE Promotion cutoff is 100 | |
Moderate CSE Promotion cutoff is 50 | |
Framesize estimate is 0x0018 | |
We have a small frame | |
Sorted CSE candidates: | |
CSE #01,cseMask=0000000000000001,useCnt=1: [def=100, use=100] :: N004 ( 5, 4) CSE #01 (def)[000025] ---XG------- * IND double <l:$181, c:$1c0> | |
Considering CSE #01 [def=100, use=100, cost= 5] CSE Expression: | |
N004 ( 5, 4) CSE #01 (def)[000025] ---XG------- * IND double <l:$181, c:$1c0> | |
N002 ( 1, 1) [000039] ------------ | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000040] -------N---- \--* ADD byref $100 | |
N001 ( 1, 1) [000002] ------------ \--* LCL_VAR ref V00 this u:2 $80 | |
Aggressive CSE Promotion (300 >= 100) | |
cseRefCnt=300, aggressiveRefCnt=100, moderateRefCnt=50 | |
defCnt=100, useCnt=100, cost=5, size=4 | |
def_cost=1, use_cost=1, extra_no_cost=6, extra_yes_cost=0 | |
CSE cost savings check (506 >= 200) passes | |
Promoting CSE: | |
lvaGrabTemp returning 4 (V04 rat0) (a long lifetime temp) called for ValNumCSE. | |
CSE #01 def at [000025] replaced in BB01 with def of V04 | |
New refCnts for V04: refCnt = 1, refCntWtd = 1 | |
New refCnts for V04: refCnt = 2, refCntWtd = 2 | |
New refCnts for V02: refCnt = 3, refCntWtd = 6 | |
New refCnts for V04: refCnt = 3, refCntWtd = 3 | |
New refCnts for V00: refCnt = 6, refCntWtd = 6 | |
New refCnts for V04: refCnt = 4, refCntWtd = 4 | |
optValnumCSE morphed tree: | |
N007 ( 3, 2) [000047] ------------ /--* LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N008 ( 12, 9) [000048] -A-XG------- /--* COMMA double <l:$181, c:$1c0> | |
N004 ( 5, 4) [000025] ---XG------- | | /--* IND double <l:$181, c:$1c0> | |
N002 ( 1, 1) [000039] ------------ | | | | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000040] -------N---- | | | \--* ADD byref $100 | |
N001 ( 1, 1) [000002] ------------ | | | \--* LCL_VAR ref V00 this u:2 $80 | |
N006 ( 9, 7) [000046] -A-XG---R--- | \--* ASG double $VN.Void | |
N005 ( 3, 2) [000045] D------N---- | \--* LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N010 ( 16, 12) [000010] -A-XG---R--- * ASG double <l:$181, c:$1c0> | |
N009 ( 3, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 <l:$181, c:$1c0> | |
CSE #01 use at [000028] replaced in BB01 with temp use. | |
New refCnts for V00: refCnt = 5, refCntWtd = 5 | |
New refCnts for V04: refCnt = 5, refCntWtd = 5 | |
New refCnts for V03: refCnt = 3, refCntWtd = 6 | |
New refCnts for V04: refCnt = 6, refCntWtd = 6 | |
New refCnts for V01: refCnt = 2, refCntWtd = 2 | |
New refCnts for V02: refCnt = 4, refCntWtd = 8 | |
optValnumCSE morphed tree: | |
N006 ( 3, 2) [000012] ------------ /--* LCL_VAR double V02 tmp0 u:2 (last use) <l:$181, c:$1c0> | |
N007 ( 58, 22) [000018] ----G------- /--* ADD double <l:$186, c:$185> | |
N003 ( 3, 4) [000015] ------------ | | /--* CNS_DBL double 100.00000000000000 $200 | |
N004 ( 42, 10) [000016] ------------ | | /--* DIV double $182 | |
N002 ( 3, 2) [000014] ------------ | | | \--* LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N005 ( 50, 16) [000017] ----G------- | \--* MUL double <l:$184, c:$183> | |
N001 ( 3, 2) [000049] ------------ | \--* LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N009 ( 62, 25) [000036] -A--G---R--- * ASG double <l:$186, c:$185> | |
N008 ( 3, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 <l:$186, c:$185> | |
*************** In optAssertionPropMain() | |
Blocks/Trees at start of phase | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
( 16, 12) [000011] ------------ * STMT void (IL ???... ???) | |
N007 ( 3, 2) [000047] ------------ | /--* LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N008 ( 12, 9) [000048] -A-XG------- | /--* COMMA double <l:$181, c:$1c0> | |
N004 ( 5, 4) [000025] ---XG------- | | | /--* IND double <l:$181, c:$1c0> | |
N002 ( 1, 1) [000039] ------------ | | | | | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000040] -------N---- | | | | \--* ADD byref $100 | |
N001 ( 1, 1) [000002] ------------ | | | | \--* LCL_VAR ref V00 this u:2 $80 | |
N006 ( 9, 7) [000046] -A-XG---R--- | | \--* ASG double $VN.Void | |
N005 ( 3, 2) [000045] D------N---- | | \--* LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N010 ( 16, 12) [000010] -A-XG---R--- \--* ASG double <l:$181, c:$1c0> | |
N009 ( 3, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 <l:$181, c:$1c0> | |
***** BB01, stmt 2 | |
( 62, 25) [000037] ------------ * STMT void (IL ???... ???) | |
N006 ( 3, 2) [000012] ------------ | /--* LCL_VAR double V02 tmp0 u:2 (last use) <l:$181, c:$1c0> | |
N007 ( 58, 22) [000018] ----G------- | /--* ADD double <l:$186, c:$185> | |
N003 ( 3, 4) [000015] ------------ | | | /--* CNS_DBL double 100.00000000000000 $200 | |
N004 ( 42, 10) [000016] ------------ | | | /--* DIV double $182 | |
N002 ( 3, 2) [000014] ------------ | | | | \--* LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N005 ( 50, 16) [000017] ----G------- | | \--* MUL double <l:$184, c:$183> | |
N001 ( 3, 2) [000049] ------------ | | \--* LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N009 ( 62, 25) [000036] -A--G---R--- \--* ASG double <l:$186, c:$185> | |
N008 ( 3, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 <l:$186, c:$185> | |
***** BB01, stmt 3 | |
( 9, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 3, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$186, c:$185> | |
N006 ( 9, 7) [000033] -A-XG------- \--* ASG double $VN.Void | |
N004 ( 5, 4) [000032] ---XG--N---- \--* IND double $186 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $100 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
***** BB01, stmt 4 | |
( 0, 0) [000023] ------------ * STMT void (IL 0x01F... ???) | |
N001 ( 0, 0) [000022] ------------ \--* RETURN void $2c0 | |
------------------------------------------------------------------------------------------------------------------- | |
GenTreeNode creates assertion: | |
N004 ( 5, 4) [000025] ---XG------- * IND double <l:$181, c:$1c0> | |
In BB01 New Global Constant Assertion: (128, 0) ($80,$0) V00.02 != null index=#01, mask=0000000000000001 | |
BB01 valueGen = 0000000000000001AssertionPropCallback::StartMerge: BB01 in -> 0000000000000000 | |
AssertionPropCallback::EndMerge : BB01 in -> 0000000000000000 | |
AssertionPropCallback::Changed : BB01 before out -> 0000000000000001; after out -> 0000000000000001; | |
jumpDest before out -> 0000000000000001; jumpDest after out -> 0000000000000000; | |
BB01 valueIn = 0000000000000000 valueOut = 0000000000000001 | |
Propagating 0000000000000000 assertions for BB01, stmt [000011], tree [000002], tree -> 0 | |
Propagating 0000000000000000 assertions for BB01, stmt [000011], tree [000039], tree -> 0 | |
Propagating 0000000000000000 assertions for BB01, stmt [000011], tree [000040], tree -> 0 | |
Propagating 0000000000000000 assertions for BB01, stmt [000011], tree [000025], tree -> 1 | |
Propagating 0000000000000001 assertions for BB01, stmt [000011], tree [000045], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000011], tree [000046], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000011], tree [000047], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000011], tree [000048], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000011], tree [000009], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000011], tree [000010], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000049], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000014], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000015], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000016], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000017], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000012], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000018], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000035], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000037], tree [000036], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000034], tree [000001], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000034], tree [000043], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000034], tree [000044], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000034], tree [000032], tree -> 1 | |
Non-null prop for index #01 in BB01: | |
N004 ( 5, 4) [000032] ---XG--N---- * IND double $186 | |
Propagating 0000000000000001 assertions for BB01, stmt [000034], tree [000031], tree -> 0 | |
Propagating 0000000000000001 assertions for BB01, stmt [000034], tree [000033], tree -> 0 | |
Re-morphing this stmt: | |
( 9, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 3, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$186, c:$185> | |
N006 ( 9, 7) [000033] -A-XG------- \--* ASG double $VN.Void | |
N004 ( 5, 4) [000032] x---GO-N---- \--* IND double $186 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $100 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
New refCnts for V00: refCnt = 6, refCntWtd = 6 | |
New refCnts for V03: refCnt = 4, refCntWtd = 8 | |
optAssertionPropMain morphed tree: | |
N005 ( 3, 2) [000031] ------------ /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$186, c:$185> | |
N006 ( 9, 7) [000033] -A--GO------ * ASG double $VN.Void | |
N004 ( 5, 4) [000032] x---GO-N---- \--* IND double $186 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $100 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
Propagating 0000000000000001 assertions for BB01, stmt [000023], tree [000022], tree -> 0 | |
*************** In fgDebugCheckBBlist | |
*************** In OptimizeRangeChecks() | |
Blocks/trees before phase | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
( 16, 12) [000011] ------------ * STMT void (IL ???... ???) | |
N007 ( 3, 2) [000047] ------------ | /--* LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N008 ( 12, 9) [000048] -A-XG------- | /--* COMMA double <l:$181, c:$1c0> | |
N004 ( 5, 4) [000025] ---XG------- | | | /--* IND double <l:$181, c:$1c0> | |
N002 ( 1, 1) [000039] ------------ | | | | | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000040] -------N---- | | | | \--* ADD byref $100 | |
N001 ( 1, 1) [000002] ------------ | | | | \--* LCL_VAR ref V00 this u:2 $80 | |
N006 ( 9, 7) [000046] -A-XG---R--- | | \--* ASG double $VN.Void | |
N005 ( 3, 2) [000045] D------N---- | | \--* LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N010 ( 16, 12) [000010] -A-XG---R--- \--* ASG double <l:$181, c:$1c0> | |
N009 ( 3, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 <l:$181, c:$1c0> | |
***** BB01, stmt 2 | |
( 62, 25) [000037] ------------ * STMT void (IL ???... ???) | |
N006 ( 3, 2) [000012] ------------ | /--* LCL_VAR double V02 tmp0 u:2 (last use) <l:$181, c:$1c0> | |
N007 ( 58, 22) [000018] ----G------- | /--* ADD double <l:$186, c:$185> | |
N003 ( 3, 4) [000015] ------------ | | | /--* CNS_DBL double 100.00000000000000 $200 | |
N004 ( 42, 10) [000016] ------------ | | | /--* DIV double $182 | |
N002 ( 3, 2) [000014] ------------ | | | | \--* LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N005 ( 50, 16) [000017] ----G------- | | \--* MUL double <l:$184, c:$183> | |
N001 ( 3, 2) [000049] ------------ | | \--* LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N009 ( 62, 25) [000036] -A--G---R--- \--* ASG double <l:$186, c:$185> | |
N008 ( 3, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 <l:$186, c:$185> | |
***** BB01, stmt 3 | |
( 9, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 3, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$186, c:$185> | |
N006 ( 9, 7) [000033] -A--GO------ \--* ASG double $VN.Void | |
N004 ( 5, 4) [000032] x---GO-N---- \--* IND double $186 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $100 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
***** BB01, stmt 4 | |
( 0, 0) [000023] ------------ * STMT void (IL 0x01F... ???) | |
N001 ( 0, 0) [000022] ------------ \--* RETURN void $2c0 | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDetermineFirstColdBlock() | |
No procedure splitting will be done for this method | |
*************** In IR Rationalize | |
Trees before IR Rationalize | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
***** BB01, stmt 1 | |
( 16, 12) [000011] ------------ * STMT void (IL ???... ???) | |
N007 ( 3, 2) [000047] ------------ | /--* LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N008 ( 12, 9) [000048] -A-XG------- | /--* COMMA double <l:$181, c:$1c0> | |
N004 ( 5, 4) [000025] ---XG------- | | | /--* IND double <l:$181, c:$1c0> | |
N002 ( 1, 1) [000039] ------------ | | | | | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000040] -------N---- | | | | \--* ADD byref $100 | |
N001 ( 1, 1) [000002] ------------ | | | | \--* LCL_VAR ref V00 this u:2 $80 | |
N006 ( 9, 7) [000046] -A-XG---R--- | | \--* ASG double $VN.Void | |
N005 ( 3, 2) [000045] D------N---- | | \--* LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N010 ( 16, 12) [000010] -A-XG---R--- \--* ASG double <l:$181, c:$1c0> | |
N009 ( 3, 2) [000009] D------N---- \--* LCL_VAR double V02 tmp0 d:2 <l:$181, c:$1c0> | |
***** BB01, stmt 2 | |
( 62, 25) [000037] ------------ * STMT void (IL ???... ???) | |
N006 ( 3, 2) [000012] ------------ | /--* LCL_VAR double V02 tmp0 u:2 (last use) <l:$181, c:$1c0> | |
N007 ( 58, 22) [000018] ----G------- | /--* ADD double <l:$186, c:$185> | |
N003 ( 3, 4) [000015] ------------ | | | /--* CNS_DBL double 100.00000000000000 $200 | |
N004 ( 42, 10) [000016] ------------ | | | /--* DIV double $182 | |
N002 ( 3, 2) [000014] ------------ | | | | \--* LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N005 ( 50, 16) [000017] ----G------- | | \--* MUL double <l:$184, c:$183> | |
N001 ( 3, 2) [000049] ------------ | | \--* LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N009 ( 62, 25) [000036] -A--G---R--- \--* ASG double <l:$186, c:$185> | |
N008 ( 3, 2) [000035] D------N---- \--* LCL_VAR double V03 tmp1 d:2 <l:$186, c:$185> | |
***** BB01, stmt 3 | |
( 9, 7) [000034] ------------ * STMT void (IL ???... ???) | |
N005 ( 3, 2) [000031] ------------ | /--* LCL_VAR double V03 tmp1 u:2 (last use) <l:$186, c:$185> | |
N006 ( 9, 7) [000033] -A--GO------ \--* ASG double $VN.Void | |
N004 ( 5, 4) [000032] x---GO-N---- \--* IND double $186 | |
N002 ( 1, 1) [000043] ------------ | /--* CNS_INT int 4 field offset Fseq[_value] $43 | |
N003 ( 2, 2) [000044] -------N---- \--* ADD byref $100 | |
N001 ( 1, 1) [000001] ------------ \--* LCL_VAR ref V00 this u:2 (last use) $80 | |
***** BB01, stmt 4 | |
( 0, 0) [000023] ------------ * STMT void (IL 0x01F... ???) | |
N001 ( 0, 0) [000022] ------------ \--* RETURN void $2c0 | |
------------------------------------------------------------------------------------------------------------------- | |
rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) | |
N006 ( 9, 7) [000046] DA-XG------- * STORE_LCL_VAR double V04 cse0 | |
rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) | |
N010 ( 16, 12) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 | |
rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) | |
N009 ( 62, 25) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 | |
*************** Exiting IR Rationalize | |
Trees after IR Rationalize | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
N001 ( 1, 1) [000002] ------------ t2 = LCL_VAR ref V00 this u:2 $80 | |
N002 ( 1, 1) [000039] ------------ t39 = CNS_INT int 4 field offset Fseq[_value] $43 | |
/--* t2 ref | |
+--* t39 int | |
N003 ( 2, 2) [000040] -------N---- t40 = * ADD byref $100 | |
/--* t40 byref | |
N004 ( 5, 4) [000025] ---XG------- t25 = * IND double <l:$181, c:$1c0> | |
/--* t25 double | |
N006 ( 9, 7) [000046] DA-XG------- * STORE_LCL_VAR double V04 cse0 | |
N007 ( 3, 2) [000047] ------------ t47 = LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
/--* t47 double | |
N010 ( 16, 12) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 | |
N001 ( 3, 2) [000049] ------------ t49 = LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N002 ( 3, 2) [000014] ------------ t14 = LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N003 ( 3, 4) [000015] ------------ t15 = CNS_DBL double 100.00000000000000 $200 | |
/--* t14 double | |
+--* t15 double | |
N004 ( 42, 10) [000016] ------------ t16 = * DIV double $182 | |
/--* t49 double | |
+--* t16 double | |
N005 ( 50, 16) [000017] ----G------- t17 = * MUL double <l:$184, c:$183> | |
N006 ( 3, 2) [000012] ------------ t12 = LCL_VAR double V02 tmp0 u:2 (last use) <l:$181, c:$1c0> | |
/--* t17 double | |
+--* t12 double | |
N007 ( 58, 22) [000018] ----G------- t18 = * ADD double <l:$186, c:$185> | |
/--* t18 double | |
N009 ( 62, 25) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 | |
N001 ( 1, 1) [000001] ------------ t1 = LCL_VAR ref V00 this u:2 (last use) $80 | |
N002 ( 1, 1) [000043] ------------ t43 = CNS_INT int 4 field offset Fseq[_value] $43 | |
/--* t1 ref | |
+--* t43 int | |
N003 ( 2, 2) [000044] -------N---- t44 = * ADD byref $100 | |
N005 ( 3, 2) [000031] ------------ t31 = LCL_VAR double V03 tmp1 u:2 (last use) <l:$186, c:$185> | |
/--* t44 byref | |
+--* t31 double | |
[000050] -A--GO------ * STOREIND double | |
( 0, 0) [000023] ------------ IL_OFFSET void IL offset: 0x1f | |
N001 ( 0, 0) [000022] ------------ RETURN void $2c0 | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
*************** In fgDebugCheckBBlist | |
*************** In Lowering | |
Trees before Lowering | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
N001 ( 1, 1) [000002] ------------ t2 = LCL_VAR ref V00 this u:2 $80 | |
N002 ( 1, 1) [000039] ------------ t39 = CNS_INT int 4 field offset Fseq[_value] $43 | |
/--* t2 ref | |
+--* t39 int | |
N003 ( 2, 2) [000040] -------N---- t40 = * ADD byref $100 | |
/--* t40 byref | |
N004 ( 5, 4) [000025] ---XG------- t25 = * IND double <l:$181, c:$1c0> | |
/--* t25 double | |
N006 ( 9, 7) [000046] DA-XG------- * STORE_LCL_VAR double V04 cse0 | |
N007 ( 3, 2) [000047] ------------ t47 = LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
/--* t47 double | |
N010 ( 16, 12) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 | |
N001 ( 3, 2) [000049] ------------ t49 = LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N002 ( 3, 2) [000014] ------------ t14 = LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N003 ( 3, 4) [000015] ------------ t15 = CNS_DBL double 100.00000000000000 $200 | |
/--* t14 double | |
+--* t15 double | |
N004 ( 42, 10) [000016] ------------ t16 = * DIV double $182 | |
/--* t49 double | |
+--* t16 double | |
N005 ( 50, 16) [000017] ----G------- t17 = * MUL double <l:$184, c:$183> | |
N006 ( 3, 2) [000012] ------------ t12 = LCL_VAR double V02 tmp0 u:2 (last use) <l:$181, c:$1c0> | |
/--* t17 double | |
+--* t12 double | |
N007 ( 58, 22) [000018] ----G------- t18 = * ADD double <l:$186, c:$185> | |
/--* t18 double | |
N009 ( 62, 25) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 | |
N001 ( 1, 1) [000001] ------------ t1 = LCL_VAR ref V00 this u:2 (last use) $80 | |
N002 ( 1, 1) [000043] ------------ t43 = CNS_INT int 4 field offset Fseq[_value] $43 | |
/--* t1 ref | |
+--* t43 int | |
N003 ( 2, 2) [000044] -------N---- t44 = * ADD byref $100 | |
N005 ( 3, 2) [000031] ------------ t31 = LCL_VAR double V03 tmp1 u:2 (last use) <l:$186, c:$185> | |
/--* t44 byref | |
+--* t31 double | |
[000050] -A--GO------ * STOREIND double | |
( 0, 0) [000023] ------------ IL_OFFSET void IL offset: 0x1f | |
N001 ( 0, 0) [000022] ------------ RETURN void $2c0 | |
------------------------------------------------------------------------------------------------------------------- | |
Addressing mode: | |
Base | |
N001 ( 1, 1) [000002] ------------ * LCL_VAR ref V00 this u:2 $80 | |
+ 4 | |
New addressing mode node: | |
[000051] ------------ * LEA(b+4) byref | |
Addressing mode: | |
Base | |
N001 ( 1, 1) [000001] ------------ * LCL_VAR ref V00 this u:2 (last use) $80 | |
+ 4 | |
New addressing mode node: | |
[000052] ------------ * LEA(b+4) byref | |
lowering GT_RETURN | |
N001 ( 0, 0) [000022] ------------ * RETURN void $2c0 | |
============Lower has completed modifying nodes. | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
N001 ( 1, 1) [000002] ------------ t2 = LCL_VAR ref V00 this u:2 $80 | |
/--* t2 ref | |
[000051] -c---------- t51 = * LEA(b+4) byref | |
/--* t51 byref | |
N004 ( 5, 4) [000025] ---XG------- t25 = * IND double <l:$181, c:$1c0> | |
/--* t25 double | |
N006 ( 9, 7) [000046] DA-XG------- * STORE_LCL_VAR double V04 cse0 | |
N007 ( 3, 2) [000047] ------------ t47 = LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
/--* t47 double | |
N010 ( 16, 12) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 | |
N001 ( 3, 2) [000049] ------------ t49 = LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
N002 ( 3, 2) [000014] ------------ t14 = LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N003 ( 3, 4) [000015] -c---------- t15 = CNS_DBL double 100.00000000000000 $200 | |
/--* t14 double | |
+--* t15 double | |
N004 ( 42, 10) [000016] ------------ t16 = * DIV double $182 | |
/--* t49 double | |
+--* t16 double | |
N005 ( 50, 16) [000017] ----G------- t17 = * MUL double <l:$184, c:$183> | |
N006 ( 3, 2) [000012] ------------ t12 = LCL_VAR double V02 tmp0 u:2 (last use) <l:$181, c:$1c0> | |
/--* t17 double | |
+--* t12 double | |
N007 ( 58, 22) [000018] ----G------- t18 = * ADD double <l:$186, c:$185> | |
/--* t18 double | |
N009 ( 62, 25) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 | |
N001 ( 1, 1) [000001] ------------ t1 = LCL_VAR ref V00 this u:2 (last use) $80 | |
/--* t1 ref | |
[000052] -c---------- t52 = * LEA(b+4) byref | |
N005 ( 3, 2) [000031] ------------ t31 = LCL_VAR double V03 tmp1 u:2 (last use) <l:$186, c:$185> | |
/--* t52 byref | |
+--* t31 double | |
[000050] -A--GO------ * STOREIND double | |
( 0, 0) [000023] ------------ IL_OFFSET void IL offset: 0x1f | |
N001 ( 0, 0) [000022] ------------ RETURN void $2c0 | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In fgLocalVarLiveness() | |
; Initial local variable assignments | |
; | |
; V00 this ref this class-hnd | |
; V01 arg1 double | |
; V02 tmp0 double | |
; V03 tmp1 double | |
; V04 cse0 double | |
In fgLocalVarLivenessInit, sorting locals | |
refCnt table for 'RaiseValue': | |
V00 this [ ref]: refCnt = 6, refCntWtd = 6 pref [ecx] | |
V02 tmp0 [double]: refCnt = 4, refCntWtd = 8 | |
V03 tmp1 [double]: refCnt = 4, refCntWtd = 8 | |
V04 cse0 [double]: refCnt = 6, refCntWtd = 6 | |
V01 arg1 [double]: refCnt = 2, refCntWtd = 2 | |
*************** In fgPerBlockLocalVarLiveness() | |
BB01 USE(2)={V00 V01} + ByrefExposed + GcHeap | |
DEF(3)={ V02 V03 V04 } | |
** Memory liveness computed, GcHeap states and ByrefExposed states match | |
*************** In fgInterBlockLocalVarLiveness() | |
BB liveness after fgLiveVarAnalysis(): | |
BB01 IN (2)={V00 V01} + ByrefExposed + GcHeap | |
OUT(0)={ } | |
*************** In fgUpdateFlowGraph() | |
Before updating the flow graph: | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
Liveness pass finished after lowering, IR: | |
lvasortagain = 0 | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
N001 ( 1, 1) [000002] ------------ t2 = LCL_VAR ref V00 this u:2 $80 | |
/--* t2 ref | |
[000051] -c---------- t51 = * LEA(b+4) byref | |
/--* t51 byref | |
N004 ( 5, 4) [000025] ---XG------- t25 = * IND double <l:$181, c:$1c0> | |
/--* t25 double | |
N006 ( 9, 7) [000046] DA-XG------- * STORE_LCL_VAR double V04 cse0 | |
N007 ( 3, 2) [000047] ------------ t47 = LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
/--* t47 double | |
N010 ( 16, 12) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 | |
N001 ( 3, 2) [000049] ------------ t49 = LCL_VAR double V04 cse0 (last use) <l:$181, c:$1c0> | |
N002 ( 3, 2) [000014] ------------ t14 = LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N003 ( 3, 4) [000015] -c---------- t15 = CNS_DBL double 100.00000000000000 $200 | |
/--* t14 double | |
+--* t15 double | |
N004 ( 42, 10) [000016] ------------ t16 = * DIV double $182 | |
/--* t49 double | |
+--* t16 double | |
N005 ( 50, 16) [000017] ----G------- t17 = * MUL double <l:$184, c:$183> | |
N006 ( 3, 2) [000012] ------------ t12 = LCL_VAR double V02 tmp0 u:2 (last use) <l:$181, c:$1c0> | |
/--* t17 double | |
+--* t12 double | |
N007 ( 58, 22) [000018] ----G------- t18 = * ADD double <l:$186, c:$185> | |
/--* t18 double | |
N009 ( 62, 25) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 | |
N001 ( 1, 1) [000001] ------------ t1 = LCL_VAR ref V00 this u:2 (last use) $80 | |
/--* t1 ref | |
[000052] -c---------- t52 = * LEA(b+4) byref | |
N005 ( 3, 2) [000031] ------------ t31 = LCL_VAR double V03 tmp1 u:2 (last use) <l:$186, c:$185> | |
/--* t52 byref | |
+--* t31 double | |
[000050] -A--GO------ * STOREIND double | |
( 0, 0) [000023] ------------ IL_OFFSET void IL offset: 0x1f | |
N001 ( 0, 0) [000022] ------------ RETURN void $2c0 | |
------------------------------------------------------------------------------------------------------------------- | |
*************** Exiting Lowering | |
Trees after Lowering | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
N001 ( 1, 1) [000002] ------------ t2 = LCL_VAR ref V00 this u:2 $80 | |
/--* t2 ref | |
[000051] -c---------- t51 = * LEA(b+4) byref | |
/--* t51 byref | |
N004 ( 5, 4) [000025] ---XG------- t25 = * IND double <l:$181, c:$1c0> | |
/--* t25 double | |
N006 ( 9, 7) [000046] DA-XG------- * STORE_LCL_VAR double V04 cse0 | |
N007 ( 3, 2) [000047] ------------ t47 = LCL_VAR double V04 cse0 <l:$181, c:$1c0> | |
/--* t47 double | |
N010 ( 16, 12) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 | |
N001 ( 3, 2) [000049] ------------ t49 = LCL_VAR double V04 cse0 (last use) <l:$181, c:$1c0> | |
N002 ( 3, 2) [000014] ------------ t14 = LCL_VAR double V01 arg1 u:2 (last use) $c0 | |
N003 ( 3, 4) [000015] -c---------- t15 = CNS_DBL double 100.00000000000000 $200 | |
/--* t14 double | |
+--* t15 double | |
N004 ( 42, 10) [000016] ------------ t16 = * DIV double $182 | |
/--* t49 double | |
+--* t16 double | |
N005 ( 50, 16) [000017] ----G------- t17 = * MUL double <l:$184, c:$183> | |
N006 ( 3, 2) [000012] ------------ t12 = LCL_VAR double V02 tmp0 u:2 (last use) <l:$181, c:$1c0> | |
/--* t17 double | |
+--* t12 double | |
N007 ( 58, 22) [000018] ----G------- t18 = * ADD double <l:$186, c:$185> | |
/--* t18 double | |
N009 ( 62, 25) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 | |
N001 ( 1, 1) [000001] ------------ t1 = LCL_VAR ref V00 this u:2 (last use) $80 | |
/--* t1 ref | |
[000052] -c---------- t52 = * LEA(b+4) byref | |
N005 ( 3, 2) [000031] ------------ t31 = LCL_VAR double V03 tmp1 u:2 (last use) <l:$186, c:$185> | |
/--* t52 byref | |
+--* t31 double | |
[000050] -A--GO------ * STOREIND double | |
( 0, 0) [000023] ------------ IL_OFFSET void IL offset: 0x1f | |
N001 ( 0, 0) [000022] ------------ RETURN void $2c0 | |
------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
Clearing modified regs. | |
buildIntervals ======== | |
----------------- | |
LIVENESS: | |
----------------- | |
BB01 use def in out | |
{V00 V01} | |
{V02 V03 V04} | |
{V00 V01} | |
{} | |
Interval 0: RefPositions {} physReg:NA Preferences=[allInt] | |
Interval 1: RefPositions {} physReg:NA Preferences=[allFloat] | |
Interval 2: RefPositions {} physReg:NA Preferences=[allFloat] | |
Interval 3: RefPositions {} physReg:NA Preferences=[allFloat] | |
Interval 4: RefPositions {} physReg:NA Preferences=[allFloat] | |
Double alignment: | |
Bytes that could be saved by not using EBP frame: 7 | |
Sum of weighted ref counts for EBP enregistered variables: 350 | |
Sum of weighted ref counts for weighted stack based doubles: 0 | |
Predicting not to double-align ESP to save 7 bytes of code. | |
FP callee save candidate vars: {V02 V03 V04} | |
floatVarCount = 4; hasLoops = 0, singleExit = 1 | |
TUPLE STYLE DUMP BEFORE LSRA | |
LSRA Block Sequence: BB01( 1 ) | |
BB01 [000..020) (return), preds={} succs={} | |
===== | |
N001. V00(t2) | |
N000. LEA(b+4) | |
N004. IND | |
N006. V04(t46) | |
N007. V04(t47) | |
N010. V02(t10) | |
N001. V04(t49*) | |
N002. V01(t14*) | |
N003. CNS_DBL 100.00000000000000 | |
N004. DIV | |
N005. MUL | |
N006. V02(t12*) | |
N007. ADD | |
N009. V03(t36) | |
N001. V00(t1*) | |
N000. LEA(b+4) | |
N005. V03(t31*) | |
N000. STOREIND | |
N000. IL_OFFSET IL offset: 0x1f | |
N001. RETURN | |
buildIntervals second part ======== | |
Int arg V00 in reg ecx | |
<RefPosition #0 @0 RefTypeParamDef <Ivl:0 V00> BB00 regmask=[ecx] fixed> | |
<RefPosition #1 @0 RefTypeParamDef <Ivl:1 V01> BB00 regmask=[allFloat]> | |
NEW BLOCK BB01 | |
<RefPosition #2 @1 RefTypeBB BB01 regmask=[]> | |
N003 ( 1, 1) [000002] ------------ * LCL_VAR ref V00 this u:2 NA REG NA $80 | |
+<TreeNodeInfo @ 3 1=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I> | |
N003. V00(L0) | |
consume=0 produce=1 | |
N005 (???,???) [000051] -c---------- * LEA(b+4) byref REG NA | |
+<TreeNodeInfo @ 5 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I> | |
N005. LEA(b+4) | |
Contained | |
N007 ( 5, 4) [000025] ---XG------- * IND double REG NA <l:$181, c:$1c0> | |
+<TreeNodeInfo @ 7 1=1 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N007. t25 = IND | |
consume=1 produce=1 | |
at start of tree, map contains: { N005. LEA -> (3.N003) } | |
<RefPosition #3 @7 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] last> | |
Def candidates [allFloat], Use candidates [allFloat] | |
Interval 5: RefPositions {} physReg:NA Preferences=[allFloat] | |
<RefPosition #4 @8 RefTypeDef <Ivl:5> IND BB01 regmask=[allFloat]> | |
N009 ( 9, 7) [000046] DA-XG------- * STORE_LCL_VAR double V04 cse0 NA REG NA | |
+<TreeNodeInfo @ 9 0=1 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N009. V04(L4) | |
consume=1 produce=0 | |
at start of tree, map contains: { N007. IND -> (8.N007) } | |
Assigning related <L4> to <I5> | |
<RefPosition #5 @9 RefTypeUse <Ivl:5> BB01 regmask=[allFloat] last> | |
Def candidates [allFloat], Use candidates [allFloat] | |
<RefPosition #6 @10 RefTypeDef <Ivl:4 V04> STORE_LCL_VAR BB01 regmask=[allFloat] last> | |
N011 ( 3, 2) [000047] ------------ * LCL_VAR double V04 cse0 NA REG NA <l:$181, c:$1c0> | |
+<TreeNodeInfo @ 11 1=0 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N011. V04(L4) | |
consume=0 produce=1 | |
N013 ( 16, 12) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 NA REG NA | |
+<TreeNodeInfo @ 13 0=1 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N013. V02(L2) | |
consume=1 produce=0 | |
at start of tree, map contains: { N011. LCL_VAR -> (11.N011) } | |
<RefPosition #7 @13 RefTypeUse <Ivl:4 V04> LCL_VAR BB01 regmask=[allFloat] last> | |
Def candidates [allFloat], Use candidates [allFloat] | |
<RefPosition #8 @14 RefTypeDef <Ivl:2 V02> STORE_LCL_VAR BB01 regmask=[allFloat] last> | |
N015 ( 3, 2) [000049] ------------ * LCL_VAR double V04 cse0 NA (last use) REG NA <l:$181, c:$1c0> | |
+<TreeNodeInfo @ 15 1=0 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I O> | |
N015. V04(L4) | |
consume=0 produce=1 | |
N017 ( 3, 2) [000014] ------------ * LCL_VAR double V01 arg1 u:2 NA (last use) REG NA $c0 | |
+<TreeNodeInfo @ 17 1=0 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N017. V01(L1) | |
consume=0 produce=1 | |
N019 ( 3, 4) [000015] -c---------- * CNS_DBL double 100.00000000000000 REG NA $200 | |
+<TreeNodeInfo @ 19 0=0 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N019. CNS_DBL 100.00000000000000 REG NA | |
Contained | |
N021 ( 42, 10) [000016] ------------ * DIV double REG NA $182 | |
+<TreeNodeInfo @ 21 1=1 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N021. t16 = DIV | |
consume=1 produce=1 | |
at start of tree, map contains: { N017. LCL_VAR -> (17.N017); N015. LCL_VAR -> (15.N015) } | |
<RefPosition #9 @21 RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[allFloat] last> | |
Def candidates [allFloat], Use candidates [allFloat] | |
Interval 6: RefPositions {} physReg:NA Preferences=[allFloat] | |
Assigning related <L1> to <I6> | |
<RefPosition #10 @22 RefTypeDef <Ivl:6> DIV BB01 regmask=[allFloat]> | |
N023 ( 50, 16) [000017] ----G------- * MUL double REG NA <l:$184, c:$183> | |
+<TreeNodeInfo @ 23 1=2 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N023. t17 = MUL | |
consume=2 produce=1 | |
at start of tree, map contains: { N015. LCL_VAR -> (15.N015); N021. DIV -> (22.N021) } | |
<RefPosition #11 @23 RefTypeUse <Ivl:4 V04> LCL_VAR BB01 regmask=[allFloat] last> | |
<RefPosition #12 @23 RefTypeUse <Ivl:6> BB01 regmask=[allFloat] last> | |
Def candidates [allFloat], Use candidates [allFloat] | |
Interval 7: RefPositions {} physReg:NA Preferences=[allFloat] | |
Assigning related <L4> to <I7> | |
<RefPosition #13 @24 RefTypeDef <Ivl:7> MUL BB01 regmask=[allFloat]> | |
N025 ( 3, 2) [000012] ------------ * LCL_VAR double V02 tmp0 u:2 NA (last use) REG NA <l:$181, c:$1c0> | |
+<TreeNodeInfo @ 25 1=0 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I O> | |
N025. V02(L2) | |
consume=0 produce=1 | |
N027 ( 58, 22) [000018] ----G------- * ADD double REG NA <l:$186, c:$185> | |
+<TreeNodeInfo @ 27 1=2 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N027. t18 = ADD | |
consume=2 produce=1 | |
at start of tree, map contains: { N025. LCL_VAR -> (25.N025); N023. MUL -> (24.N023) } | |
<RefPosition #14 @27 RefTypeUse <Ivl:7> BB01 regmask=[allFloat] last> | |
<RefPosition #15 @27 RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[allFloat] last> | |
Def candidates [allFloat], Use candidates [allFloat] | |
Interval 8: RefPositions {} physReg:NA Preferences=[allFloat] | |
Assigning related <I7> to <I8> | |
<RefPosition #16 @28 RefTypeDef <Ivl:8> ADD BB01 regmask=[allFloat]> | |
N029 ( 62, 25) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 NA REG NA | |
+<TreeNodeInfo @ 29 0=1 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N029. V03(L3) | |
consume=1 produce=0 | |
at start of tree, map contains: { N027. ADD -> (28.N027) } | |
Assigning related <L3> to <I8> | |
<RefPosition #17 @29 RefTypeUse <Ivl:8> BB01 regmask=[allFloat] last> | |
Def candidates [allFloat], Use candidates [allFloat] | |
<RefPosition #18 @30 RefTypeDef <Ivl:3 V03> STORE_LCL_VAR BB01 regmask=[allFloat] last> | |
N031 ( 1, 1) [000001] ------------ * LCL_VAR ref V00 this u:2 NA (last use) REG NA $80 | |
+<TreeNodeInfo @ 31 1=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I> | |
N031. V00(L0) | |
consume=0 produce=1 | |
N033 (???,???) [000052] -c---------- * LEA(b+4) byref REG NA | |
+<TreeNodeInfo @ 33 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I> | |
N033. LEA(b+4) | |
Contained | |
N035 ( 3, 2) [000031] ------------ * LCL_VAR double V03 tmp1 u:2 NA (last use) REG NA <l:$186, c:$185> | |
+<TreeNodeInfo @ 35 1=0 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N035. V03(L3) | |
consume=0 produce=1 | |
N037 (???,???) [000050] -A--GO------ * STOREIND double REG NA | |
+<TreeNodeInfo @ 37 0=2 0i 0f src=[allFloat] int=[allInt] dst=[allFloat] I> | |
N037. STOREIND | |
consume=2 produce=0 | |
at start of tree, map contains: { N035. LCL_VAR -> (35.N035); N033. LEA -> (31.N031) } | |
<RefPosition #19 @37 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] last> | |
<RefPosition #20 @37 RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[allFloat] last> | |
N039 ( 0, 0) [000023] ------------ * IL_OFFSET void IL offset: 0x1f REG NA | |
+<TreeNodeInfo @ 39 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I> | |
N039. IL_OFFSET IL offset: 0x1f REG NA | |
consume=0 produce=0 | |
N041 ( 0, 0) [000022] ------------ * RETURN void REG NA $2c0 | |
+<TreeNodeInfo @ 41 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I> | |
N041. RETURN | |
consume=0 produce=0 | |
CHECKING LAST USES for block 1, liveout={} | |
============================== | |
use: {V00 V01} | |
def: {V02 V03 V04} | |
Linear scan intervals BEFORE VALIDATING INTERVALS: | |
Interval 0: (V00) RefPositions {#0@0 #3@7 #19@37} physReg:ecx Preferences=[ecx] | |
Interval 1: (V01) RefPositions {#1@0 #9@21} physReg:NA Preferences=[allFloat] | |
Interval 2: (V02) RefPositions {#8@14 #15@27} physReg:NA Preferences=[allFloat] | |
Interval 3: (V03) RefPositions {#18@30 #20@37} physReg:NA Preferences=[allFloat] | |
Interval 4: (V04) RefPositions {#6@10 #7@13 #11@23} physReg:NA Preferences=[allFloat] | |
Interval 5: RefPositions {#4@8 #5@9} physReg:NA Preferences=[allFloat] RelatedInterval <L4>[0326BE5C] | |
Interval 6: RefPositions {#10@22 #12@23} physReg:NA Preferences=[allFloat] RelatedInterval <L1>[0326BDC0] | |
Interval 7: RefPositions {#13@24 #14@27} physReg:NA Preferences=[allFloat] RelatedInterval <L4>[0326BE5C] | |
Interval 8: RefPositions {#16@28 #17@29} physReg:NA Preferences=[allFloat] RelatedInterval <L3>[0326BE28] | |
------------ | |
REFPOSITIONS BEFORE VALIDATING INTERVALS: | |
------------ | |
<RefPosition #0 @0 ->#3 RefTypeParamDef <Ivl:0 V00> BB00 regmask=[ecx] fixed> | |
<RefPosition #1 @0 ->#9 RefTypeParamDef <Ivl:1 V01> BB00 regmask=[allFloat]> | |
<RefPosition #2 @1 RefTypeBB BB01 regmask=[]> | |
<RefPosition #3 @7 ->#19 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt]> | |
<RefPosition #4 @8 ->#5 RefTypeDef <Ivl:5> IND BB01 regmask=[allFloat]> | |
<RefPosition #5 @9 RefTypeUse <Ivl:5> BB01 regmask=[allFloat] last> | |
<RefPosition #6 @10 ->#7 RefTypeDef <Ivl:4 V04> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #7 @13 ->#11 RefTypeUse <Ivl:4 V04> LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #8 @14 ->#15 RefTypeDef <Ivl:2 V02> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #9 @21 RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[allFloat] last> | |
<RefPosition #10 @22 ->#12 RefTypeDef <Ivl:6> DIV BB01 regmask=[allFloat]> | |
<RefPosition #11 @23 RefTypeUse <Ivl:4 V04> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
<RefPosition #12 @23 RefTypeUse <Ivl:6> BB01 regmask=[allFloat] last> | |
<RefPosition #13 @24 ->#14 RefTypeDef <Ivl:7> MUL BB01 regmask=[allFloat]> | |
<RefPosition #14 @27 RefTypeUse <Ivl:7> BB01 regmask=[allFloat] last> | |
<RefPosition #15 @27 RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
<RefPosition #16 @28 ->#17 RefTypeDef <Ivl:8> ADD BB01 regmask=[allFloat]> | |
<RefPosition #17 @29 RefTypeUse <Ivl:8> BB01 regmask=[allFloat] last> | |
<RefPosition #18 @30 ->#20 RefTypeDef <Ivl:3 V03> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #19 @37 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] last> | |
<RefPosition #20 @37 RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[allFloat] last> | |
----------------- | |
<RefPosition #0 @0 ->#3 RefTypeParamDef <Ivl:0 V00> BB00 regmask=[ecx] fixed> | |
<RefPosition #3 @7 ->#19 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt]> | |
<RefPosition #19 @37 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] last> | |
----------------- | |
<RefPosition #8 @14 ->#15 RefTypeDef <Ivl:2 V02> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #15 @27 RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
----------------- | |
<RefPosition #18 @30 ->#20 RefTypeDef <Ivl:3 V03> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #20 @37 RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[allFloat] last> | |
----------------- | |
<RefPosition #6 @10 ->#7 RefTypeDef <Ivl:4 V04> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #7 @13 ->#11 RefTypeUse <Ivl:4 V04> LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #11 @23 RefTypeUse <Ivl:4 V04> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
----------------- | |
<RefPosition #1 @0 ->#9 RefTypeParamDef <Ivl:1 V01> BB00 regmask=[allFloat]> | |
<RefPosition #9 @21 RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[allFloat] last> | |
TUPLE STYLE DUMP WITH REF POSITIONS | |
Incoming Parameters: V00 V01 | |
BB01 [000..020) (return), preds={} succs={} | |
===== | |
N003. V00(L0) | |
N005. LEA(b+4) | |
N007. IND | |
Use:<L0>(#3) | |
Def:<I5>(#4) Pref:<L4> | |
N009. V04(L4) | |
Use:<I5>(#5) * | |
Def:<L4>(#6) | |
N011. V04(L4) | |
N013. V02(L2) | |
Use:<L4>(#7) | |
Def:<L2>(#8) | |
N015. V04(L4) | |
N017. V01(L1) | |
N019. CNS_DBL 100.00000000000000 REG NA | |
N021. DIV | |
Use:<L1>(#9) * | |
Def:<I6>(#10) Pref:<L1> | |
N023. MUL | |
Use:<L4>(#11) * | |
Use:<I6>(#12) * | |
Def:<I7>(#13) Pref:<L4> | |
N025. V02(L2) | |
N027. ADD | |
Use:<I7>(#14) * | |
Use:<L2>(#15) * | |
Def:<I8>(#16) Pref:<L3> | |
N029. V03(L3) | |
Use:<I8>(#17) * | |
Def:<L3>(#18) | |
N031. V00(L0) | |
N033. LEA(b+4) | |
N035. V03(L3) | |
N037. STOREIND | |
Use:<L0>(#19) * | |
Use:<L3>(#20) * | |
N039. IL_OFFSET IL offset: 0x1f REG NA | |
N041. RETURN | |
Linear scan intervals after buildIntervals: | |
Interval 0: (V00) RefPositions {#0@0 #3@7 #19@37} physReg:ecx Preferences=[ecx] | |
Interval 1: (V01) RefPositions {#1@0 #9@21} physReg:NA Preferences=[allFloat] | |
Interval 2: (V02) RefPositions {#8@14 #15@27} physReg:NA Preferences=[allFloat] | |
Interval 3: (V03) RefPositions {#18@30 #20@37} physReg:NA Preferences=[allFloat] | |
Interval 4: (V04) RefPositions {#6@10 #7@13 #11@23} physReg:NA Preferences=[allFloat] | |
Interval 5: RefPositions {#4@8 #5@9} physReg:NA Preferences=[allFloat] RelatedInterval <L4>[0326BE5C] | |
Interval 6: RefPositions {#10@22 #12@23} physReg:NA Preferences=[allFloat] RelatedInterval <L1>[0326BDC0] | |
Interval 7: RefPositions {#13@24 #14@27} physReg:NA Preferences=[allFloat] RelatedInterval <L4>[0326BE5C] | |
Interval 8: RefPositions {#16@28 #17@29} physReg:NA Preferences=[allFloat] RelatedInterval <L3>[0326BE28] | |
*************** In LinearScan::allocateRegisters() | |
Linear scan intervals before allocateRegisters: | |
Interval 0: (V00) RefPositions {#0@0 #3@7 #19@37} physReg:ecx Preferences=[ecx] | |
Interval 1: (V01) RefPositions {#1@0 #9@21} physReg:NA Preferences=[allFloat] | |
Interval 2: (V02) RefPositions {#8@14 #15@27} physReg:NA Preferences=[allFloat] | |
Interval 3: (V03) RefPositions {#18@30 #20@37} physReg:NA Preferences=[allFloat] | |
Interval 4: (V04) RefPositions {#6@10 #7@13 #11@23} physReg:NA Preferences=[allFloat] | |
Interval 5: RefPositions {#4@8 #5@9} physReg:NA Preferences=[allFloat] RelatedInterval <L4>[0326BE5C] | |
Interval 6: RefPositions {#10@22 #12@23} physReg:NA Preferences=[allFloat] RelatedInterval <L1>[0326BDC0] | |
Interval 7: RefPositions {#13@24 #14@27} physReg:NA Preferences=[allFloat] RelatedInterval <L4>[0326BE5C] | |
Interval 8: RefPositions {#16@28 #17@29} physReg:NA Preferences=[allFloat] RelatedInterval <L3>[0326BE28] | |
------------ | |
REFPOSITIONS BEFORE ALLOCATION: | |
------------ | |
<RefPosition #0 @0 ->#3 RefTypeParamDef <Ivl:0 V00> BB00 regmask=[ecx] fixed> | |
<RefPosition #1 @0 ->#9 RefTypeParamDef <Ivl:1 V01> BB00 regmask=[allFloat]> | |
<RefPosition #2 @1 RefTypeBB BB01 regmask=[]> | |
<RefPosition #3 @7 ->#19 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt]> | |
<RefPosition #4 @8 ->#5 RefTypeDef <Ivl:5> IND BB01 regmask=[allFloat]> | |
<RefPosition #5 @9 RefTypeUse <Ivl:5> BB01 regmask=[allFloat] last> | |
<RefPosition #6 @10 ->#7 RefTypeDef <Ivl:4 V04> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #7 @13 ->#11 RefTypeUse <Ivl:4 V04> LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #8 @14 ->#15 RefTypeDef <Ivl:2 V02> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #9 @21 RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[allFloat] last> | |
<RefPosition #10 @22 ->#12 RefTypeDef <Ivl:6> DIV BB01 regmask=[allFloat]> | |
<RefPosition #11 @23 RefTypeUse <Ivl:4 V04> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
<RefPosition #12 @23 RefTypeUse <Ivl:6> BB01 regmask=[allFloat] last> | |
<RefPosition #13 @24 ->#14 RefTypeDef <Ivl:7> MUL BB01 regmask=[allFloat]> | |
<RefPosition #14 @27 RefTypeUse <Ivl:7> BB01 regmask=[allFloat] last> | |
<RefPosition #15 @27 RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
<RefPosition #16 @28 ->#17 RefTypeDef <Ivl:8> ADD BB01 regmask=[allFloat]> | |
<RefPosition #17 @29 RefTypeUse <Ivl:8> BB01 regmask=[allFloat] last> | |
<RefPosition #18 @30 ->#20 RefTypeDef <Ivl:3 V03> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #19 @37 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] last> | |
<RefPosition #20 @37 RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[allFloat] last> | |
VAR REFPOSITIONS BEFORE ALLOCATION | |
--- V00 | |
<RefPosition #0 @0 ->#3 RefTypeParamDef <Ivl:0 V00> BB00 regmask=[ecx] fixed> | |
<RefPosition #3 @7 ->#19 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt]> | |
<RefPosition #19 @37 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] last> | |
--- V01 | |
<RefPosition #1 @0 ->#9 RefTypeParamDef <Ivl:1 V01> BB00 regmask=[allFloat]> | |
<RefPosition #9 @21 RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[allFloat] last> | |
--- V02 | |
<RefPosition #8 @14 ->#15 RefTypeDef <Ivl:2 V02> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #15 @27 RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
--- V03 | |
<RefPosition #18 @30 ->#20 RefTypeDef <Ivl:3 V03> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #20 @37 RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[allFloat] last> | |
--- V04 | |
<RefPosition #6 @10 ->#7 RefTypeDef <Ivl:4 V04> STORE_LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #7 @13 ->#11 RefTypeUse <Ivl:4 V04> LCL_VAR BB01 regmask=[allFloat]> | |
<RefPosition #11 @23 RefTypeUse <Ivl:4 V04> LCL_VAR BB01 regmask=[allFloat] last regOptional> | |
Allocating Registers | |
-------------------- | |
The following table has one or more rows for each RefPosition that is handled during allocation. | |
The first column provides the basic information about the RefPosition, with its type (e.g. Def, | |
Use, Fixd) followed by a '*' if it is a last use, and a 'D' if it is delayRegFree, and then the | |
action taken during allocation (e.g. Alloc a new register, or Keep an existing one). | |
The subsequent columns show the Interval occupying each register, if any, followed by 'a' if it is | |
active, and 'i'if it is inactive. Columns are only printed up to the last modifed register, which | |
may increase during allocation, in which case additional columns will appear. Registers which are | |
not marked modified have ---- in their column. | |
------------------------------+----+----+ | |
LocRP# Name Type Action Reg |eax |ecx | | |
------------------------------+----+----+ | |
|----|V0 a| | |
0.#0 V0 Parm Keep ecx |----|V0 a| | |
0.#1 V1 Parm Alloc mm0 |----|V0 a|----|----|----|----|----|----|V1 a| | |
1.#2 BB1 PredBB0 |----|V0 a|----|----|----|----|----|----|V1 a| | |
7.#3 V0 Use Keep ecx |----|V0 a|----|----|----|----|----|----|V1 a| | |
8.#4 I5 Def Alloc mm1 |----|V0 a|----|----|----|----|----|----|V1 a|I5 a| | |
9.#5 I5 Use * Keep mm1 |----|V0 a|----|----|----|----|----|----|V1 a|I5 a| | |
10.#6 V4 Def Alloc mm1 |----|V0 a|----|----|----|----|----|----|V1 a|V4 a| | |
13.#7 V4 Use Keep mm1 |----|V0 a|----|----|----|----|----|----|V1 a|V4 a| | |
14.#8 V2 Def Alloc mm2 |----|V0 a|----|----|----|----|----|----|V1 a|V4 a|V2 a| | |
21.#9 V1 Use * Keep mm0 |----|V0 a|----|----|----|----|----|----|V1 a|V4 a|V2 a| | |
22.#10 I6 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|I6 a|V4 a|V2 a| | |
23.#11 V4 Use * Keep mm1 |----|V0 a|----|----|----|----|----|----|I6 a|V4 a|V2 a| | |
23.#12 I6 Use * Keep mm0 |----|V0 a|----|----|----|----|----|----|I6 a|V4 a|V2 a| | |
24.#13 I7 Def Alloc mm1 |----|V0 a|----|----|----|----|----|----| |I7 a|V2 a| | |
27.#14 I7 Use * Keep mm1 |----|V0 a|----|----|----|----|----|----| |I7 a|V2 a| | |
27.#15 V2 Use * Keep mm2 |----|V0 a|----|----|----|----|----|----| |I7 a|V2 a| | |
28.#16 I8 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|I8 a| | | | |
29.#17 I8 Use * Keep mm0 |----|V0 a|----|----|----|----|----|----|I8 a| | | | |
30.#18 V3 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|V3 a| | | | |
37.#19 V0 Use * Keep ecx |----|V0 a|----|----|----|----|----|----|V3 a| | | | |
37.#20 V3 Use * Keep mm0 |----| |----|----|----|----|----|----| | | | | |
------------ | |
REFPOSITIONS AFTER ALLOCATION: | |
------------ | |
<RefPosition #0 @0 ->#3 RefTypeParamDef <Ivl:0 V00> BB00 regmask=[ecx] fixed> | |
<RefPosition #1 @0 ->#9 RefTypeParamDef <Ivl:1 V01> BB00 regmask=[mm0]> | |
<RefPosition #2 @1 RefTypeBB BB01 regmask=[]> | |
<RefPosition #3 @7 ->#19 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[ecx]> | |
<RefPosition #4 @8 ->#5 RefTypeDef <Ivl:5> IND BB01 regmask=[mm1]> | |
<RefPosition #5 @9 RefTypeUse <Ivl:5> BB01 regmask=[mm1] last> | |
<RefPosition #6 @10 ->#7 RefTypeDef <Ivl:4 V04> STORE_LCL_VAR BB01 regmask=[mm1]> | |
<RefPosition #7 @13 ->#11 RefTypeUse <Ivl:4 V04> LCL_VAR BB01 regmask=[mm1]> | |
<RefPosition #8 @14 ->#15 RefTypeDef <Ivl:2 V02> STORE_LCL_VAR BB01 regmask=[mm2]> | |
<RefPosition #9 @21 RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[mm0] last> | |
<RefPosition #10 @22 ->#12 RefTypeDef <Ivl:6> DIV BB01 regmask=[mm0]> | |
<RefPosition #11 @23 RefTypeUse <Ivl:4 V04> LCL_VAR BB01 regmask=[mm1] last regOptional> | |
<RefPosition #12 @23 RefTypeUse <Ivl:6> BB01 regmask=[mm0] last> | |
<RefPosition #13 @24 ->#14 RefTypeDef <Ivl:7> MUL BB01 regmask=[mm1]> | |
<RefPosition #14 @27 RefTypeUse <Ivl:7> BB01 regmask=[mm1] last> | |
<RefPosition #15 @27 RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[mm2] last regOptional> | |
<RefPosition #16 @28 ->#17 RefTypeDef <Ivl:8> ADD BB01 regmask=[mm0]> | |
<RefPosition #17 @29 RefTypeUse <Ivl:8> BB01 regmask=[mm0] last> | |
<RefPosition #18 @30 ->#20 RefTypeDef <Ivl:3 V03> STORE_LCL_VAR BB01 regmask=[mm0]> | |
<RefPosition #19 @37 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[ecx] last> | |
<RefPosition #20 @37 RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[mm0] last> | |
VAR REFPOSITIONS AFTER ALLOCATION | |
--- V00 | |
<RefPosition #0 @0 ->#3 RefTypeParamDef <Ivl:0 V00> BB00 regmask=[ecx] fixed> | |
<RefPosition #3 @7 ->#19 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[ecx]> | |
<RefPosition #19 @37 RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[ecx] last> | |
--- V01 | |
<RefPosition #1 @0 ->#9 RefTypeParamDef <Ivl:1 V01> BB00 regmask=[mm0]> | |
<RefPosition #9 @21 RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[mm0] last> | |
--- V02 | |
<RefPosition #8 @14 ->#15 RefTypeDef <Ivl:2 V02> STORE_LCL_VAR BB01 regmask=[mm2]> | |
<RefPosition #15 @27 RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[mm2] last regOptional> | |
--- V03 | |
<RefPosition #18 @30 ->#20 RefTypeDef <Ivl:3 V03> STORE_LCL_VAR BB01 regmask=[mm0]> | |
<RefPosition #20 @37 RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[mm0] last> | |
--- V04 | |
<RefPosition #6 @10 ->#7 RefTypeDef <Ivl:4 V04> STORE_LCL_VAR BB01 regmask=[mm1]> | |
<RefPosition #7 @13 ->#11 RefTypeUse <Ivl:4 V04> LCL_VAR BB01 regmask=[mm1]> | |
<RefPosition #11 @23 RefTypeUse <Ivl:4 V04> LCL_VAR BB01 regmask=[mm1] last regOptional> | |
Active intervals at end of allocation: | |
----------------------- | |
RESOLVING BB BOUNDARIES | |
----------------------- | |
Resolution Candidates: {V00 V01} | |
Has NoCritical Edges | |
Prior to Resolution | |
BB01 use def in out | |
{V00 V01} | |
{V02 V03 V04} | |
{V00 V01} | |
{} | |
Var=Reg beg of BB01: V00=ecx V01=mm0 | |
Var=Reg end of BB01: none | |
RESOLVING EDGES | |
Set V00 argument initial register to ecx | |
Set V01 argument initial register to mm0 | |
Trees after linear scan register allocator (LSRA) | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
------------ BB01 [000..020) (return), preds={} succs={} | |
N003 ( 1, 1) [000002] ------------ t2 = LCL_VAR ref V00 this u:2 ecx REG ecx $80 | |
/--* t2 ref | |
N005 (???,???) [000051] -c---------- t51 = * LEA(b+4) byref REG NA | |
/--* t51 byref | |
N007 ( 5, 4) [000025] ---XG------- t25 = * IND double REG mm1 <l:$181, c:$1c0> | |
/--* t25 double | |
N009 ( 9, 7) [000046] DA-XG------- * STORE_LCL_VAR double V04 cse0 mm1 REG mm1 | |
N011 ( 3, 2) [000047] ------------ t47 = LCL_VAR double V04 cse0 mm1 REG mm1 <l:$181, c:$1c0> | |
/--* t47 double | |
N013 ( 16, 12) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 mm2 REG mm2 | |
N015 ( 3, 2) [000049] ------------ t49 = LCL_VAR double V04 cse0 mm1 (last use) REG mm1 <l:$181, c:$1c0> | |
N017 ( 3, 2) [000014] ------------ t14 = LCL_VAR double V01 arg1 u:2 mm0 (last use) REG mm0 $c0 | |
N019 ( 3, 4) [000015] -c---------- t15 = CNS_DBL double 100.00000000000000 REG NA $200 | |
/--* t14 double | |
+--* t15 double | |
N021 ( 42, 10) [000016] ------------ t16 = * DIV double REG mm0 $182 | |
/--* t49 double | |
+--* t16 double | |
N023 ( 50, 16) [000017] ----G------- t17 = * MUL double REG mm1 <l:$184, c:$183> | |
N025 ( 3, 2) [000012] ------------ t12 = LCL_VAR double V02 tmp0 u:2 mm2 (last use) REG mm2 <l:$181, c:$1c0> | |
/--* t17 double | |
+--* t12 double | |
N027 ( 58, 22) [000018] ----G------- t18 = * ADD double REG mm0 <l:$186, c:$185> | |
/--* t18 double | |
N029 ( 62, 25) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 mm0 REG mm0 | |
N031 ( 1, 1) [000001] ------------ t1 = LCL_VAR ref V00 this u:2 ecx (last use) REG ecx $80 | |
/--* t1 ref | |
N033 (???,???) [000052] -c---------- t52 = * LEA(b+4) byref REG NA | |
N035 ( 3, 2) [000031] ------------ t31 = LCL_VAR double V03 tmp1 u:2 mm0 (last use) REG mm0 <l:$186, c:$185> | |
/--* t52 byref | |
+--* t31 double | |
N037 (???,???) [000050] -A--GO------ * STOREIND double REG NA | |
N039 ( 0, 0) [000023] ------------ IL_OFFSET void IL offset: 0x1f REG NA | |
N041 ( 0, 0) [000022] ------------ RETURN void REG NA $2c0 | |
------------------------------------------------------------------------------------------------------------------- | |
Final allocation | |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+ | |
LocRP# Name Type Action Reg |eax |ecx |edx |ebx |esp |ebp |esi |edi |mm0 |mm1 |mm2 | | |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+ | |
0.#0 V0 Parm Alloc ecx |----|V0 a|----|----|----|----|----|----| | | | | |
0.#1 V1 Parm Alloc mm0 |----|V0 a|----|----|----|----|----|----|V1 a| | | | |
1.#2 BB1 PredBB0 |----|V0 a|----|----|----|----|----|----|V1 a| | | | |
7.#3 V0 Use Keep ecx |----|V0 a|----|----|----|----|----|----|V1 a| | | | |
8.#4 I5 Def Alloc mm1 |----|V0 a|----|----|----|----|----|----|V1 a|I5 a| | | |
9.#5 I5 Use * Keep mm1 |----|V0 a|----|----|----|----|----|----|V1 a|I5 i| | | |
10.#6 V4 Def Alloc mm1 |----|V0 a|----|----|----|----|----|----|V1 a|V4 a| | | |
13.#7 V4 Use Keep mm1 |----|V0 a|----|----|----|----|----|----|V1 a|V4 a| | | |
14.#8 V2 Def Alloc mm2 |----|V0 a|----|----|----|----|----|----|V1 a|V4 a|V2 a| | |
21.#9 V1 Use * Keep mm0 |----|V0 a|----|----|----|----|----|----|V1 i|V4 a|V2 a| | |
22.#10 I6 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|I6 a|V4 a|V2 a| | |
23.#11 V4 Use * Keep mm1 |----|V0 a|----|----|----|----|----|----|I6 a|V4 i|V2 a| | |
23.#12 I6 Use * Keep mm0 |----|V0 a|----|----|----|----|----|----|I6 i| |V2 a| | |
24.#13 I7 Def Alloc mm1 |----|V0 a|----|----|----|----|----|----| |I7 a|V2 a| | |
27.#14 I7 Use * Keep mm1 |----|V0 a|----|----|----|----|----|----| |I7 i|V2 a| | |
27.#15 V2 Use * Keep mm2 |----|V0 a|----|----|----|----|----|----| | |V2 i| | |
28.#16 I8 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|I8 a| | | | |
29.#17 I8 Use * Keep mm0 |----|V0 a|----|----|----|----|----|----|I8 i| | | | |
30.#18 V3 Def Alloc mm0 |----|V0 a|----|----|----|----|----|----|V3 a| | | | |
37.#19 V0 Use * Keep ecx |----|V0 i|----|----|----|----|----|----|V3 a| | | | |
37.#20 V3 Use * Keep mm0 |----| |----|----|----|----|----|----|V3 i| | | | |
Recording the maximum number of concurrent spills: | |
---------- | |
LSRA Stats | |
---------- | |
Total Tracked Vars: 5 | |
Total Reg Cand Vars: 5 | |
Total number of Intervals: 8 | |
Total number of RefPositions: 20 | |
Total Spill Count: 0 Weighted: 0 | |
Total CopyReg Count: 0 Weighted: 0 | |
Total ResolutionMov Count: 0 Weighted: 0 | |
Total number of split edges: 0 | |
Total Number of spill temps created: 0 | |
TUPLE STYLE DUMP WITH REGISTER ASSIGNMENTS | |
Incoming Parameters: V00(ecx) V01(STK=>mm0) | |
BB01 [000..020) (return), preds={} succs={} | |
===== | |
N003. V00(ecx) | |
N005. LEA(b+4) | |
N007. mm1 = IND ; ecx | |
* N009. V04(mm1); mm1 | |
N011. V04(mm1) | |
* N013. V02(mm2); mm1 | |
N015. V04(mm1*) | |
N017. V01(mm0*) | |
N019. CNS_DBL 100.00000000000000 REG NA | |
N021. mm0 = DIV ; mm0* | |
N023. mm1 = MUL ; mm1*,mm0 | |
N025. V02(mm2*) | |
N027. mm0 = ADD ; mm1,mm2* | |
* N029. V03(mm0); mm0 | |
N031. V00(ecx*) | |
N033. LEA(b+4) | |
N035. V03(mm0*) | |
N037. STOREIND ; ecx*,mm0* | |
N039. IL_OFFSET IL offset: 0x1f REG NA | |
N041. RETURN | |
Var=Reg end of BB01: none | |
*************** In genGenerateCode() | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags] | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
BB01 [0000] 1 1 [000..020) (return) i label target LIR | |
-------------------------------------------------------------------------------------------------------------------------------------- | |
*************** In fgDebugCheckBBlist | |
; Assembly listing for method _1020.MethodAbove:RaiseValue(double):this | |
; Emitting BLENDED_CODE for generic X86 CPU | |
; optimized code | |
; ebp based frame | |
; partially interruptible | |
Finalizing stack frame | |
Recording Var Locations at start of BB01 | |
V00(ecx) V01(mm0) | |
Modified regs: [ecx mm0-mm2] | |
Callee-saved registers pushed: 0 [] | |
*************** In lvaAssignFrameOffsets(FINAL_FRAME_LAYOUT) | |
; Final local variable assignments | |
; | |
; V00 this [V00,T00] ( 6, 6 ) ref -> ecx this class-hnd | |
; V01 arg1 [V01,T04] ( 2, 2 ) double -> mm0 | |
; V02 tmp0 [V02,T01] ( 4, 8 ) double -> mm2 | |
; V03 tmp1 [V03,T02] ( 4, 8 ) double -> mm0 | |
; V04 cse0 [V04,T03] ( 6, 6 ) double -> mm1 | |
; | |
; Lcl frame size = 0 | |
=============== Generating BB01 [000..020) (return), preds={} succs={} flags=0x00000000.40030020: i label target LIR | |
BB01 IN (2)={V00 V01} + ByrefExposed + GcHeap | |
OUT(0)={ } | |
Recording Var Locations at start of BB01 | |
V00(ecx) V01(mm0) | |
Change life 00000000 {} -> 00000011 {V00 V01} | |
V00 in reg ecx is becoming live [------] | |
Live regs: 00000000 {} => 00000002 {ecx} | |
V01 in reg mm0 is becoming live [------] | |
Live regs: 00000002 {ecx} => 00000002 {ecx xmm0} | |
Live regs: (unchanged) 00000002 {ecx xmm0} | |
GC regs: (unchanged) 00000002 {ecx} | |
Byref regs: (unchanged) 00000000 {} | |
L_M53085_BB01: | |
Label: IG02, GCvars=00000000 {}, gcrefRegs=00000002 {ecx}, byrefRegs=00000000 {} | |
Setting stack level from -1 to 0 | |
Scope info: begin block BB01, IL range [000..020) | |
Scope info: open scopes = | |
0 (V00 this) [000..020) | |
1 (V01 arg1) [000..020) | |
Generating: N003 ( 1, 1) [000002] ------------ t2 = LCL_VAR ref V00 this u:2 ecx REG ecx $80 | |
/--* t2 ref | |
Generating: N005 (???,???) [000051] -c---------- t51 = * LEA(b+4) byref REG NA | |
/--* t51 byref | |
Generating: N007 ( 5, 4) [000025] ---XG------- t25 = * IND double REG mm1 <l:$181, c:$1c0> | |
IN0001: vmovsd xmm1, qword ptr [ecx+4] | |
/--* t25 double | |
Generating: N009 ( 9, 7) [000046] DA-XG------- * STORE_LCL_VAR double V04 cse0 mm1 REG mm1 | |
V04 in reg mm1 is becoming live [000046] | |
Live regs: 00000002 {ecx xmm0} => 00000002 {ecx xmm0 xmm1} | |
Live vars: {V00 V01} => {V00 V01 V04} | |
Generating: N011 ( 3, 2) [000047] ------------ t47 = LCL_VAR double V04 cse0 mm1 REG mm1 <l:$181, c:$1c0> | |
/--* t47 double | |
Generating: N013 ( 16, 12) [000010] DA-XG------- * STORE_LCL_VAR double V02 tmp0 d:2 mm2 REG mm2 | |
IN0002: vmovaps xmm2, xmm1 | |
V02 in reg mm2 is becoming live [000010] | |
Live regs: 00000002 {ecx xmm0 xmm1} => 00000002 {ecx xmm0 xmm1 xmm2} | |
Live vars: {V00 V01 V04} => {V00 V01 V02 V04} | |
Generating: N015 ( 3, 2) [000049] ------------ t49 = LCL_VAR double V04 cse0 mm1 (last use) REG mm1 <l:$181, c:$1c0> | |
Generating: N017 ( 3, 2) [000014] ------------ t14 = LCL_VAR double V01 arg1 u:2 mm0 (last use) REG mm0 $c0 | |
Generating: N019 ( 3, 4) [000015] -c---------- t15 = CNS_DBL double 100.00000000000000 REG NA $200 | |
/--* t14 double | |
+--* t15 double | |
Generating: N021 ( 42, 10) [000016] ------------ t16 = * DIV double REG mm0 $182 | |
V01 in reg mm0 is becoming dead [000014] | |
Live regs: 00000002 {ecx xmm0 xmm1 xmm2} => 00000002 {ecx xmm1 xmm2} | |
Live vars: {V00 V01 V02 V04} => {V00 V02 V04} | |
IN0003: vdivsd xmm0, qword ptr [@RWD00] | |
/--* t49 double | |
+--* t16 double | |
Generating: N023 ( 50, 16) [000017] ----G------- t17 = * MUL double REG mm1 <l:$184, c:$183> | |
V04 in reg mm1 is becoming dead [000049] | |
Live regs: 00000002 {ecx xmm1 xmm2} => 00000002 {ecx xmm2} | |
Live vars: {V00 V02 V04} => {V00 V02} | |
IN0004: vmulsd xmm1, xmm0 | |
Generating: N025 ( 3, 2) [000012] ------------ t12 = LCL_VAR double V02 tmp0 u:2 mm2 (last use) REG mm2 <l:$181, c:$1c0> | |
/--* t17 double | |
+--* t12 double | |
Generating: N027 ( 58, 22) [000018] ----G------- t18 = * ADD double REG mm0 <l:$186, c:$185> | |
V02 in reg mm2 is becoming dead [000012] | |
Live regs: 00000002 {ecx xmm2} => 00000002 {ecx} | |
Live vars: {V00 V02} => {V00} | |
IN0005: vmovaps xmm0, xmm1 | |
IN0006: vaddsd xmm0, xmm2 | |
/--* t18 double | |
Generating: N029 ( 62, 25) [000036] DA--G------- * STORE_LCL_VAR double V03 tmp1 d:2 mm0 REG mm0 | |
V03 in reg mm0 is becoming live [000036] | |
Live regs: 00000002 {ecx} => 00000002 {ecx xmm0} | |
Live vars: {V00} => {V00 V03} | |
Generating: N031 ( 1, 1) [000001] ------------ t1 = LCL_VAR ref V00 this u:2 ecx (last use) REG ecx $80 | |
/--* t1 ref | |
Generating: N033 (???,???) [000052] -c---------- t52 = * LEA(b+4) byref REG NA | |
Generating: N035 ( 3, 2) [000031] ------------ t31 = LCL_VAR double V03 tmp1 u:2 mm0 (last use) REG mm0 <l:$186, c:$185> | |
/--* t52 byref | |
+--* t31 double | |
Generating: N037 (???,???) [000050] -A--GO------ * STOREIND double REG NA | |
V00 in reg ecx is becoming dead [000001] | |
Live regs: 00000002 {ecx xmm0} => 00000000 {xmm0} | |
Live vars: {V00 V03} => {V03} | |
GC regs: 00000002 {ecx} => 00000000 {} | |
V03 in reg mm0 is becoming dead [000031] | |
Live regs: 00000000 {xmm0} => 00000000 {} | |
Live vars: {V03} => {} | |
IN0007: vmovsd qword ptr [ecx+4], xmm0 | |
Added IP mapping: 0x001F STACK_EMPTY (G_M53085_IG02,ins#7,ofs#41) label | |
Generating: N039 ( 0, 0) [000023] ------------ IL_OFFSET void IL offset: 0x1f REG NA | |
Generating: N041 ( 0, 0) [000022] ------------ RETURN void REG NA $2c0 | |
Scope info: end block BB01, IL range [000..020) | |
Scope info: ending scope, LVnum=1 [000..020) | |
Scope info: ending scope, LVnum=0 [000..020) | |
Scope info: open scopes = | |
<none> | |
Added IP mapping: EPILOG STACK_EMPTY (G_M53085_IG02,ins#7,ofs#41) label | |
Reserving epilog IG for block BB01 | |
G_M53085_IG02: ; offs=000000H, funclet=00 | |
*************** After placeholder IG creation | |
G_M53085_IG01: ; func=00, offs=000000H, size=0000H, gcrefRegs=00000000 {} <-- Prolog IG | |
G_M53085_IG02: ; offs=000000H, size=0029H, gcrefRegs=00000002 {ecx}, byrefRegs=00000000 {}, byref | |
G_M53085_IG03: ; epilog placeholder, next placeholder=<END>, BB01 [0000], epilog, emitadd <-- First placeholder <-- Last placeholder | |
; PrevGCVars=00000000 {}, PrevGCrefRegs=00000000 {}, PrevByrefRegs=00000000 {} | |
; InitGCVars=00000000 {}, InitGCrefRegs=00000002 {ecx}, InitByrefRegs=00000000 {} | |
Liveness not changing: 00000000 {} | |
# compCycleEstimate = 87, compSizeEstimate = 44 _1020.MethodAbove:RaiseValue(double):this | |
; Final local variable assignments | |
; | |
; V00 this [V00,T00] ( 6, 6 ) ref -> ecx this class-hnd | |
; V01 arg1 [V01,T04] ( 2, 2 ) double -> mm0 | |
; V02 tmp0 [V02,T01] ( 4, 8 ) double -> mm2 | |
; V03 tmp1 [V03,T02] ( 4, 8 ) double -> mm0 | |
; V04 cse0 [V04,T03] ( 6, 6 ) double -> mm1 | |
; | |
; Lcl frame size = 0 | |
*************** Before prolog / epilog generation | |
G_M53085_IG01: ; func=00, offs=000000H, size=0000H, gcrefRegs=00000000 {} <-- Prolog IG | |
G_M53085_IG02: ; offs=000000H, size=0029H, gcrefRegs=00000002 {ecx}, byrefRegs=00000000 {}, byref | |
G_M53085_IG03: ; epilog placeholder, next placeholder=<END>, BB01 [0000], epilog, emitadd <-- First placeholder <-- Last placeholder | |
; PrevGCVars=00000000 {}, PrevGCrefRegs=00000000 {}, PrevByrefRegs=00000000 {} | |
; InitGCVars=00000000 {}, InitGCrefRegs=00000002 {ecx}, InitByrefRegs=00000000 {} | |
Recording Var Locations at start of BB01 | |
V00(ecx) V01(mm0) | |
*************** In genFnProlog() | |
Added IP mapping to front: PROLOG STACK_EMPTY (G_M53085_IG01,ins#0,ofs#0) label | |
__prolog: | |
IN0008: push ebp | |
IN0009: mov ebp, esp | |
IN000a: vzeroupper | |
*************** In genFnPrologCalleeRegArgs() for int regs | |
*************** In genEnregisterIncomingStackArgs() | |
IN000b: vmovsd xmm0, qword ptr [V01 ebp+08H] | |
G_M53085_IG01: ; offs=000000H, funclet=00 | |
*************** In genFnEpilog() | |
__epilog: | |
gcVarPtrSetCur=00000000 {}, gcRegGCrefSetCur=00000002 {ecx}, gcRegByrefSetCur=00000000 {} | |
IN000c: pop ebp | |
IN000d: ret 8 | |
G_M53085_IG03: ; offs=000029H, funclet=00 | |
0 prologs, 1 epilogs | |
*************** After prolog / epilog generation | |
G_M53085_IG01: ; func=00, offs=000000H, size=000CH, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG | |
G_M53085_IG02: ; offs=00000CH, size=0029H, gcrefRegs=00000002 {ecx}, byrefRegs=00000000 {}, byref | |
G_M53085_IG03: ; offs=000035H, size=0004H, epilog, nogc, emitadd | |
*************** In emitJumpDistBind() | |
Hot code size = 0x39 bytes | |
Cold code size = 0x0 bytes | |
*************** In emitEndCodeGen() | |
Converting emitMaxStackDepth from bytes (0) to elements (0) | |
*************************************************************************** | |
Instructions as they come out of the scheduler | |
G_M53085_IG01: ; func=00, offs=000000H, size=000CH, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG | |
IN0008: 000000 55 push ebp | |
IN0009: 000001 8BEC mov ebp, esp | |
IN000a: 000003 C5F877 vzeroupper | |
IN000b: 000006 C4E17B104508 vmovsd xmm0, qword ptr [ebp+08H] | |
G_M53085_IG02: ; func=00, offs=00000CH, size=0029H, gcrefRegs=00000002 {ecx}, byrefRegs=00000000 {}, byref | |
New gcrReg live regs=00000002 {ecx} | |
IN0001: 00000C C4E17B104904 vmovsd xmm1, qword ptr [ecx+4] | |
IN0002: 000012 C4E17828D1 vmovaps xmm2, xmm1 | |
IN0003: 000017 C4E17B5E05B00DFB04 vdivsd xmm0, qword ptr [@RWD00] | |
IN0004: 000020 C4E17359C8 vmulsd xmm1, xmm0 | |
IN0005: 000025 C4E17828C1 vmovaps xmm0, xmm1 | |
IN0006: 00002A C4E17B58C2 vaddsd xmm0, xmm2 | |
IN0007: 00002F C4E17B114104 vmovsd qword ptr [ecx+4], xmm0 | |
G_M53085_IG03: ; func=00, offs=000035H, size=0004H, epilog, nogc, emitadd | |
IN000c: 000035 5D pop ebp | |
IN000d: 000036 C20800 ret 8 | |
Emitting data sections: 8 total bytes | |
section 0, size 8, raw data | |
00 00 00 00 00 00 59 40 | |
New gcrReg live regs=00000000 {} | |
Allocated method code size = 57 , actual size = 57 | |
; Total bytes of code 57, prolog size 6 for method _1020.MethodAbove:RaiseValue(double):this | |
; ============================================================ | |
*************** After end code gen, before unwindEmit() | |
G_M53085_IG01: ; func=00, offs=000000H, size=000CH, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG | |
IN0008: 000000 push ebp | |
IN0009: 000001 mov ebp, esp | |
IN000a: 000003 vzeroupper | |
IN000b: 000006 vmovsd xmm0, qword ptr [V01 ebp+08H] | |
G_M53085_IG02: ; offs=00000CH, size=0029H, gcrefRegs=00000002 {ecx}, byrefRegs=00000000 {}, byref | |
IN0001: 00000C vmovsd xmm1, qword ptr [ecx+4] | |
IN0002: 000012 vmovaps xmm2, xmm1 | |
IN0003: 000017 vdivsd xmm0, qword ptr [@RWD00] | |
IN0004: 000020 vmulsd xmm1, xmm0 | |
IN0005: 000025 vmovaps xmm0, xmm1 | |
IN0006: 00002A vaddsd xmm0, xmm2 | |
IN0007: 00002F vmovsd qword ptr [ecx+4], xmm0 | |
G_M53085_IG03: ; offs=000035H, size=0004H, epilog, nogc, emitadd | |
IN000c: 000035 pop ebp | |
IN000d: 000036 ret 8 | |
*************** In genIPmappingGen() | |
IP mapping count : 3 | |
IL offs PROLOG : 0x00000000 ( STACK_EMPTY ) | |
IL offs 0x001F : 0x00000035 ( STACK_EMPTY ) | |
IL offs EPILOG : 0x00000035 ( STACK_EMPTY ) | |
*************** In genSetScopeInfo() | |
VarLocInfo count is 4 | |
*************** Variable debug info | |
4 vars | |
1( UNKNOWN) : From 00000000h to 0000000Ch, in esp[4] (1 slot) | |
0( UNKNOWN) : From 00000000h to 0000000Ch, in ecx | |
1( UNKNOWN) : From 0000000Ch to 00000017h, in ST(L-8) | |
0( UNKNOWN) : From 0000000Ch to 0000002Fh, in ecx | |
*************** In gcInfoBlockHdrSave() | |
GCINFO: untrckVars = 0 | |
GCINFO: trackdLcls = 0 | |
*************** In gcInfoBlockHdrSave() | |
GCINFO: methodSize = 0039 | |
GCINFO: prologSize = 0006 | |
GCINFO: epilogSize = 0004 | |
GC Info for method _1020.MethodAbove:RaiseValue(double):this | |
GC info size = 6 | |
Method info block: | |
method size = 0039 | |
prolog size = 6 | |
epilog size = 4 | |
epilog count = 1 | |
epilog end = yes | |
callee-saved regs = EBP | |
ebp frame = yes | |
fully interruptible= no | |
double align = no | |
arguments size = 2 DWORDs | |
stack frame size = 0 DWORDs | |
untracked count = 0 | |
var ptr tab count = 0 | |
epilog at 0035 | |
39 D2 8A 80 46 | | |
Pointer table: | |
FF | | |
Method code size: 57 | |
Allocations for _1020.MethodAbove:RaiseValue(double):this (MethodHash=a9a18473) | |
count: 534, size: 39533, max = 3172 | |
allocateMemory: 65536, nraUsed: 61640 | |
Alloc'd bytes by kind: | |
kind | size | pct | |
---------------------+------------+-------- | |
AssertionProp | 5412 | 13.69% | |
ASTNode | 5064 | 12.81% | |
InstDesc | 1692 | 4.28% | |
ImpStack | 0 | 0.00% | |
BasicBlock | 188 | 0.48% | |
fgArgInfo | 0 | 0.00% | |
fgArgInfoPtrArr | 0 | 0.00% | |
FlowList | 0 | 0.00% | |
TreeStatementList | 32 | 0.08% | |
SiScope | 168 | 0.42% | |
FlatFPStateX87 | 0 | 0.00% | |
DominatorMemory | 32 | 0.08% | |
LSRA | 1552 | 3.93% | |
LSRA_Interval | 468 | 1.18% | |
LSRA_RefPosition | 924 | 2.34% | |
Reachability | 8 | 0.02% | |
SSA | 392 | 0.99% | |
ValueNumber | 9970 | 25.22% | |
LvaTable | 1572 | 3.98% | |
UnwindInfo | 0 | 0.00% | |
hashBv | 20 | 0.05% | |
bitset | 344 | 0.87% | |
FixedBitVect | 0 | 0.00% | |
AsIAllocator | 884 | 2.24% | |
IndirAssignMap | 40 | 0.10% | |
FieldSeqStore | 108 | 0.27% | |
ZeroOffsetFieldMap | 40 | 0.10% | |
ArrayInfoMap | 40 | 0.10% | |
MemoryPhiArg | 0 | 0.00% | |
CSE | 728 | 1.84% | |
GC | 12 | 0.03% | |
CorSig | 156 | 0.39% | |
Inlining | 1220 | 3.09% | |
ArrayStack | 0 | 0.00% | |
DebugInfo | 116 | 0.29% | |
DebugOnly | 8110 | 20.51% | |
Codegen | 0 | 0.00% | |
LoopOpt | 0 | 0.00% | |
LoopHoist | 0 | 0.00% | |
Unknown | 241 | 0.61% | |
****** DONE compiling _1020.MethodAbove:RaiseValue(double):this | |
fin |
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