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Created May 8, 2026 10:40
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AMD Ryzen 9 7950X3D 16-Core Processor
Thank you @Joromonni
@cyring

cyring commented May 8, 2026

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Processor                                [AMD Ryzen 9 7950X3D 16-Core Processor]
|- Architecture                                                   [Zen4/Raphael]
|- Vendor ID                                                      [AuthenticAMD]
|- Microcode                                                        [0x0a60120a]
|- Signature                                                           [  AF_61]
|- Stepping                                                            [      2]
|- Online CPU                                                          [ 32/ 32]
|- Base Clock                                                          [ 99.812]
|- Frequency            (MHz)                      Ratio
                 Min   2994.35                    <  30 >
                 Max   4192.10                    <  42 >
|- Factory                                                             [100.000]
                       4200                       [  42 ]
|- Performance
                 TGT   4192.10                    <  42 >
   |- CPPC
                 Min   3693.04                    <  37 >
                 Max   2694.92                    <  27 >
                 TGT      AUTO                    <   0 >
   |- Boost                                                            [ UNLOCK]
                 XFR   5789.09                    [  58 ]
                 CPB   5689.27                    [  57 ]
   |- P-State
                 P1    2994.35                    <  30 >
|- Uncore                                                              [   LOCK]
                 CLK   1497.18                    [  15 ]
                 MEM   2994.35                    [  30 ]

Instruction Set Extensions
|- 3DNow!/Ext [N/N]          ADX [Y]          AES [Y]  AVX/AVX2 [Y/Y]
|- AVX512-F     [Y]    AVX512-DQ [Y]  AVX512-IFMA [Y]   AVX512-PF [N]
|- AVX512-ER    [N]    AVX512-CD [Y]    AVX512-BW [Y]   AVX512-VL [Y]
|- AVX512-VBMI  [Y] AVX512-VBMI2 [Y]  AVX512-VNNI [Y]  AVX512-ALG [Y]
|- AVX512-VPOP  [Y] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N]
|- AVX512-BF16  [Y] AVX-VNNI-VEX [N]    AVX-FP128 [N]   AVX-FP256 [Y]
|- BMI1/BMI2  [Y/Y]         CLWB [Y]      CLFLUSH [Y] CLFLUSH-OPT [Y]
|- CLAC-STAC    [Y]         CMOV [Y]    CMPXCHG8B [Y]  CMPXCHG16B [Y]
|- F16C         [Y]          FPU [Y]         FXSR [Y]   LAHF-SAHF [Y]
|- MMX/Ext    [Y/Y] MON/MWAITX [Y/Y]        MOVBE [Y]   PCLMULQDQ [Y]
|- POPCNT       [Y]       RDRAND [Y]       RDSEED [Y]      RDTSCP [Y]
|- SEP          [Y]          SHA [Y]          SSE [Y]        SSE2 [Y]
|- SSE3         [Y]        SSSE3 [Y]  SSE4.1/4A [Y/Y]      SSE4.2 [Y]
|- SERIALIZE    [N]      SYSCALL [Y]        RDPID [Y]        UMIP [Y]
|- VAES         [Y]   VPCLMULQDQ [Y]   PREFETCH/W [Y]       LZCNT [Y]

Features
|- 1 GB Pages Support                                      1GB-PAGES   [Capable]
|- 100 MHz multiplier Control                            100MHzSteps   [Missing]
|- Advanced Configuration & Power Interface                     ACPI   [Capable]
|- Advanced Programmable Interrupt Controller                   APIC   [Capable]
|- Advanced Virtual Interrupt Controller                        AVIC   [Capable]
|- APIC Timer Invariance                                        ARAT   [Capable]
|- LOCK prefix to read CR8                                    AltMov   [Capable]
|- Clear Zero Instruction                                     CLZERO   [Capable]
|- Core Multi-Processing                                  CMP Legacy   [Capable]
|- L1 Data Cache Context ID                                  CNXT-ID   [Missing]
|- Collaborative Processor Performance Control                  CPPC   [Capable]
|- Direct Cache Access                                           DCA   [Missing]
|- Debugging Extension                                            DE   [Capable]
|- Debug Store & Precise Event Based Sampling               DS, PEBS   [Missing]
|- CPL Qualified Debug Store                                  DS-CPL   [Missing]
|- 64-Bit Debug Store                                         DTES64   [Missing]
|- Fast Short REP CMPSB|SCASB                                   FSRC   [Capable]
|- Fast Short REP MOVSB                                         FSRM   [Capable]
|- Fast Short REP STOSB                                         FSRS   [Capable]
|- Fast-String Operation                                        ERMS   [Capable]
|- Fused Multiply Add                                           FMA4   [Missing]
|- Fused Multiply Add                                            FMA   [Capable]
|- Hardware Lock Elision                                         HLE   [Missing]
|- Hyper-Threading Technology                                    HTT   [Capable]
|- Hardware P-state control                                      HwP   [Capable]
|- Instruction Based Sampling                                    IBS   [Capable]
|- Instruction INVLPGB                                       INVLPGB   [Missing]
|- Instruction INVPCID                                       INVPCID   [Capable]
|- Long Mode 64 bits                                       IA64 | LM   [Capable]
|- LightWeight Profiling                                         LWP   [Missing]
|- Memory Bandwidth Enforcement                                  MBE   [Capable]
|- Machine-Check Architecture                                    MCA   [Capable]
|- Instruction MCOMMIT                                       MCOMMIT   [Missing]
|- Model Specific Registers                                      MSR   [Capable]
|- Memory Type Range Registers                                  MTRR   [Capable]
|- No-Execute Page Protection                                     NX   [Capable]
|- OS-Enabled Ext. State Management                          OSXSAVE   [Capable]
|- OS Visible Work-around                                       OSVW   [Capable]
|- Physical Address Extension                                    PAE   [Capable]
|- Page Attribute Table                                          PAT   [Capable]
|- Pending Break Enable                                          PBE   [Missing]
|- Process Context Identifiers                                  PCID   [Missing]
|- Perfmon and Debug Capability                                 PDCM   [Missing]
|- Page Global Enable                                            PGE   [Capable]
|- Page Size Extension                                           PSE   [Capable]
|- 36-bit Page Size Extension                                  PSE36   [Capable]
|- Processor Serial Number                                       PSN   [Missing]
|- PREFETCHIT0/1 Instructions                              PREFETCHI   [Missing]
|- Resource Director Technology/PQE                      RDT-A | PQE   [Capable]
|- Resource Director Technology/PQM                      RDT-M | PQM   [Capable]
|- Read Processor Register at User level                       RDPRU   [Capable]
|- Restricted Transactional Memory                               RTM   [Missing]
|- Safer Mode Extensions                                         SMX   [Missing]
|- Self-Snoop                                                     SS   [Missing]
|- Supervisor-Mode Access Prevention                            SMAP   [Capable]
|- Supervisor-Mode Execution Prevention                         SMEP   [Capable]
|- Trailing Bit Manipulation                                     TBM   [Missing]
|- Translation Cache Extension                                   TCE   [Capable]
|- Time Stamp Counter                                            TSC [Invariant]
|- Time Stamp Counter Deadline                          TSC-DEADLINE   [Missing]
|- TSX Force Abort MSR Register                            TSX-ABORT   [Missing]
|- TSX Suspend Load Address Tracking                       TSX-LDTRK   [Missing]
|- User-Mode Instruction Prevention                             UMIP   [Capable]
|- Virtual Mode Extension                                        VME   [Capable]
|- Virtual Machine Extensions                                    VMX   [Missing]
|- Write Back & Do Not Invalidate Cache                     WBNOINVD   [Capable]
|- Extended xAPIC Support                                     x2APIC   [  xAPIC]
|- AVIC controller for x2APIC                                 x2AVIC   [Capable]
|- XSAVE/XSTOR States                                          XSAVE   [Capable]
|- xTPR Update Control                                          xTPR   [Missing]
|- Extended Operation Support                                    XOP   [Missing]
Mitigation mechanisms
|- Indirect Branch Restricted Speculation                       IBRS   [Capable]
   |- IBRS Always-On preferred by processor                            [ Unable]
   |- IBRS preferred over software solution                            [Capable]
   |- IBRS provides same speculation limits                            [Capable]
|- Indirect Branch Prediction Barrier                           IBPB   [Capable]
|- Selective Branch Predictor Barrier                           SBPB   [ Unable]
|- Single Thread Indirect Branch Predictor                     STIBP   [ Enable]
|- Speculative Store Bypass Disable                             SSBD   [Capable]
   |- SSBD use VIRT_SPEC_CTRL register                                 [ Unable]
   |- SSBD not needed on this processor                                [ Unable]
|- No Speculative Return Stack Overflow                      SRSO_NO   [ Unable]
   |- No SRSO at the User-Kernel boundary                              [ Unable]
|- No Branch Type Confusion                                   BTC_NO   [Capable]
|- BTC on Non-Branch instruction                            BTC-NOBR   [ Unable]
|- Limited Early Redirect Window                            AGENPICK   [ Unable]
|- Arch - No Fast Predictive Store Forwarding                   PSFD   [Capable]
|- Arch - Enhanced Predictive Store Forwarding                  EPSF   [Capable]
|- Arch - Cross Processor Information Leak                XPROC_LEAK   [ Unable]
Security Features
|- CET Shadow Stack features                                  CET-SS   [Capable]
|- Secure Init and Jump with Attestation                      SKINIT   [Capable]
|- Secure Encrypted Virtualization                               SEV   [Missing]
|- SEV - Encrypted State                                      SEV-ES   [Missing]
|- SEV - Secure Nested Paging                                SEV-SNP   [Missing]
|- Guest Mode Execute Trap                                      GMET   [Capable]
|- Supervisor Shadow Stack                                       SSS   [Capable]
|- VM Permission Levels                                         VMPL   [Missing]
|- VMPL Supervisor Shadow Stack                             VMPL-SSS   [Missing]
|- Secure Memory Encryption                                      SME   [Capable]
|- Transparent SME                                              TSME   [ Enable]
|- Secure Multi-Key Memory Encryption                         SME-MK   [Missing]
|- DRAM Data Scrambling                                    Scrambler   [ Enable]

Technologies
|- Instruction Cache Unit
   |- L1 IP Prefetcher                                          L1 HW IP   < ON>
|- Data Cache Unit
   |- L1 Prefetcher                                                L1 HW   < ON>
|- Cache Prefetchers
   |- L2 Prefetcher                                                L2 HW   < ON>
   |- L1 Stride Prefetcher                                     L1 Stride   < ON>
   |- L1 Region Prefetcher                                     L1 Region   < ON>
   |- L1 Burst Prefetch Mode                                    L1 Burst   < ON>
   |- L2 Stream HW Prefetcher                                  L2 Stream   < ON>
   |- L2 Up/Down Prefetcher                                   L2 Up/Down   < ON>
|- System Management Mode                                       SMM-Lock   [ ON]
|- Simultaneous Multithreading                                       SMT   [ ON]
|- PowerNow!                                                         CnQ   [ ON]
|- Core C-States                                                     CCx   [ ON]
|- Core Performance Boost                                            CPB   < ON>
|- Watchdog Timer                                                    WDT   < ON>
|- Virtualization                                                    SVM   [ ON]
   |- I/O MMU                                                      AMD-V   [ ON]
   |- Version                                                     [         0.1]
   |- Hypervisor                                                           [OFF]
   |- Vendor ID                                                   [         N/A]

Performance Monitoring
|- Version                                                        PM       [  2]
|- Counters:          General                   Fixed
|           {  6,  6, 16 } x 48 bits            3 x 64 bits
|- Enhanced Halt State                                           C1E       <OFF>
|- C2 UnDemotion                                                 C2U       < ON>
|- C3 UnDemotion                                                 C3U       < ON>
|- Core C6 State                                                 CC6       < ON>
|- Package C6 State                                              PC6       < ON>
|- Legacy Frequency ID control                                   FID       [OFF]
|- Legacy Voltage ID control                                     VID       [OFF]
|- P-State Hardware Coordination Feedback                MPERF/APERF       [ ON]
|- Core C-States
   |- C-States Base Address                                      BAR   [ 0x413 ]
|- ACPI Processor C-States                                      _CST   [      3]
|- MONITOR/MWAIT
   |- State index:    #0    #1    #2    #3    #4    #5    #6    #7
   |- Sub C-State:     1     1     0     0     0     0     0     0
   |- Monitor-Mwait Extensions                                   EMX   [Capable]
   |- Interrupt Break-Event                                      IBE   [Capable]
|- Core Cycles                                                         [Capable]
|- Instructions Retired                                                [Capable]
|- Reference Cycles                                                    [Capable]
|- Last Level Cache References                                         [Capable]
|- TSC for Performance Profiling                                       [Missing]
|- Data Fabric Performance Counter                                     [Capable]
|- Core Performance Counter                                            [Capable]
|- Processor Performance Control                                _PCT   [ Enable]
|- Performance Supported States                                 _PSS   [      2]
|- Performance Present Capabilities                             _PPC   [      0]
|- Continuous Performance Control                               _CPC   [Missing]

Power, Current & Thermal
|- Temperature Offset:Junction                                 TjMax [ 49: 89 C]
|- CPPC Energy Preference                                        EPP   <      0>
|- Digital Thermal Sensor                                        DTS   [Capable]
|- Power Limit Notification                                      PLN   [Missing]
|- Package Thermal Management                                    PTM   [Capable]
|- Thermal Monitor 1                                             TTP   [ Enable]
|- Thermal Monitor 2                                             HTC   [ Enable]
|- Thermal Design Power                                          TDP   [Missing]
   |- Minimum Power                                              Min   [Missing]
   |- Maximum Power                                              Max   [Missing]
|- Thermal Design Power                                      Package   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Thermal Design Power                                         Core   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                       Uncore   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                         DRAM   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                     Platform   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Package Power Tracking                                        PPT   [Missing]
|- Electrical Design Current                                     EDC   [Missing]
|- Thermal Design Current                                        TDC   [Missing]
|- Core Thermal Point
|- Package Thermal Point
   |- Thermal Monitor Trip                                     Limit   [  115 C]
   |- HTC Temperature Limit                                    Limit   [  127 C]
   |- HTC Temperature Hysteresis                           Threshold   [    2 C]
|- Units
   |- Power                                               watt   [      Missing]
   |- Energy                                             joule   [  0.000015259]
   |- Window                                            second   [  0.000976562]

CPU Pkg  Apic  Core/Thread  Caches      (w)rite-Back (i)nclusive
 #   ID   ID CCD CCX ID/ID L1-Inst Way  L1-Data Way      L2  Way      L3  Way
000:BSP    0   0  0   0  0      32  8        32  8      1024  8 i  196608 16w
001:  0    2   0  0   1  0      32  8        32  8      1024  8 i  196608 16w
002:  0    4   0  0   2  0      32  8        32  8      1024  8 i  196608 16w
003:  0    6   0  0   3  0      32  8        32  8      1024  8 i  196608 16w
004:  0    8   0  0   4  0      32  8        32  8      1024  8 i  196608 16w
005:  0   10   0  0   5  0      32  8        32  8      1024  8 i  196608 16w
006:  0   12   0  0   6  0      32  8        32  8      1024  8 i  196608 16w
007:  0   14   0  0   7  0      32  8        32  8      1024  8 i  196608 16w
008:  0   16   1  1   8  0      32  8        32  8      1024  8 i   65536 16w
009:  0   18   1  1   9  0      32  8        32  8      1024  8 i   65536 16w
010:  0   20   1  1  10  0      32  8        32  8      1024  8 i   65536 16w
011:  0   22   1  1  11  0      32  8        32  8      1024  8 i   65536 16w
012:  0   24   1  1  12  0      32  8        32  8      1024  8 i   65536 16w
013:  0   26   1  1  13  0      32  8        32  8      1024  8 i   65536 16w
014:  0   28   1  1  14  0      32  8        32  8      1024  8 i   65536 16w
015:  0   30   1  1  15  0      32  8        32  8      1024  8 i   65536 16w
016:  0    1   0  0   0  1      32  8        32  8      1024  8 i  196608 16w
017:  0    3   0  0   1  1      32  8        32  8      1024  8 i  196608 16w
018:  0    5   0  0   2  1      32  8        32  8      1024  8 i  196608 16w
019:  0    7   0  0   3  1      32  8        32  8      1024  8 i  196608 16w
020:  0    9   0  0   4  1      32  8        32  8      1024  8 i  196608 16w
021:  0   11   0  0   5  1      32  8        32  8      1024  8 i  196608 16w
022:  0   13   0  0   6  1      32  8        32  8      1024  8 i  196608 16w
023:  0   15   0  0   7  1      32  8        32  8      1024  8 i  196608 16w
024:  0   17   1  1   8  1      32  8        32  8      1024  8 i   65536 16w
025:  0   19   1  1   9  1      32  8        32  8      1024  8 i   65536 16w
026:  0   21   1  1  10  1      32  8        32  8      1024  8 i   65536 16w
027:  0   23   1  1  11  1      32  8        32  8      1024  8 i   65536 16w
028:  0   25   1  1  12  1      32  8        32  8      1024  8 i   65536 16w
029:  0   27   1  1  13  1      32  8        32  8      1024  8 i   65536 16w
030:  0   29   1  1  14  1      32  8        32  8      1024  8 i   65536 16w
031:  0   31   1  1  15  1      32  8        32  8      1024  8 i   65536 16w

CPU     IPS            IPC            CPI
000     0.002938/s     0.320869/c     3.116539/i
001     0.000078/s     0.198194/c     5.045566/i
002     0.000649/s     0.105241/c     9.501992/i
003     0.000077/s     0.179841/c     5.560474/i
004     0.000052/s     0.194234/c     5.148427/i
005     0.000142/s     0.301535/c     3.316360/i
006     0.000083/s     0.166874/c     5.992559/i
007     0.000038/s     0.159881/c     6.254654/i
008     0.049914/s     0.875188/c     1.142612/i
009     1.625886/s     2.815448/c     0.355183/i
010     0.040870/s     0.651523/c     1.534865/i
011     0.024536/s     0.578628/c     1.728226/i
012     0.068617/s     3.188748/c     0.313603/i
013     0.086752/s     1.432746/c     0.697961/i
014     0.000040/s     0.174536/c     5.729470/i
015     0.000467/s     1.250221/c     0.799858/i
016     0.000053/s     0.192528/c     5.194044/i
017     0.001061/s     0.172584/c     5.794272/i
018     0.000258/s     0.175786/c     5.688722/i
019     0.000296/s     0.389018/c     2.570578/i
020     0.000052/s     0.185491/c     5.391096/i
021     0.000038/s     0.197405/c     5.065717/i
022     0.000247/s     0.154305/c     6.480679/i
023     0.000140/s     0.230844/c     4.331925/i
024     0.148511/s     1.990876/c     0.502291/i
025     0.922999/s     2.926340/c     0.341724/i
026     0.004498/s     0.873239/c     1.145162/i
027     0.000039/s     0.203087/c     4.923993/i
028     0.004312/s     0.974351/c     1.026324/i
029     0.000038/s     0.197945/c     5.051911/i
030     0.000067/s     0.235112/c     4.253293/i
031     0.000053/s     0.220612/c     4.532837/i


CPU Freq(MHz) Ratio  Turbo  C0(%)  C1(%)  C3(%)  C6(%)  C7(%)  Min TMP:TS  Max
000  107.15 ( 1.07)   2.56   2.26  97.74   0.00   0.00   0.00  32 / 38:697/ 55
001    1.84 ( 0.02)   0.04   0.04  99.96   0.00   0.00   0.00  32 / 38:697/ 55
002   77.38 ( 0.78)   1.85   1.59  98.41   0.00   0.00   0.00  32 / 38:697/ 55
003    1.96 ( 0.02)   0.05   0.05  99.95   0.00   0.00   0.00  32 / 38:697/ 55
004    1.05 ( 0.01)   0.02   0.02  99.98   0.00   0.00   0.00  32 / 38:697/ 55
005    1.18 ( 0.01)   0.03   0.03  99.97   0.00   0.00   0.00  32 / 38:697/ 55
006    3.42 ( 0.03)   0.08   0.08  99.92   0.00   0.00   0.00  32 / 38:697/ 55
007   16.45 ( 0.16)   0.39   0.33  99.67   0.00   0.00   0.00  32 / 38:697/ 55
008  195.41 ( 1.96)   4.66   3.93  96.07   0.00   0.00   0.00  27 / 52:811/ 62
009 5287.40 (52.97) 126.13  95.81   4.19   0.00   0.00   0.00  27 / 52:811/ 62
010   99.84 ( 1.00)   2.38   2.12  97.88   0.00   0.00   0.00  27 / 52:811/ 62
011   88.53 ( 0.89)   2.11   1.79  98.21   0.00   0.00   0.00  27 / 52:811/ 62
012   74.68 ( 0.75)   1.78   1.70  98.30   0.00   0.00   0.00  27 / 52:811/ 62
013   50.54 ( 0.51)   1.21   1.04  98.96   0.00   0.00   0.00  27 / 52:811/ 62
014    1.11 ( 0.01)   0.03   0.03  99.97   0.00   0.00   0.00  27 / 52:811/ 62
015    1.74 ( 0.02)   0.04   0.05  99.95   0.00   0.00   0.00  27 / 52:811/ 62
016   23.23 ( 0.23)   0.55   0.50  99.50   0.00   0.00   0.00  32 / 38:697/ 55
017   22.94 ( 0.23)   0.55   0.56  99.44   0.00   0.00   0.00  32 / 38:697/ 55
018   38.06 ( 0.38)   0.91   0.85  99.15   0.00   0.00   0.00  32 / 38:697/ 55
019    0.84 ( 0.01)   0.02   0.02  99.98   0.00   0.00   0.00  32 / 38:697/ 55
020    1.06 ( 0.01)   0.03   0.03  99.97   0.00   0.00   0.00  32 / 38:697/ 55
021    0.81 ( 0.01)   0.02   0.02  99.98   0.00   0.00   0.00  32 / 38:697/ 55
022   42.29 ( 0.42)   1.01   1.04  98.96   0.00   0.00   0.00  32 / 38:697/ 55
023    1.06 ( 0.01)   0.03   0.03  99.98   0.00   0.00   0.00  32 / 38:697/ 55
024  205.73 ( 2.06)   4.91   4.34  95.66   0.00   0.00   0.00  27 / 52:811/ 62
025    4.79 ( 0.05)   0.11   0.09  99.91   0.00   0.00   0.00  27 / 52:811/ 62
026   54.72 ( 0.55)   1.31   1.23  98.77   0.00   0.00   0.00  27 / 52:811/ 62
027    1.13 ( 0.01)   0.03   0.03  99.97   0.00   0.00   0.00  27 / 52:811/ 61
028    5.81 ( 0.06)   0.14   0.13  99.87   0.00   0.00   0.00  27 / 52:811/ 61
029    9.26 ( 0.09)   0.22   0.23  99.77   0.00   0.00   0.00  27 / 52:811/ 61
030    1.56 ( 0.02)   0.04   0.04  99.96   0.00   0.00   0.00  27 / 52:811/ 61
031    1.22 ( 0.01)   0.03   0.03  99.97   0.00   0.00   0.00  27 / 52:811/ 61

    Averages:        Turbo  C0(%)  C1(%)  C3(%)  C6(%)  C7(%)    TjMax:    Pkg:
                      4.79   3.75  96.25   0.00   0.00   0.00      89 C    52 C


                Cycles          State(%)
PC02                     0         0.00
PC03                     0         0.00
PC04                     0         0.00
PC06                     0         0.00
PC07                     0         0.00
PC08                     0         0.00
PC09                     0         0.00
PC10                     0         0.00
MC6                      0         0.00
PTSC            4192068510
UNCORE                   0


CPU Freq(MHz) VID  Vcore  TMP(C)    Accumulator       Energy(J)     Power(W)
000  542.82   230  1.4375   39  000000000000082703    1.261947632   1.261947632
001  331.49   230  1.4375   39  000000000000087013    1.327713013   1.327713013
002  574.70   230  1.4375   39  000000000000085302    1.301605225   1.301605225
003  824.01   230  1.4375   39  000000000000092740    1.415100098   1.415100098
004  291.56   230  1.4375   39  000000000000066607    1.016342163   1.016342163
005  110.68   230  1.4375   39  000000000000060984    0.930541992   0.930541992
006   93.56   230  1.4375   39  000000000000039444    0.601867676   0.601867676
007   89.99   230  1.4375   39  000000000000037064    0.565551758   0.565551758
008   31.65   230  1.4375   57  000000000000139546    2.129302979   2.129302979
009 1320.50   230  1.4375   57  000000000000575180    8.776550293   8.776550293
010  330.99   230  1.4375   57  000000000000143805    2.194290161   2.194290161
011  116.49   230  1.4375   57  000000000000064488    0.984008789   0.984008789
012  126.95   230  1.4375   57  000000000000065123    0.993698120   0.993698120
013    3.33   230  1.4375   57  000000000000030437    0.464431763   0.464431763
014  453.79   230  1.4375   57  000000000000133383    2.035263062   2.035263062
015  395.60   230  1.4375   57  000000000000124914    1.906036377   1.906036377
016   32.70   230  1.4375   39  000000000000000000    0.000000000   0.000000000
017  292.86   230  1.4375   39  000000000000000000    0.000000000   0.000000000
018   56.48   230  1.4375   39  000000000000000000    0.000000000   0.000000000
019   42.52   230  1.4375   39  000000000000000000    0.000000000   0.000000000
020   49.14   230  1.4375   39  000000000000000000    0.000000000   0.000000000
021  159.75   230  1.4375   39  000000000000000000    0.000000000   0.000000000
022   17.82   230  1.4375   39  000000000000000000    0.000000000   0.000000000
023   42.54   230  1.4375   39  000000000000000000    0.000000000   0.000000000
024 2616.45   230  1.4375   57  000000000000000000    0.000000000   0.000000000
025 3996.74   230  1.4375   57  000000000000000000    0.000000000   0.000000000
026  160.55   230  1.4375   57  000000000000000000    0.000000000   0.000000000
027   99.88   230  1.4375   57  000000000000000000    0.000000000   0.000000000
028  129.12   230  1.4375   57  000000000000000000    0.000000000   0.000000000
029   72.06   230  1.4375   57  000000000000000000    0.000000000   0.000000000
030   14.99   230  1.4375   57  000000000000000000    0.000000000   0.000000000
031    4.35   230  1.4375   57  000000000000000000    0.000000000   0.000000000

             Package[0]    Cores         Uncore        Memory        Platform
Energy(J):  49.016403198  27.904251099   0.000000000   0.000000000   0.000000000
Power(W) :  49.016403198  27.904251099   0.000000000   0.000000000   0.000000000


                              Zen UMC  [14E0]
Controller #0                                                Dual Channel
 Bus Rate  3000 MHz       Bus Speed 2994 MHz           DDR5 Speed 5988 MT/s

 Cha   CL  RCDr RCDw  RP  RAS   RC  RRDs RRDl FAW  WTRs WTRl  WR  clRR clWW
  #0   30   38   38   38   96   96    8   15   28    5   28   60    4    4
  #1   30   38   38   38   96   96    8   15   28    5   28   60    4    4
      CWL  RTP RdWr WrRd scWW sdWW ddWW scRR sdRR ddRR drRR drWW drWR drRRD
  #0   28   23   20    8    1    9    9    1    9    9    0    0    0    0
  #1   28   23   21    8    1    9    9    1    9    9    0    0    0    0
      REFI RFC1 RFC2 RFCsb RCPB RPPB BGS:Alt  Ban  Page  CKE  CMD  GDM  ECC
  #0 46800  312  192  345   0    0    ON OFF  R0W0   0    0   1T    ON   0
  #1 46800  312  192  345   0    0    ON OFF  R0W0   0    0   1T    ON   0
      MRD:PDA   MOD:PDA  WRMPR STAG PDM RDDATA WRD  WRL  RDL  XS   XP CPDED
  #0   42  32    42  32    24    7 0:F:1   18   6   16   36  614   23   15
  #1   42  32    42  32    24    7 0:F:1   18   6   16   36  614   23   15

 DIMM Geometry for channel #0
      Slot Bank Rank     Rows   Columns    Memory Size (MB)
       #0
       #1    16    2     65536      1024          16384    F5-6000J3038F16G
 DIMM Geometry for channel #1
      Slot Bank Rank     Rows   Columns    Memory Size (MB)
       #0
       #1    16    2     65536      1024          16384    F5-6000J3038F16G

@cyring

cyring commented May 8, 2026

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