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deseven/corefreq-cli.txt

Created July 9, 2025 17:28
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AMD RYZEN AI MAX+ 395 corefreq-cli output
Raw
corefreq-cli.txt
Processor [AMD RYZEN AI MAX+ 395 w/ Radeon 8060S]
|- Architecture [Zen5/Strix Halo]
|- Vendor ID [AuthenticAMD]
|- Microcode [0x0b700032]
|- Signature [ BF_70]
|- Stepping [ 0]
|- Online CPU [ 32/ 32]
|- Base Clock [100.002]
|- Frequency (MHz) Ratio
Min 1800.04 < 18 >
Max 3000.07 < 30 >
|- Factory [100.000]
3000 [ 30 ]
|- Performance
TGT 3000.07 < 30 >
|- Boost [ LOCK]
XFR 6400.16 [ 64 ]
CPB 6300.16 [ 63 ]
|- P-State
P1 2400.06 < 24 >
P2 1800.04 < 18 >
|- Uncore [ LOCK]
Instruction Set Extensions
|- 3DNow!/Ext [N/N] ADX [Y] AES [Y] AVX/AVX2 [Y/Y]
|- AVX512-F [Y] AVX512-DQ [Y] AVX512-IFMA [Y] AVX512-PF [N]
|- AVX512-ER [N] AVX512-CD [Y] AVX512-BW [Y] AVX512-VL [Y]
|- AVX512-VBMI [Y] AVX512-VBMI2 [Y] AVX512-VNNI [Y] AVX512-ALG [Y]
|- AVX512-VPOP [Y] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [Y]
|- AVX512-BF16 [Y] AVX-VNNI-VEX [Y] AVX-FP128 [N] AVX-FP256 [N]
|- BMI1/BMI2 [Y/Y] CLWB [Y] CLFLUSH [Y] CLFLUSH-OPT [Y]
|- CLAC-STAC [Y] CMOV [Y] CMPXCHG8B [Y] CMPXCHG16B [Y]
|- F16C [Y] FPU [Y] FXSR [Y] LAHF-SAHF [Y]
|- MMX/Ext [Y/Y] MON/MWAITX [Y/Y] MOVBE [Y] PCLMULQDQ [Y]
|- POPCNT [Y] RDRAND [Y] RDSEED [Y] RDTSCP [Y]
|- SEP [Y] SHA [Y] SSE [Y] SSE2 [Y]
|- SSE3 [Y] SSSE3 [Y] SSE4.1/4A [Y/Y] SSE4.2 [Y]
|- SERIALIZE [N] SYSCALL [Y] RDPID [Y] UMIP [Y]
|- VAES [Y] VPCLMULQDQ [Y] PREFETCH/W [Y] LZCNT [Y]
Features
|- 1 GB Pages Support 1GB-PAGES [Capable]
|- 100 MHz multiplier Control 100MHzSteps [Missing]
|- Advanced Configuration & Power Interface ACPI [Capable]
|- Advanced Programmable Interrupt Controller APIC [Capable]
|- Advanced Virtual Interrupt Controller AVIC [Capable]
|- APIC Timer Invariance ARAT [Capable]
|- LOCK prefix to read CR8 AltMov [Capable]
|- Clear Zero Instruction CLZERO [Capable]
|- Core Multi-Processing CMP Legacy [Capable]
|- L1 Data Cache Context ID CNXT-ID [Missing]
|- Collaborative Processor Performance Control CPPC [Capable]
|- Direct Cache Access DCA [Missing]
|- Debugging Extension DE [Capable]
|- Debug Store & Precise Event Based Sampling DS, PEBS [Missing]
|- CPL Qualified Debug Store DS-CPL [Missing]
|- 64-Bit Debug Store DTES64 [Missing]
|- Fast Short REP CMPSB|SCASB FSRC [Capable]
|- Fast Short REP MOVSB FSRM [Capable]
|- Fast Short REP STOSB FSRS [Capable]
|- Fast-String Operation ERMS [Capable]
|- Fused Multiply Add FMA4 [Missing]
|- Fused Multiply Add FMA [Capable]
|- Hardware Lock Elision HLE [Missing]
|- Hyper-Threading Technology HTT [Capable]
|- Hardware P-state control HwP [Capable]
|- Instruction Based Sampling IBS [Capable]
|- Instruction INVLPGB INVLPGB [Missing]
|- Instruction INVPCID INVPCID [Capable]
|- Long Mode 64 bits IA64 | LM [Capable]
|- LightWeight Profiling LWP [Missing]
|- Memory Bandwidth Enforcement MBE [Capable]
|- Machine-Check Architecture MCA [Capable]
|- Instruction MCOMMIT MCOMMIT [Missing]
|- Model Specific Registers MSR [Capable]
|- Memory Type Range Registers MTRR [Capable]
|- No-Execute Page Protection NX [Capable]
|- OS-Enabled Ext. State Management OSXSAVE [Capable]
|- OS Visible Work-around OSVW [Capable]
|- Physical Address Extension PAE [Capable]
|- Page Attribute Table PAT [Capable]
|- Pending Break Enable PBE [Missing]
|- Process Context Identifiers PCID [Missing]
|- Perfmon and Debug Capability PDCM [Missing]
|- Page Global Enable PGE [Capable]
|- Page Size Extension PSE [Capable]
|- 36-bit Page Size Extension PSE36 [Capable]
|- Processor Serial Number PSN [Missing]
|- PREFETCHIT0/1 Instructions PREFETCHI [Capable]
|- Resource Director Technology/PQE RDT-A [Capable]
|- Resource Director Technology/PQM RDT-M [Capable]
|- Read Processor Register at User level RDPRU [Capable]
|- Restricted Transactional Memory RTM [Missing]
|- Safer Mode Extensions SMX [Missing]
|- Self-Snoop SS [Missing]
|- Supervisor-Mode Access Prevention SMAP [Capable]
|- Supervisor-Mode Execution Prevention SMEP [Capable]
|- Trailing Bit Manipulation TBM [Missing]
|- Translation Cache Extension TCE [Capable]
|- Time Stamp Counter TSC [Invariant]
|- Time Stamp Counter Deadline TSC-DEADLINE [Missing]
|- TSX Force Abort MSR Register TSX-ABORT [Missing]
|- TSX Suspend Load Address Tracking TSX-LDTRK [Missing]
|- User-Mode Instruction Prevention UMIP [Capable]
|- Virtual Mode Extension VME [Capable]
|- Virtual Machine Extensions VMX [Missing]
|- Write Back & Do Not Invalidate Cache WBNOINVD [Capable]
|- Extended xAPIC Support x2APIC [ xAPIC]
|- AVIC controller for x2APIC x2AVIC [Capable]
|- XSAVE/XSTOR States XSAVE [Capable]
|- xTPR Update Control xTPR [Missing]
|- Extended Operation Support XOP [Missing]
Mitigation mechanisms
|- Indirect Branch Restricted Speculation IBRS [Capable]
|- IBRS Always-On preferred by processor [ Unable]
|- IBRS preferred over software solution [Capable]
|- IBRS provides same speculation limits [Capable]
|- Indirect Branch Prediction Barrier IBPB [Capable]
|- Selective Branch Predictor Barrier SBPB [Capable]
|- Single Thread Indirect Branch Predictor STIBP [ Enable]
|- Speculative Store Bypass Disable SSBD [Capable]
|- SSBD use VIRT_SPEC_CTRL register [ Unable]
|- SSBD not needed on this processor [ Unable]
|- No Speculative Return Stack Overflow SRSO_NO [ Unable]
|- No SRSO at the User-Kernel boundary [Capable]
|- No Branch Type Confusion BTC_NO [Capable]
|- BTC on Non-Branch instruction BTC-NOBR [ Unable]
|- Limited Early Redirect Window AGENPICK [ Unable]
|- Arch - No Fast Predictive Store Forwarding PSFD [Capable]
|- Arch - Enhanced Predictive Store Forwarding EPSF [Capable]
|- Arch - Cross Processor Information Leak XPROC_LEAK [ Unable]
Security Features
|- CET Shadow Stack features CET-SS [Capable]
|- Secure Init and Jump with Attestation SKINIT [Capable]
|- Secure Encrypted Virtualization SEV [Missing]
|- SEV - Encrypted State SEV-ES [Missing]
|- SEV - Secure Nested Paging SEV-SNP [Missing]
|- Guest Mode Execute Trap GMET [Capable]
|- Supervisor Shadow Stack SSS [Capable]
|- VM Permission Levels VMPL [Missing]
|- VMPL Supervisor Shadow Stack VMPL-SSS [Missing]
|- Secure Memory Encryption SME [Capable]
|- Transparent SME TSME [ Unable]
|- Secure Multi-Key Memory Encryption SME-MK [Missing]
|- DRAM Data Scrambling Scrambler [ Unable]
Technologies
|- Instruction Cache Unit
|- L1 IP Prefetcher L1 HW IP < ON>
|- Data Cache Unit
|- L1 Prefetcher L1 HW < ON>
|- Cache Prefetchers
|- L2 Prefetcher L2 HW < ON>
|- L1 Stride Prefetcher L1 Stride < ON>
|- L1 Region Prefetcher L1 Region < ON>
|- L1 Burst Prefetch Mode L1 Burst < ON>
|- L2 Stream HW Prefetcher L2 Stream < ON>
|- L2 Up/Down Prefetcher L2 Up/Down < ON>
|- System Management Mode SMM-Lock [ ON]
|- Simultaneous Multithreading SMT [ ON]
|- PowerNow! CnQ [ ON]
|- Core C-States CCx [ ON]
|- Core Performance Boost CPB < ON>
|- Watchdog Timer WDT < ON>
|- Virtualization SVM [ ON]
|- I/O MMU AMD-V [ ON]
|- Version [ 0.1]
|- Hypervisor [OFF]
|- Vendor ID [ N/A]
Performance Monitoring
|- Version PM [ 2]
|- Counters: General Fixed
| { 6, 6, 8 } x 48 bits 3 x 64 bits
|- Enhanced Halt State C1E <OFF>
|- C2 UnDemotion C2U < ON>
|- C3 UnDemotion C3U < ON>
|- Core C6 State CC6 < ON>
|- Package C6 State PC6 < ON>
|- Legacy Frequency ID control FID [OFF]
|- Legacy Voltage ID control VID [OFF]
|- P-State Hardware Coordination Feedback MPERF/APERF [ ON]
|- Core C-States
|- C-States Base Address BAR [ 0x413 ]
|- ACPI Processor C-States _CST [ 3]
|- MONITOR/MWAIT
|- State index: #0 #1 #2 #3 #4 #5 #6 #7
|- Sub C-State: 1 1 1 1 1 1 0 0
|- Monitor-Mwait Extensions EMX [Capable]
|- Interrupt Break-Event IBE [Capable]
|- Core Cycles [Capable]
|- Instructions Retired [Capable]
|- Reference Cycles [Capable]
|- Last Level Cache References [Capable]
|- TSC for Performance Profiling [Missing]
|- Data Fabric Performance Counter [Capable]
|- Core Performance Counter [Capable]
|- Processor Performance Control _PCT [ Enable]
|- Performance Supported States _PSS [ 3]
|- Performance Present Capabilities _PPC [ 0]
|- Continuous Performance Control _CPC [Missing]
Power, Current & Thermal
|- Temperature Offset:Junction TjMax [ 49:127 C]
|- CPPC Energy Preference EPP [Capable]
|- Digital Thermal Sensor DTS [Capable]
|- Power Limit Notification PLN [Missing]
|- Package Thermal Management PTM [Missing]
|- Thermal Monitor 1 TTP [ Enable]
|- Thermal Monitor 2 HTC [ Enable]
|- Thermal Design Power TDP [ 511 W]
|- Minimum Power Min [ 511 W]
|- Maximum Power Max [ 511 W]
|- Thermal Design Power Package [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Power Limit PL2 [ 0 W]
|- Time Window TW2 [ 0 ns]
|- Thermal Design Power Core [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Thermal Design Power Uncore [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Thermal Design Power DRAM [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Thermal Design Power Platform [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Power Limit PL2 [ 0 W]
|- Time Window TW2 [ 0 ns]
|- Package Power Tracking PPT [ 511 W]
|- Electrical Design Current EDC [ 508 A]
|- Thermal Design Current TDC [ 511 A]
|- Core Thermal Point
|- Package Thermal Point
|- Thermal Monitor Trip Limit [ 125 C]
|- HTC Temperature Limit Limit [ 127 C]
|- HTC Temperature Hysteresis Threshold [ 2 C]
|- Units
|- Power watt [ Missing]
|- Energy joule [ 0.000015259]
|- Window second [ 0.000976562]
Linux:
|- Release [6.8.12-11-pve]
|- Version [#1 SMP PREEMPT_DYNAMIC PMX 6.8.12-11 (2025-05-22T09:39Z)]
|- Machine [x86_64]
Memory:
|- Total RAM 65470008 KB
|- Shared RAM 19340 KB
|- Free RAM 13866076 KB
|- Buffer RAM 4569840 KB
|- Total High 0 KB
|- Free High 0 KB
Clock Source < corefreq_tsc>
CPU-Freq driver [ corefreqk-perf]
Governor [ corefreq-policy]
CPU-Idle driver [ corefreqk-idle]
|- Idle Limit < C6>
|- State POLL C1 C2 C3 C4 C5 C6
|- CPUIDLE ZEN-C1 ZEN-C2 ZEN-C3 ZEN-C4 ZEN-C5 ZEN-C6
|- Power -1 0 0 0 0 0 0
|- Latency 0 1 20 40 60 80 100
|- Residency 0 2 40 80 120 160 200
CPU Pkg Apic Core/Thread Caches (w)rite-Back (i)nclusive
# ID ID ID ID L1-Inst Way L1-Data Way L2 Way L3 Way
000:BSP 0 0 0 32 8 48 12 1024 16 i 65536 16w
001: 0 2 1 0 32 8 48 12 1024 16 i 65536 16w
002: 0 4 2 0 32 8 48 12 1024 16 i 65536 16w
003: 0 6 3 0 32 8 48 12 1024 16 i 65536 16w
004: 0 8 4 0 32 8 48 12 1024 16 i 65536 16w
005: 0 10 5 0 32 8 48 12 1024 16 i 65536 16w
006: 0 12 6 0 32 8 48 12 1024 16 i 65536 16w
007: 0 14 7 0 32 8 48 12 1024 16 i 65536 16w
008: 0 16 8 0 32 8 48 12 1024 16 i 65536 16w
009: 0 18 9 0 32 8 48 12 1024 16 i 65536 16w
010: 0 20 10 0 32 8 48 12 1024 16 i 65536 16w
011: 0 22 11 0 32 8 48 12 1024 16 i 65536 16w
012: 0 24 12 0 32 8 48 12 1024 16 i 65536 16w
013: 0 26 13 0 32 8 48 12 1024 16 i 65536 16w
014: 0 28 14 0 32 8 48 12 1024 16 i 65536 16w
015: 0 30 15 0 32 8 48 12 1024 16 i 65536 16w
016: 0 1 0 1 32 8 48 12 1024 16 i 65536 16w
017: 0 3 1 1 32 8 48 12 1024 16 i 65536 16w
018: 0 5 2 1 32 8 48 12 1024 16 i 65536 16w
019: 0 7 3 1 32 8 48 12 1024 16 i 65536 16w
020: 0 9 4 1 32 8 48 12 1024 16 i 65536 16w
021: 0 11 5 1 32 8 48 12 1024 16 i 65536 16w
022: 0 13 6 1 32 8 48 12 1024 16 i 65536 16w
023: 0 15 7 1 32 8 48 12 1024 16 i 65536 16w
024: 0 17 8 1 32 8 48 12 1024 16 i 65536 16w
025: 0 19 9 1 32 8 48 12 1024 16 i 65536 16w
026: 0 21 10 1 32 8 48 12 1024 16 i 65536 16w
027: 0 23 11 1 32 8 48 12 1024 16 i 65536 16w
028: 0 25 12 1 32 8 48 12 1024 16 i 65536 16w
029: 0 27 13 1 32 8 48 12 1024 16 i 65536 16w
030: 0 29 14 1 32 8 48 12 1024 16 i 65536 16w
031: 0 31 15 1 32 8 48 12 1024 16 i 65536 16w
AuthenticAMD [ 0]
CPU Freq(MHz) VID Vcore TMP(C) Accumulator Energy(J) Power(W)
000 55.73 93 0.5813 38 000000000000004310 0.065765381 0.065765381
001 39.13 93 0.5813 38 000000000000000497 0.007583618 0.007583618
002 43.66 93 0.5813 38 000000000000002117 0.032302856 0.032302856
003 139.31 93 0.5813 38 000000000000003808 0.058105469 0.058105469
004 49.32 93 0.5813 38 000000000000001998 0.030487061 0.030487061
005 55.05 93 0.5813 38 000000000000001704 0.026000977 0.026000977
006 78.69 93 0.5813 38 000000000000001681 0.025650024 0.025650024
007 50.58 93 0.5813 38 000000000000001931 0.029464722 0.029464722
008 84.57 92 0.5750 38 000000000000004427 0.067550659 0.067550659
009 54.54 92 0.5750 38 000000000000002757 0.042068481 0.042068481
010 28.87 92 0.5750 38 000000000000001091 0.016647339 0.016647339
011 48.77 92 0.5750 38 000000000000001802 0.027496338 0.027496338
012 56.87 92 0.5750 38 000000000000001838 0.028045654 0.028045654
013 10.58 100 0.6250 38 000000000000001685 0.025711060 0.025711060
014 39.57 92 0.5750 38 000000000000007343 0.112045288 0.112045288
015 36.13 92 0.5750 38 000000000000003700 0.056457520 0.056457520
016 61.49 93 0.5813 38 000000000000000000 0.000000000 0.000000000
017 29.99 93 0.5813 38 000000000000000000 0.000000000 0.000000000
018 48.94 93 0.5813 38 000000000000000000 0.000000000 0.000000000
019 47.15 93 0.5813 38 000000000000000000 0.000000000 0.000000000
020 58.68 93 0.5813 38 000000000000000000 0.000000000 0.000000000
021 47.42 93 0.5813 38 000000000000000000 0.000000000 0.000000000
022 48.15 93 0.5813 38 000000000000000000 0.000000000 0.000000000
023 29.04 93 0.5813 38 000000000000000000 0.000000000 0.000000000
024 56.01 92 0.5750 38 000000000000000000 0.000000000 0.000000000
025 68.52 92 0.5750 38 000000000000000000 0.000000000 0.000000000
026 39.63 92 0.5750 38 000000000000000000 0.000000000 0.000000000
027 46.99 92 0.5750 38 000000000000000000 0.000000000 0.000000000
028 43.90 92 0.5750 38 000000000000000000 0.000000000 0.000000000
029 48.04 92 0.5750 38 000000000000000000 0.000000000 0.000000000
030 60.51 100 0.6250 38 000000000000000000 0.000000000 0.000000000
031 35.41 92 0.5750 38 000000000000000000 0.000000000 0.000000000
Package[0] Cores Uncore Memory Platform
Energy(J): 9.873046875 0.649841309 0.000000000 0.000000000 0.000000000
Power(W) : 9.873046875 0.649841309 0.000000000 0.000000000 0.000000000
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