Checks that there are no occurrences of always @*
. Use always_comb
instead. See [Style: combinational-logic].
Enabled by default: true
Checks that there are no occurrences of non-blocking assignment in combinational logic.
Enabled by default: true
Checks that there are no occurrences of blocking assignment in sequential logic.
Enabled by default: true
Checks that a default case-item is always defined. See [Style: case-statements].
Enabled by default: false
Checks that the 'name' argument of type_id::create()
matches the name of the variable to which it is assigned. See [Verification-Style: naming].
Enabled by default: true
Checks that a Verilog `endif
directive is followed by a comment that matches the name of the opening `ifdef
or `ifndef
. See [Style: endif-comment].
Enabled by default: false
Checks that enum
names use lower_snake_case naming convention and end with '_t' or '_e'. See [Style: enumerations].
Enabled by default: false
Checks that every function declared outside of a class is declared with an explicit lifetime (static or automatic). See [Style: function-task-explicit-lifetime].
Enabled by default: true
Checks that every function and task parameter is declared with an explicit storage type. See [Style: function-task-argument-types].
Enabled by default: true
Checks that every parameter
and localparam
is declared with an explicit storage type. See [Style: constants].
Enabled by default: true
Checks that every task declared outside of a class is declared with an explicit lifetime (static or automatic). See [Style: function-task-explicit-lifetime].
Enabled by default: true
Do not use defparam. See:[Style: defparam].
Enabled by default: true
Checks that no forbidden macro calls are used. See [Verification-Style: logging].
Enabled by default: true
Checks that every generate block statement is labeled. See [Style: generate-statements].
Enabled by default: true
Checks that no forbidden system tasks or functions are used. These consist of the following functions: $psprintf
, $random
, and $dist_*
. Also non-LRM function $srandom
. See [Verification-Style: forbidden-system-functions].
Enabled by default: true
Checks that all lines do not exceed the maximum allowed length, currently set to 100 characters. See [Style: line-length].
Enabled by default: true
Checks that every macro name follows ALL_CAPS naming convention. See [Style: defines].
Enabled by default: true
Checks that there are no begin-end blocks declared at the module level. See [Style: floating-begin-end-blocks].
Enabled by default: true
If a module is declared, checks that at least one module matches the first dot-delimited component of the file name. See [Style: file-names].
Enabled by default: true
Checks that module instantiations with more than one parameter are passed in as named parameters, rather than positional parameters. See [Style: module-instantiation].
Enabled by default: true
Checks that module instantiations with more than one port are passed in as named ports, rather than positional ports. See [Style: module-instantiation].
Enabled by default: true
Checks that no tabs are used. Spaces should be used instead of tabs. See [Style: tabs].
Enabled by default: true
Checks that there are no trailing spaces on any lines. See [Style: trailing-spaces].
Enabled by default: true
Checks that the package name matches the filename. See [Style: file-names].
Enabled by default: true
Checks that packed dimension ranges are declare in little-endian (decreasing) order, e.g. [N-1:0]
. See [Style: packed-ordering].
Enabled by default: true
Checks that parameter names follow UpperCamelCase or ALL_CAPS naming convention and that localparam names follow UpperCamelCase naming convention. See [Style: constants].
Enabled by default: true
Checks that plusargs are always assigned a value, by ensuring that plusargs are never accessed using the $test$plusargs
system task. See [Style: plusarg-value-assignment].
Enabled by default: true
Checks that the file ends with a newline. See [Style: posix-file-endings].
Enabled by default: true
Checks that every parameter
declaration is inside a package or in the formal parameter list of modules/classes and every localparam
declaration is inside a module or class. See [Style: constants].
Enabled by default: false
Checks that signal names use lower_snake_case naming convention. Signals are defined as "a net, variable, or port within a SystemVerilog design". See [Style: signal-conventions].
Enabled by default: false
Checks that struct
and union
names use lower_snake_case naming convention and end with '_t'. See [Style: struct-union-conventions].
Enabled by default: false
Checks that a Verilog enum
declaration is named using typedef
. See [Style: typedef-enums].
Enabled by default: true
Checks that a Verilog struct
or union
declaration is named using typedef
. See [Style: typedef-structs-unions].
Enabled by default: true
Checks that the digits of binary literals match their declared width. See [Style: number-literals].
Enabled by default: true
Checks that unpacked dimension ranges are declared in big-endian order, [0:N-1]
and when an unpacked dimension range is zero-based, [0:N-1]
, the size is declared as [N]
instead. See [Style: unpacked-ordering].
Enabled by default: true
Checks that there are no generate-begin blocks inside a generate region. See [Style: generate-constructs].
Enabled by default: true
Checks that void casts do not contain certain function/method calls. See [Verification-Style: void-casts].
Enabled by default: true