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Created September 11, 2026 08:09
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FreeBSD on M4 MAX Studio
# dmesg
---<<BOOT>>---
GDB: debug ports: uart
GDB: current port: uart
KDB: debugger backends: ddb gdb
KDB: current backend: ddb
WARNING: Cannot find freebsd,dts-version property, cannot check DTB compliance
Copyright (c) 1992-2026 The FreeBSD Project.
Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994
The Regents of the University of California. All rights reserved.
FreeBSD is a registered trademark of The FreeBSD Foundation.
FreeBSD 16.0-CURRENT #17 t6031-n287202-d288fcc44179-dirty: Thu Sep 10 03:35:27 GMT 2026
local@36G-10T-140-Y2YLQJ0X73-14C-M3Max-30G-89.local:/Volumes/cross-buld/obj/freebsd/Volumes/cross-buld/freebsd-t6031/arm64.aarch64/sys/T6041 arm64
Homebrew clang version 22.1.8
VT: init without driver.
real memory = 37842370560 (36089 MB)
avail memory = 36517732352 (34826 MB)
Failed to fetch release address for CPU 1Failed to fetch release address for CPU 1Failed to fetch release address for CPU 1Failed to fetch release address for CPU 1Failed to fetch release address for CPU 1Failed to fetch release address for CPU 1Failed to fetch release address for CPU 1Failed to fetch release address for CPU 1Failed to fetch release address for CPU 1Failed to fetch release address for CPU 1Failed to fetch release address for CPU 1Failed to fetch release address for CPU 1Failed to fetch release address for CPU 1Failed to fetch release address for CPU 1FreeBSD/SMP: Multiprocessor System Detected: 15 CPUs
arc4random: WARNING: initial seeding bypassed the cryptographic random device because it was not yet seeded and the knob 'bypass_before_seeding' was enabled.
random: entropy device external interface
kbd0 at kbdmux0
ofwbus0: <Open Firmware Device Tree>
simplebus0: <Flattened device tree simple bus> on ofwbus0
simple_mfd0: <Simple MFD (Multi-Functions Device)> mem 0x502800000-0x5029dffff,0x508300000-0x50837ffff,0x502280000-0x50237ffff,0x500000000-0x50007ffff,0x508200000-0x50827ffff,0x508004000-0x508004fff,0x210e20000-0x210e21fff,0x210050000-0x210f40fff,0x210e40000-0x210e48fff,0x210e50000-0x211cd0fff,0x210e70000-0x210e70fff,0x210050000-0x21005ffff,0x210150000-0x21015ffff,0x210250000-0x21025ffff,0x210350000-0x21035ffff,0x211e20000-0x211e21fff,0x211050000-0x211f40fff,0x211e40000-0x211e4afff,0x211e50000-0x212cd0fff,0x211e70000-0x211e70fff,0x211050000-0x21105ffff,0x211150000-0x21115ffff,0x211250000-0x21125ffff,0x211350000-0x21135ffff,0x211450000-0x21145ffff,0x211550000-0x21155ffff,0x212e20000-0x212e21fff,0x212050000-0x212f40fff,0x212e40000-0x212e4afff,0x212e50000-0x213cd0fff,0x212e70000-0x212e70fff,0x212050000-0x21205ffff,0x212150000-0x21215ffff,0x212250000-0x21225ffff,0x212350000-0x21235ffff,0x212450000-0x21245ffff,0x212550000-0x21255ffff,0x502800000-0x502817fff,0x50282c000-0x50282ffff,0x502850000-0x502853fff,0x502880000-0x50289bfff,0x502900000-0x502923fff,0x5028f0000-0x5028f3fff,0x5028e0000-0x5028e3fff,0x502820000-0x502823fff,0x508330000-0x50833ffff,0x508374000-0x508377fff,0x508360000-0x508363fff,0x500200000-0x500207fff,0x500400000-0x500433fff,0x5003c0000-0x5003effff,0x508800000-0x5088a7fff,0x485878000-0x48587bfff,0x288eb0000-0x288eb3fff,0x288e80000-0x288eaffff,0x508900000-0x508917fff,0x500210000-0x500217fff,0x50020c000-0x50020ffff,0x508004000-0x508004fff,0x50007a000-0x50007dfff,0x504000000-0x504ffffff,0x288e1c000-0x288e1ffff,0x5022a0000-0x5022a3fff irq 5,6,7,8 on simplebus0
cpulist0: <Open Firmware CPU Group> on ofwbus0
cpu0: <Open Firmware CPU> on cpulist0
apple_dart0: <Apple DART (USB, bypass)> mem 0x382f00000-0x382f0bfff irq 32 on simplebus0
apple_dart0: 16 streams in bypass
apple_dart1: <Apple DART (USB, bypass)> mem 0x382f80000-0x382f8bfff irq 33 on simplebus0
apple_dart1: 16 streams in bypass
apple_dart2: <Apple DART (USB, bypass)> mem 0x38af00000-0x38af0bfff irq 42 on simplebus0
apple_dart2: 16 streams in bypass
apple_dart3: <Apple DART (USB, bypass)> mem 0x38af80000-0x38af8bfff irq 43 on simplebus0
apple_dart3: 16 streams in bypass
apple_dart4: <Apple DART (USB, bypass)> mem 0x392f00000-0x392f0bfff irq 63 on simplebus0
apple_dart4: 16 streams in bypass
apple_dart5: <Apple DART (USB, bypass)> mem 0x392f80000-0x392f8bfff irq 64 on simplebus0
apple_dart5: 16 streams in bypass
apple_dart6: <Apple DART (USB, bypass)> mem 0x39af00000-0x39af0bfff irq 74 on simplebus0
apple_dart6: 16 streams in bypass
apple_dart7: <Apple DART (USB, bypass)> mem 0x39af80000-0x39af8bfff irq 75 on simplebus0
apple_dart7: 16 streams in bypass
aic0: <Apple Interrupt Controller> mem 0x502400000-0x5025cbfff on simplebus0
aic0: AIC v3 rev 0xa: cap0 0x80aa0 maxnumirq 0x2001000 -> 2720 irqs/die (block 4096), 1 die
gpio0: <Apple Pinmux Controller> mem 0x51c000000-0x51c003fff irq 11,12,13,14,15,16,17 on simplebus0
gpiobus0: <OFW GPIO bus> on gpio0
generic_timer0: <ARMv8 Generic Timer> irq 0,1,2,3 on ofwbus0
Timecounter "ARM MPCore Timecounter" frequency 1000000000 Hz quality 1000
Event timer "ARM MPCore Eventtimer" frequency 1000000000 Hz quality 1000
smbios0: <System Management BIOS>
smbios0: Entry point: v3 (64-bit), Version: 3.7
uart0: <s5l class> mem 0x429200000-0x429203fff irq 4 on simplebus0
uart0: debug port (-1,n,8,1)
uart1: <Apple DockChannel UART> mem 0x508828000-0x508838003 on simplebus0
uart1: console (-1,n,8,1)
apple_wdog0: <Apple Watchdog> mem 0x50836c000-0x50836ffff,0x508338260-0x508338263,0x508330008-0x50833000b,0x50833002c-0x50833002f,0x508330020-0x508330023 irq 9,10 on simplebus0
apple_wdog0: cannot get clock
device_attach: apple_wdog0 attach returned 2
gpioc0: <GPIO controller> at pins 0-199 on gpiobus0
apple_sart0: <Apple SART> mem 0x40dc50000-0x40dc5bfff,0x40dd44000-0x40dd47fff,0x40dcc0000-0x40dcc3fff on simplebus0
apple_sart0: v3, 6 of 16 entries in use
apple_mbox0: <Apple ASC mailbox> mem 0x409608000-0x40960bfff on simplebus0
ans0: <Apple ANS2 NVMe> mem 0x40dcc0000-0x40dd2000f,0x409600000-0x409603fff,0x44dcc0000-0x44dccffff irq 19 on simplebus0
ans0: RTKit v12 (firmware 12-12)
ans0: ANS3 (secure alias) firmware booted (RTKit iop 0x20 ap 0x20)
ans0: ANS3: INTMS 0 -> 0
ans0: APPLE SSD AP1024Z, serial 0ba02edc235c501d, firmware 241.0.12, NVMe 1.1, 3 namespace(s)
ans0: namespace 1: 244276265 blocks of 4096 bytes (954204 MB)
ans0: disk /dev/ans0 (read-only until hw.apple_ans.writable=1)
apple_mbox1: <Apple ASC mailbox> mem 0x50c608000-0x50c60bfff irq 20,21,22,23 on simplebus0
apple_smc0: <Apple System Management Controller> mem 0x50c600000-0x50c687fff,0x50de00000-0x50defffff on simplebus0
apple_smc0: RTKit v12 (firmware 12-12)
apple_smc0: RTKit up, shared SRAM at 0x50de68000
apple_smc0: CLKM read ok (0): 733a0fff5200
gpiobus1: <OFW GPIO bus> on apple_smc0
gpioc1: <GPIO controller> at pins 0-255 on gpiobus1
pcib0: <Apple PCIe host bridge> mem 0x1cb0000000-0x1cbfffffff,0x414000000-0x414003fff,0x417000000-0x41703ffff,0x417040000-0x417067fff,0x416000000-0x416ffffff,0x415046200-0x41504a1ff,0x415044000-0x415047fff,0x410028000-0x41002ffff,0x41003c000-0x41003ffff,0x417020000-0x417023fff,0x417048000-0x41704ffff,0x410024000-0x410027fff,0x410048000-0x41004bfff,0x410044000-0x410047fff,0x411028000-0x41102ffff,0x41103c000-0x41103ffff,0x417024000-0x417027fff,0x417050000-0x417057fff,0x411024000-0x411027fff,0x411048000-0x41104bfff,0x411044000-0x411047fff,0x412028000-0x41202ffff,0x41203c000-0x41203ffff,0x417028000-0x41702bfff,0x417058000-0x41705ffff,0x412024000-0x412027fff,0x412048000-0x41204bfff,0x412044000-0x412047fff,0x413028000-0x41302ffff,0x41303c000-0x41303ffff,0x41702c000-0x41702ffff,0x417060000-0x417067fff,0x413024000-0x413027fff,0x413048000-0x41304bfff,0x413044000-0x413047fff irq 28,29,30,31 on simplebus0
pcib0: port 0: LINK_STAT 0xab000208 PORT_STAT 0xd APPCLK 0x100101 REFCLK 0 PERST 0x200001
gpio0: set pin 4 to 76a02
pcib0: port 0: power enable asserted
gpio0: set pin 4 to 76a03
pcib0: port 0: link UP (LINK_STAT 0x9b000001)
pcib0: port 1: LINK_STAT 0xab000208 PORT_STAT 0xd APPCLK 0x100101 REFCLK 0 PERST 0x200001
gpio0: set pin 5 to 76a02
gpio0: set pin 5 to 76a03
pcib0: port 1: link down (LINK_STAT 0xab000208)
pcib0: port 2: LINK_STAT 0xab000200 PORT_STAT 0xd APPCLK 0x100101 REFCLK 0 PERST 0x200001
gpio0: set pin 6 to 76a02
gpio0: set pin 6 to 76a03
pcib0: port 2: link UP (LINK_STAT 0x9b000001)
pcib0: port 3: LINK_STAT 0xab000200 PORT_STAT 0xd APPCLK 0x100101 REFCLK 0 PERST 0x200001
gpio0: set pin 7 to 76a02
gpio0: set pin 7 to 76a03
pcib0: port 3: link UP (LINK_STAT 0x9b000001)
pcib0: ports done
pcib0: DART 0x410000000: mapping
pcib0: DART 0x410000000 (t8110): bypass FAILED
pcib0: DART 0x411000000: port 1 not up, skipped
pcib0: DART 0x412000000: mapping
pcib0: DART 0x412000000 (t8110): bypass FAILED
pcib0: DART 0x413000000: mapping
pcib0: DART 0x413000000 (t8110): bypass FAILED
pcib0: darts done
pcib0: 32 MSI vectors on AIC irqs 2071-2102
pcib0: msi done
pcib0: attaching the PCI bus
pci0: <OFW PCI bus> on pcib0
pcib1: <PCI-PCI bridge> at device 0.0 on pci0
pci1: <OFW PCI bus> on pcib1
pcib0: could not route pin 1 for device 0.0
pcib0: could not route pin 2 for device 0.0
pci1: <network> at device 0.0 (no driver attached)
pci1: <network> at device 0.1 (no driver attached)
pcib2: <PCI-PCI bridge> at device 1.0 on pci0
pci2: <OFW PCI bus> on pcib2
pcib3: <PCI-PCI bridge> at device 2.0 on pci0
pci3: <OFW PCI bus> on pcib3
aq0: <Marvell AQtion AQC113 10Gbit Network Adapter> at device 0.0 on pci3
aq0: Atlantic2 B0, F/W version 1.4.33
aq0: MAC address 1c:1d:d3:e9:67:2a from <unknown> (local-mac-address)
aq0: Using 1024 TX descriptors and 1024 RX descriptors
aq0: Using 1 RX queues 1 TX queues
aq0: Using MSI-X interrupts with 2 vectors
aq0: Assign IRQ 0 to rx ring 0
aq0: Assign IRQ 0 to tx ring 0
aq0: Assign IRQ 1 to admin proc
aq0: Ethernet address: 1c:1d:d3:e9:67:2a
aq0: netmap queues/slots: TX 1/1024, RX 1/1024
pcib4: <PCI-PCI bridge> at device 3.0 on pci0
pci4: <OFW PCI bus> on pcib4
pcib0: could not route pin 1 for device 3.0
xhci0: <XHCI (generic) USB 3.0 controller> irq 0 at device 0.0 on pci4
xhci0: 32 bytes context size, 64-bit DMA
xhci0: xECP capabilities <LEGACY,PROTO,PROTO,DEBUG>
usbus0 on xhci0
snps_dwc3_fdt0: <Synopsys Designware DWC3> mem 0x382280000-0x3822917ff,0x382200000-0x382203fff,0x38228c000-0x3822917ff,0x382a84000-0x382a87fff,0x382800000-0x382803fff,0x382a80000-0x382a83fff,0x382080000-0x382083fff,0x38228d000-0x382290fff,0x382980000-0x382983fff irq 34,35,36,37 on simplebus0
snps_dwc3_fdt0: 64 bytes context size, 64-bit DMA
snps_dwc3_fdt0: xECP capabilities <LEGACY,PROTO,PROTO>
usbus1: trying to attach
usbus1 on snps_dwc3_fdt0
snps_dwc3_fdt1: <Synopsys Designware DWC3> mem 0x38a280000-0x38a2917ff,0x38a200000-0x38a203fff,0x38a28c000-0x38a2917ff,0x38aa84000-0x38aa87fff,0x38a800000-0x38a803fff,0x38aa80000-0x38aa83fff,0x38a080000-0x38a083fff,0x38a28d000-0x38a290fff,0x38a980000-0x38a983fff irq 44,45,46,47,48 on simplebus0
snps_dwc3_fdt1: 64 bytes context size, 64-bit DMA
snps_dwc3_fdt1: xECP capabilities <LEGACY,PROTO,PROTO>
usbus2: trying to attach
usbus2 on snps_dwc3_fdt1
apple_mbox2: <Apple ASC mailbox> mem 0x38b148000-0x38b14bfff irq 49,50,51,52 on simplebus0
apple_mbox3: <Apple ASC mailbox> mem 0x389108000-0x38910bfff irq 53,54,55,56 on simplebus0
snps_dwc3_fdt2: <Synopsys Designware DWC3> mem 0x392280000-0x3922917ff,0x392200000-0x392203fff,0x39228c000-0x3922917ff,0x392a84000-0x392a87fff,0x392800000-0x392803fff,0x392a80000-0x392a83fff,0x392080000-0x392083fff,0x39228d000-0x392290fff,0x392980000-0x392983fff irq 65,66,67,68,69 on simplebus0
snps_dwc3_fdt2: 64 bytes context size, 64-bit DMA
snps_dwc3_fdt2: xECP capabilities <LEGACY,PROTO,PROTO>
usbus3: trying to attach
usbus3 on snps_dwc3_fdt2
snps_dwc3_fdt3: <Synopsys Designware DWC3> mem 0x39a280000-0x39a2917ff,0x39a200000-0x39a203fff,0x39a28c000-0x39a2917ff,0x39aa84000-0x39aa87fff,0x39a800000-0x39a803fff,0x39aa80000-0x39aa83fff,0x39a080000-0x39a083fff,0x39a28d000-0x39a290fff,0x39a980000-0x39a983fff irq 76,77,78,79,80 on simplebus0
snps_dwc3_fdt3: 64 bytes context size, 64-bit DMA
snps_dwc3_fdt3: xECP capabilities <LEGACY,PROTO,PROTO>
usbus4: trying to attach
usbus4 on snps_dwc3_fdt3
armv8crypto0: <AES-CBC,AES-XTS,AES-GCM>
Timecounters tick every 1.000 msec
md0: Preloaded image </boot/mfsroot> 469762048 bytes at 0xffff0000015ec000
usbus0: 5.0Gbps Super Speed USB v3.0
usbus1: 5.0Gbps Super Speed USB v3.0
usbus2: 5.0Gbps Super Speed USB v3.0
usbus3: 5.0Gbps Super Speed USB v3.0
usbus4: 5.0Gbps Super Speed USB v3.0
ugen4.1: <Synopsys XHCI root HUB> at usbus4
uhub0 on usbus4
uhub0: <Synopsys XHCI root HUB, class 9/0, rev 3.00/1.00, addr 1> on usbus4
ugen3.1: <Synopsys XHCI root HUB> at usbus3
uhub1 on usbus3
uhub1: <Synopsys XHCI root HUB, class 9/0, rev 3.00/1.00, addr 1> on usbus3
ugen2.1: <Synopsys XHCI root HUB> at usbus2
uhub2 on usbus2
uhub2: <Synopsys XHCI root HUB, class 9/0, rev 3.00/1.00, addr 1> on usbus2
ugen1.1: <Synopsys XHCI root HUB> at usbus1
uhub3 on usbus1
uhub3: <Synopsys XHCI root HUB, class 9/0, rev 3.00/1.00, addr 1> on usbus1
ugen0.1: <(0x1b21) XHCI root HUB> at usbus0
uhub4 on usbus0
uhub4: <(0x1b21) XHCI root HUB, class 9/0, rev 3.00/1.00, addr 1> on usbus0
CPU 0: Apple Unknown CPU r1p1 (midr: 611f0591) affinity: 0
Cache Type = <IDC,64 byte CWG,64 byte ERG,64 byte D-cacheline,PIPT I-cache,64 byte I-cacheline>
Instruction Set Attributes 0 = <TLBI-OSR,CondM-8.5,FHM,DP,SHA3,RDM,Atomic,CRC32,SHA2+SHA512,SHA1,AES+PMULL>
Instruction Set Attributes 1 = <XS,I8MM,BF16,PredInv v8.5,SB,FRINTTS,GPI,RCPC-8.4,FCMA,JSCVT,Impl PAuth+FPAC+Combined,DCCVADP>
Instruction Set Attributes 2 = <RPRES,WFxT>
Processor Features 0 = <CSV3,CSV2,PSTATE.DIT,RAS,AdvSIMD+HP,FP+HP,EL2,EL1,EL0>
Processor Features 1 = <MTE_frac,CSV2 p2,SME2,BTI>
Processor Features 2 = <>
Memory Model Features 0 = <ECV,FGT v8.6,ExS,S2 TGran4,No S2 TGran64,S2 TGran16,TGran4,TGran16,16bit ASID,4TB PA>
Memory Model Features 1 = <nTLBPA,AFP,HCX,ETS2,TWED,XNX,SpecSEI,EPAN,LO,HPD+TTPBHA,VH,8bit VMID>
Memory Model Features 2 = <E0PD,EVT-8.5,TTL,FWB,IDS,AT,NV v8.4,32bit CCIDX,48bit VA,IESB,UAO,CnP>
Memory Model Features 3 = <>
Memory Model Features 4 = <>
Debug Features 0 = <DoubleLock,2 CTX BKPTs,4 Watchpoints,6 Breakpoints,IMPL PMU,Debugv8p4>
Debug Features 1 = <>
Auxiliary Features 0 = <>
Auxiliary Features 1 = <>
AArch32 Instruction Set Attributes 5 = <>
AArch32 Media and VFP Features 0 = <>
AArch32 Media and VFP Features 1 = <>
aic0: using for IPIs
Release APs...Trying to mount root from ufs:/dev/md0 []...
APs not started
TCP_ratelimit: Is now initialized
Warning: no time-of-day clock registered, system time will not be set accurately
uhub3: 2 ports with 2 removable, self powered
uhub2: 2 ports with 2 removable, self powered
uhub1: 2 ports with 2 removable, self powered
uhub0: 2 ports with 2 removable, self powered
uhub4: 4 ports with 4 removable, self powered
random: randomdev_wait_until_seeded unblock wait
random: unblocking device.
lo0: link state changed to UP
apple_wdog0: <Apple Watchdog> mem 0x50836c000-0x50836ffff,0x508338260-0x508338263,0x508330008-0x50833000b,0x50833002c-0x50833002f,0x508330020-0x508330023 irq 9,10 on simplebus0
apple_wdog0: cannot get clock
device_attach: apple_wdog0 attach returned 2
apple_wdog0: <Apple Watchdog> mem 0x50836c000-0x50836ffff,0x508338260-0x508338263,0x508330008-0x50833000b,0x50833002c-0x50833002f,0x508330020-0x508330023 irq 9,10 on simplebus0
apple_wdog0: cannot get clock
device_attach: apple_wdog0 attach returned 2
aq0: == state dump (after init), hwtype AQ2 ==
aq0: link down, rx rings 1, tx rings 1, msix 1
aq0: TPB_TX_BUF(7900) 0x00000315 RPB_RPF_RX(5700) 0x00000001 RSS_CTRL1(54c0) 0000000000
aq0: L2BC(5100) 0xffff1001 L2UC0 msw(5114) 0x80411c1d lsw(5110) 0xd3e9672a MCAST_MASK(5270) 0000000000 VLAN_MODE(5280) 0x0000000c
aq0: INTR status(2000) 0000000000 mask(2060) 0x00000003 automask(2090) 0xffffffff ctrl(2300) 0x20000026 map_txrx0(2100) 0x80008000
aq0: RX DMA drop counter(6818) 0
aq0: MSI-X ctrl 0x801f (enable 1, func mask 0, table size 32)
aq0: admin irq res 175 count 0 | rx poll kicks 0 (fallback on)
aq0: AQ2 NEW_CTRL(5104) 0x00000a00 REDIR2(54c8) 0x000001ff REC_TAB_EN(6ff0) 0x0000ffff L2BC_TAG(50f0) 0x00000001
aq0: AQ2 RX_Q_TC_MAP0(5900) 0000000000 TX_Q_TC_MAP0(799c) 0000000000 ART base 16
aq0: AQ2 link ctrl(12010) 0x00002411 options(12018) 0x731efec1 status(13014) 0000000000 (requested rate mask 0x1f)
aq0: AQ2 ART[16] tag 0000000000 mask 0x0000006f action 0x00000001
aq0: AQ2 ART[17] tag 0000000000 mask 0x00007c00 action 0x00000001
aq0: AQ2 ART[72] tag 0000000000 mask 0xe0000000 action 0x00000181
aq0: tx0 ctl(0x7c08) 0x80000400 hw head 0 tail 0 | sw head 0 tail 0 size 1024 irq 0
aq0: txd[0] 0000000000000000 0000000000000000
aq0: txd[1] 0000000000000000 0000000000000000
aq0: txd[2] 0000000000000000 0000000000000000
aq0: txd[3] 0000000000000000 0000000000000000
aq0: rx0 ctl(0x5b08) 0x80000400 hw head 0 tail 0 | size 1024 bufsz 2048 itr vector 0 irq res 174 irqs 0
aq0: rxd[0] 0000000000000000 0000000000000000
aq0: rxd[1] 0000000000000000 0000000000000000
aq0: rxd[2] 0000000000000000 0000000000000000
aq0: rxd[3] 0000000000000000 0000000000000000
aq0: == end of state dump (after init) ==
aq0: atlantic: link UP: speed=1000
aq0: link state changed to UP
atlantic: set 1 mc address 01:00:5e:00:00:01
apple_wdog0: <Apple Watchdog> mem 0x50836c000-0x50836ffff,0x508338260-0x508338263,0x508330008-0x50833000b,0x50833002c-0x50833002f,0x508330020-0x508330023 irq 9,10 on simplebus0
apple_wdog0: cannot get clock
device_attach: apple_wdog0 attach returned 2
apple_hpm0: <Apple SPMI with SN2012 USB-C PD controllers> mem 0x509188000-0x50918bfff,0x509184000-0x509187fff,0x509180000-0x509183fff irq 107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127 on simplebus0
apple_hpm0: STATUS 0x01000100 CONFIG1 0x6, 4 PD controller(s)
apple_hpm0: port 1 (back-right): usid 0xc mode "APP " version 0x307800
apple_hpm0: port 1 (back-right): left alone (ssps_mask 0x1c)
apple_hpm0: port 1 (back-right): STATUS 0x1000b41d DATA_STATUS 0x800000f3 POWER_STATUS 0x00000f0f
apple_hpm0: port 1 (back-right): plug PRESENT, conn state 6 (connected), cc2, power sink, data UFP (device)
apple_hpm0: port 1 (back-right): data: USB2 USB3 cc2
apple_hpm0: port 2 (back-right-middle): usid 0xa mode "APP " version 0x307800
apple_hpm0: port 2 (back-right-middle): SSPS(S0) done, power state 0
apple_hpm0: port 2 (back-right-middle): STATUS 0x1000b40d DATA_STATUS 0x98800091 POWER_STATUS 0x00000f0f
apple_hpm0: port 2 (back-right-middle): plug PRESENT, conn state 6 (connected), cc1, power sink, data UFP (device)
apple_hpm0: port 2 (back-right-middle): data: USB4 USB2 cc1
apple_hpm0: port 2 (back-right-middle): cable speed field 4 gen field 1, link training mode 1
apple_hpm0: port 3 (back-left-middle): usid 0x8 mode "APP " version 0x307800
apple_hpm0: port 3 (back-left-middle): SSPS(S0) done, power state 0
apple_hpm0: port 3 (back-left-middle): STATUS 0x10000000 DATA_STATUS 0000000000 POWER_STATUS 0000000000
apple_hpm0: port 3 (back-left-middle): no plug, conn state 0 (none), cc1, power sink, data UFP (device)
apple_hpm0: port 3 (back-left-middle): no data connection
apple_hpm0: port 4 (back-left): usid 0x6 mode "APP " version 0x307800
apple_hpm0: port 4 (back-left): SSPS(S0) done, power state 0
apple_hpm0: port 4 (back-left): STATUS 0x10000000 DATA_STATUS 0000000000 POWER_STATUS 0000000000
apple_hpm0: port 4 (back-left): no plug, conn state 0 (none), cc1, power sink, data UFP (device)
apple_hpm0: port 4 (back-left): no data connection
apple_wdog0: <Apple Watchdog> mem 0x50836c000-0x50836ffff,0x508338260-0x508338263,0x508330008-0x50833000b,0x50833002c-0x50833002f,0x508330020-0x508330023 irq 9,10 on simplebus0
apple_wdog0: cannot get clock
device_attach: apple_wdog0 attach returned 2
apple_wdog0: <Apple Watchdog> mem 0x50836c000-0x50836ffff,0x508338260-0x508338263,0x508330008-0x50833000b,0x50833002c-0x50833002f,0x508330020-0x508330023 irq 9,10 on simplebus0
apple_wdog0: cannot get clock
device_attach: apple_wdog0 attach returned 2
atcphy0: <Apple T6041 Type-C PHY (USB4/CIO)> mem 0x38aa90000-0x38aa93fff,0x38a800000-0x38a803fff,0x38b000000-0x38b003fff,0x38b000400-0x38b0043ff,0x38b000800-0x38b0047ff,0x38b000a00-0x38b0049ff,0x38b001000-0x38b004fff,0x38b003000-0x38b006fff,0x38b003200-0x38b0071ff,0x38b003800-0x38b0077ff,0x38b003a00-0x38b0079ff,0x38b004000-0x38b007fff,0x38b005000-0x38b008fff,0x38b006000-0x38b009fff,0x38b007000-0x38b00afff,0x38b008000-0x38b00bfff,0x38b009000-0x38b00cfff,0x38b00a000-0x38b00dfff,0x38b00b000-0x38b00efff,0x38b00c000-0x38b00ffff,0x38b00d000-0x38b010fff,0x38b00e000-0x38b011fff,0x38b00f000-0x38b012fff,0x38b010000-0x38b013fff,0x38b018000-0x38b01bfff,0x38b019000-0x38b01cfff,0x38b01a000-0x38b01dfff,0x38b01b000-0x38b01efff,0x38b01c000-0x38b01ffff,0x38b01d000-0x38b020fff,0x38b01e000-0x38b021fff,0x38b01f000-0x38b022fff,0x38b020000-0x38b023fff,0x38b028000-0x38b02bfff,0x38b028400-0x38b02c3ff,0x38b029000-0x38b02cfff,0x38b040000-0x38b05ffff,0x38b0c0000-0x38b0cffff,0x38b140000-0x38b15bfff,0x38b200000-0x38b203fff,0x38b244000-0x38b247fff,0x388000000-0x388007fff,0x388020000-0x388023fff,0x38b250000-0x38b253fff on simplebus0
atcphy0: port 2, CFG 0x38b200000 TOP 0x38b000000 MXWRAP 0x38b140000, mailbox apple_mbox2; PDC0 0x00000004 PDC1 0x00000100
apple_wdog0: <Apple Watchdog> mem 0x50836c000-0x50836ffff,0x508338260-0x508338263,0x508330008-0x50833000b,0x50833002c-0x50833002f,0x508330020-0x508330023 irq 9,10 on simplebus0
apple_wdog0: cannot get clock
device_attach: apple_wdog0 attach returned 2
pcib5: <Apple tunnelled PCIe root complex (Thunderbolt)> mem 0x1c60000000-0x1c6fffffff,0x38c034000-0x38c037fff,0x38c020000-0x38c027fff,0x38c038000-0x38c03bfff,0x38c060000-0x38c063fff,0x388020000-0x388023fff,0x38c02c000-0x38c02ffff,0x38c028000-0x38c02bfff irq 57,58,59,60,61,62 on simplebus0
pcib5: waiting for the Thunderbolt PCIe tunnel (port 0x38c020000, ECAM 0x1c60000000); hw.apple_pciec.start=1 forces the bring-up
apple_wdog0: <Apple Watchdog> mem 0x50836c000-0x50836ffff,0x508338260-0x508338263,0x508330008-0x50833000b,0x50833002c-0x50833002f,0x508330020-0x508330023 irq 9,10 on simplebus0
apple_wdog0: cannot get clock
device_attach: apple_wdog0 attach returned 2
apple_acio0: <Apple ACIO USB4/Thunderbolt host> mem 0x389f00000-0x389ffffff,0x389ac0000-0x389ac3fff,0x389ac4000-0x389ac7fff,0x389ac8000-0x389acbfff,0x389e44000-0x389e47fff,0x389100000-0x389103fff,0x5108240cc-0x5108240cf on simplebus0
apple_acio0: ACIO DART regs 0x389a80000, page table 0x10561e20000 (t8110, 16 KiB pages); enable deferred until the CIO domains are up
apple_acio0: cluster 1, PHY atcphy0, mailbox apple_mbox3, rc 0x389ac0000, reconfig pmgr+0x22024, lstx 0x5108240cc
atcphy0: CIO bring-up (port 2)
atcphy0: part A (powerup_rst): PDC0 0x00000004 PDC1 0x00000100 AHB_CLK_REQ 0x00000001
atcphy0: PDC0 |= SLEEP_B_SML: [39+0] 0x00000004 -> 0x00000005
atcphy0: sleep_sml out: bit0==1 ok (0x00000101) after 0 us
atcphy0: PDC0 |= SLEEP_B_BIG: [39+0] 0x00000005 -> 0x00000007
atcphy0: sleep_big out: bit1==1 ok (0x00000103) after 0 us
atcphy0: PDC0 &= ~CLAMP_EN: [39+0] 0x00000007 -> 0x00000003
atcphy0: AHB_CLK_REQ <= 0
atcphy0: AHB clk ack: bit8==0 ok (0x00000003) after 0 us
atcphy0: PDC0 |= APB_RESET_N: [39+0] 0x00000003 -> 0x0000000b
atcphy0: part A done: PDC0 0x0000000b PDC1 0x00000003
atcphy0: part B: tunables (CIO order)
atcphy0: apple,tunable-atc0axi2af -> reg 41 (0x388000000): 74 records, 64 written, 10 already, 0 out of range
atcphy0: apple,tunable-atc0axi2af-wr-dis: absent, skipped
atcphy0: apple,tunable-atc0axi2af-lock-lock: absent, skipped
atcphy0: apple,tunable-atc-fabric -> reg 40 (0x38b244000): 65 records, 26 written, 39 already, 0 out of range
atcphy0: apple,tunable-atc-common-cfg -> reg 43 (0x38b250000): 1 records, 1 written, 0 already, 0 out of range
atcphy0: apple,tunable-atc0axi2af-lioa -> reg 42 (0x388020000): 5 records, 5 written, 0 already, 0 out of range
atcphy0: apple,tunable-ln0-rx-cfg-tx-of-rxclk -> reg 20 (0x38b00d000): 8 records, 8 written, 0 already, 0 out of range
atcphy0: apple,tunable-ln1-rx-cfg-tx-of-rxclk -> reg 29 (0x38b01d000): 8 records, 8 written, 0 already, 0 out of range
atcphy0: apple,tunable-aus40cmn-shm -> reg 5 (0x38b000a00): 1 records, 1 written, 0 already, 0 out of range
atcphy0: apple,tunable-auspll-core -> reg 8 (0x38b003200): 6 records, 4 written, 2 already, 0 out of range
atcphy0: apple,tunable-cio4pll-core -> reg 10 (0x38b003a00): 4 records, 3 written, 1 already, 0 out of range
atcphy0: apple,tunable-uc-regs-cio-dflt: absent, skipped
atcphy0: apple,tunable-ln0-rx-top-cio-dflt -> reg 16 (0x38b009000): 1 records, 1 written, 0 already, 0 out of range
atcphy0: apple,tunable-ln1-rx-top-cio-dflt -> reg 25 (0x38b019000): 1 records, 1 written, 0 already, 0 out of range
atcphy0: apple,tunable-ln0-rx-eq-cio-dflt: absent, skipped
atcphy0: apple,tunable-ln1-rx-eq-cio-dflt: absent, skipped
atcphy0: part B: xbar config (CIO)
atcphy0: ACIOPHY_CONFIGURATION lanes -> CIO: [2+0x6c] 0x07000026 -> 0x07000002
atcphy0: CFG0_XBAR &= ~0x1f: [2+0x78] 0x0000002a -> 0x00000020
atcphy0: ACIOPHY_CONFIGURATION |= 2: [2+0x6c] 0x07000002 -> 0x07000002
atcphy0: part B done: CONFIGURATION 0x07000002 XBAR 0x00000020 UC_CTRL 0x00000881
atcphy0: part B: slpctrl_init (kCIO): CFG0_TOP 0x1003f33a CFG1_TOP 0000000000 CFG_SLP_CTRL 0x15540fcc before
atcphy0: slpctrl_init done: CFG0_TOP 0x11833fd0 CFG1_TOP 0x000000ff CFG_SLP_CTRL 0x15540300 (expect 0x11833fd0 / 0xff / 0x15540300)
atcphy0: part C: PHY core start (MXWRAP 0x38b140000)
atcphy0: IDLE_CTRL |= 1: [38+0x40] 0x000a0002 -> 0x000a0003
atcphy0: CPU_CTRL <= 0x10
atcphy0: PHY core: CPU_CTRL 0x10 CPU_STATUS 0x4e A2I_CTRL 0x00020001 I2A_CTRL 0x00100101
atcphy0: RTKit v12 (firmware 12-12)
atcphy0: PHY core RTKit up: iop 0x20 ap 0x20
atcphy0: UC_TNBL_DONE (UC_CTRL_REG 0x00000c81 after 1 ms)
atcphy0: PDC0 |= ACIOPHY_RESET_N: [39+0] 0x0000000b -> 0x0000001b
atcphy0: CIO PHY up: PDC0 0x0000001b PDC1 0x00000003 CPU_STATUS 0x16e
apple_acio0: CIO power domains up
apple_acio0: CIO_RECONFIG_CTL 0000000000 before (cluster 1)
apple_acio0: CIO reconfig done: CTL 0000000000 after 1 ms
apple_acio0: coproc: CPU_CTRL 0 CPU_STATUS 0x42 IDLE_CTRL 0xa0002; rc+0 0x00000050 rc+0x0c 0x3 fw_state 0x01000000
apple_acio0: LSTX GPIO (0x5108240cc): 0x0087600e -> 0x00876213 (wrote 0x00876212, mode 1: output high, data bit 4)
apple_acio0: RTKit v12 (firmware 11-12)
apple_acio0: ACIO core RTKit up: iop 0x20 ap 0x20 (eps: crashlog/syslog buffers are firmware-owned)
apple_acio0: rc+0x0c 0x3 -> 0x2
apple_acio0: fw_state 0x01000000 READY (after 0 ms)
apple_acio0: apple,tunable-rc: 2 applied
apple_acio0: apple,tunable-hbw: 14 applied
apple_acio0: apple,tunable-lbw: 13 applied
apple_acio0: apple,tunable-pcie-adapter: 1 applied
apple_acio0: rc+0 0x00004020 rc+0x0c 0x2 fw_state 0x01000000 after tunables
apple_acio0: ACIO DART: PARAMS_0 0xae312040 (page 2^14) PARAMS_C 0x00100020 (32 SIDs) PROTECT 0 ERROR 0000000000 ENABLE_STREAMS0 0000000000
apple_acio0: ACIO DART: stream 0 TCR 0x1 TTBR 0x10561e21 (L1 0x10561e20000)
apple_acio0: ACIO DART: stream 16 TCR 0x1 TTBR 0x10561e21 (L1 0x10561e20000)
apple_acio0: ACIO DART: ENABLE_STREAMS0 0x00010001, translating
apple_acio0: nhi child not attached (6): load tb.ko, then hw.apple_acio.step=8
nhi0: <Apple USB4 NHI (ACIO)> mem 0x389f00000-0x389ffffff irq 177,178,179,180,181,182,183,184,185,186,187,188,189,190,191,192,193,194,195,196,197,198,199,200,201 on apple_acio0
nhi0: NHI+0 0x0040000c (ring count 12), INT_ENABLE 0000000000
nhi0: apple,tunable-nhi: 73 applied
nhi0: apple,tunable-nhi-hi-up-merge: 13 applied
nhi0: apple,tunable-nhi-hi-dn-merge: 13 applied
nhi0: Apple ACIO: 12 rings (NHI+0 = 0x40000c)
nhi0: txring0: irq 189
nhi0: rxring0: irq 177
nhi0: DART-map pa 0x1000c306000+0x200 -> iova 0x80002000
nhi0: DART-map pa 0x1000c307000+0x2000 -> iova 0x80007000
nhi0: ring0: configure
nhi0: ring 0: TX block 0x10000 desc 0x80002000 x16, RX block 0x80000 desc 0x80002100 x16 bufsz 256
nhi0: ring0: activate
nhi0: ring 0: INT_ENABLE 0x1001
nhi0: ring 0: TX opts 0xc0000000 status 0, RX opts 0xc0000000 status 0
nhi0: ring0: fill rx
nhi0: ring0: up
nhi0: router config: CS_0 200f05ac CS_1 0001c71b CS_2 00000000 CS_3 00000000 CS_4 4000000a CS_5 00000000 (vendor 05ac device 200f)
nhi0: Error finding LC registers: 22
nhi0: Root Router UUID: ffffffff-ffff-ffff-0000-000000000000
nhi0: ACIO connection manager: topology -> RR -> VSEC -> cable parameters -> adapter scan
nhi0: ROUTER_CS_0..6: 200f05ac 0001c71b 00000000 00000000 4000000a 00000000 00100000 (upstream 7, max adapter 7, topology not valid, CMUV 0)
nhi0: topology write CS_1..4 = 0000c71b 00000000 80000000 4000200a
nhi0: topology write: acked (0)
nhi0: EVENT route 0x80000000:0 dw2 0x00000005 adapter 5 PLUG (#1, 1 total) -> ack
nhi0: EVENT route 0x80000000:0 dw2 0x00000006 adapter 6 PLUG (#1, 2 total) -> ack
nhi0: after topology: CS_0..6 200f05ac 0001c71b 00000000 80000000 4000200a 00000000 01100000; RR set (after 0 ms)
nhi0: events: 2 received, 2 acked, adapters: 5 x1 6 x1
nhi0: cap @0x1b: 0x43200335 id 3 next 0x35
nhi0: cap @0x35: 0xca0005ff id 5 next 0xff
nhi0: Apple VSEC at 0x35; VSEC+1 (cable parameters) 0000000000
nhi0: cable parameters: VSEC+1 (0x36) <- 0x801
nhi0: cable parameters write: acked (0); VSEC+1 now 0x00000801
nhi0: adapter 1: type 0x000001 cs1 00180709 cs3 80100000 cs4 8b300000 cs5 0000c018 (lane)
nhi0: adapter 1: lane cap 0x13, USB4 port cap 0x16
nhi0: scan adapter 1: LANE_ADP_CS_0/1 1c7e0116 5c02001e state 7 (CLd) negw 0 | PORT_CS_18/19 00f02510 00040006 CONNECTED
nhi0: adapter 2: type 0x000001 cs1 00180709 cs3 00200000 cs4 8b300000 cs5 0000c018 (lane)
nhi0: adapter 2: lane cap 0x13, USB4 port cap 0
nhi0: scan adapter 2: LANE_ADP_CS_0/1 1c7e012a 5c02001e state 7 (CLd) negw 0 | PORT_CS_18/19 00000000 00000000 unread
nhi0: adapter 3: type 0x100101 cs1 00180109 cs3 80300000 cs4 0b300000 cs5 00004008 (PCIe down)
nhi0: adapter 4: type 0x200101 cs1 00180109 cs3 80400000 cs4 0b300000 cs5 00004008 (USB3 down)
nhi0: adapter 5: type 0x0e0101 cs1 00180209 cs3 80500000 cs4 0b300000 cs5 00004809
nhi0: adapter 6: type 0x0e0101 cs1 00180209 cs3 80600000 cs4 0b300000 cs5 00004809
nhi0: adapter 7: type 0x000002 cs1 00180709 cs3 80700000 cs4 0b300000 cs5 0000580b
nhi0: EVENT route 0x80000000:0 dw2 0x00000001 adapter 1 PLUG (#1, 3 total) -> ack
nhi0: EVENT route 0x80000000:0 dw2 0x00000002 adapter 2 PLUG (#1, 4 total) -> ack
nhi0: trained adapter 1: LANE_ADP_CS_0/1 1c7e0116 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00f02510 00040006 CONNECTED
nhi0: lane adapter 1 trained after 400 ms (state 2 CL0, negotiated width 2)
nhi0: unlockPort adapter 1: ADP_CS_4 0xcb300000 -> 0x4b300000
nhi0: DEVICE ROUTER at route 1: CS_0..4 57868087 8505c16b 00000000 00000000 4000000a -> vendor 0x8087 device 0x5786, upstream adapter 1, max adapter 23
nhi0: device router UID (CS_7/CS_8): 808714c4 c0de8500
nhi0: child topology write CS_1..4 = 0010c16b 00000001 80000000 4000200a: acked (0)
nhi0: EVENT route 0x80000000:0x1 dw2 0x0000000d adapter 13 PLUG (#1, 5 total) -> ack
nhi0: EVENT route 0x80000000:0x1 dw2 0x0000000e adapter 14 PLUG (#1, 6 total) -> ack
nhi0: EVENT route 0x80000000:0x1 dw2 0x00000010 adapter 16 PLUG (#1, 7 total) -> ack
nhi0: child CS_6 0x01040000: RR set (after 20 ms)
nhi0: child CS_5 <- 0x97000000 (CV); CS_5 0x97000000 CS_6 0x03000000: CR set (after 20 ms)
nhi0: child adapter 1: type 0x000001 cs1 0008040a cs4 4a000000 cs5 0000f81f (lane)
nhi0: child adapter 2: type 0x000001 cs1 0000000a cs4 ca000000 cs5 0000f81f (lane)
nhi0: child adapter 3: type 0x000001 cs1 0008040a cs4 8a000000 cs5 0000f81f (lane)
nhi0: child adapter 4: type 0x000001 cs1 0000000a cs4 8a000000 cs5 0000f81f (lane)
nhi0: child adapter 5: type 0x000001 cs1 0008040a cs4 8a000000 cs5 0000f81f (lane)
nhi0: child adapter 6: type 0x000001 cs1 0000000a cs4 8a000000 cs5 0000f81f (lane)
nhi0: child adapter 7: type 0x000001 cs1 0008040a cs4 8a000000 cs5 0000f81f (lane)
nhi0: child adapter 8: type 0x000001 cs1 0000000a cs4 8a000000 cs5 0000f81f (lane)
nhi0: child adapter 9: type 0x100102 cs1 00080239 cs4 40800000 cs5 00004008 (PCIe up)
nhi0: child adapter 10: type 0x100101 cs1 00080239 cs4 40800000 cs5 00004008 (PCIe down)
nhi0: child adapter 11: type 0x0e0102 cs1 0008020a cs4 00800000 cs5 00004809 (DP out)
nhi0: child adapter 12: type 0x0e0102 cs1 0008020a cs4 00800000 cs5 00004809 (DP out)
nhi0: child adapter 13: type 0x0e0101 cs1 00080239 cs4 01000000 cs5 03404809 (DP in)
nhi0: child adapter 14: type 0x0e0101 cs1 00080239 cs4 01000000 cs5 03404809 (DP in)
nhi0: child adapter 15: no answer
nhi0: child adapter 16: type 0x0e0101 cs1 00080239 cs4 01000000 cs5 03404809 (DP in)
nhi0: child adapter 17: type 0x100101 cs1 00080239 cs4 40800000 cs5 00004008 (PCIe down)
nhi0: child adapter 18: type 0x100101 cs1 00080239 cs4 40800000 cs5 00004008 (PCIe down)
nhi0: child adapter 19: type 0x0e0102 cs1 0008020a cs4 00800000 cs5 00004809 (DP out)
nhi0: child adapter 20: type 0x200102 cs1 0008010a cs4 00800000 cs5 00004008 (USB3 up)
nhi0: child adapter 21: type 0x200101 cs1 0008010a cs4 00800000 cs5 00004008 (USB3 down)
nhi0: child adapter 22: type 0x200101 cs1 0008010a cs4 00800000 cs5 00004008 (USB3 down)
nhi0: child adapter 23: type 0x200101 cs1 0008010a cs4 00800000 cs5 00004008 (USB3 down)
nhi0: device router: PCIe-up adapter 9, USB3-up adapter 20 (host PCIe-down 3, USB3-down 4)
nhi0: PCIe tunnel: host adapter 3 <-> device adapter 9 (lane 1/1, HopID 8)
nhi0: PCIe Tx device hop: route 1 adp 1 hop 8 = 800e4808 01000301 (0)
nhi0: PCIe Tx host hop: route 0 adp 3 hop 8 = 800e0808 03000301 (0)
nhi0: PCIe Rx device hop: route 1 adp 9 hop 8 = 800e0808 03000301 (0)
nhi0: PCIe Rx host hop: route 0 adp 1 hop 8 = 800e1808 01000301 (0)
nhi0: PCIe protocol-adapter caps: host 0x9 device 0x39
nhi0: PCIe PE host adapter 3: 0
nhi0: PCIe PE device adapter 9: 0
nhi0: ADP_PCIE_CS_0: host 0x800a040b device 0xe10c043b
nhi0: PCIe tunnel ready; starting the AP root complex (tb_pcie_tunnel)
pcib5: Thunderbolt PCIe tunnel enabled (port 1)
pcib5: ATC1_PCIE power domain up
pcib5: apple,tunable-apcie-debug: 1 applied
pcib5: apple,tunable-apcie-fabric: 35 applied
pcib5: before: LINKSTS 0x00000200 ENABLE 0x00100100/0x00000002 PERST 0000000000 TUNNEL_RESET_STS 0x00000001
pcib5: apple,tunable-apcie-config: 3 applied
pcib5: tunnelled reset released: 0x108c 0000000000 after 1 ms
pcib5: LTSSM: link UP after 1 ms (LINKSTS 0x99000001, int status 0x00001000)
nhi0: device ADP_PCIE_CS_0 0xec01043b: PCI link ACTIVE (after 100 ms)
nhi0: USB3 tunnel: host adapter 4 <-> device adapter 20 (HopID 8 on the protocol adapters, 9 on the lane)
nhi0: USB3 Tx device hop: route 1 adp 1 hop 9 = 800ea008 01000303 (0)
nhi0: USB3 Tx host hop: route 0 adp 4 hop 8 = 800e0809 03000303 (0)
nhi0: USB3 Rx device hop: route 1 adp 20 hop 8 = 800e0809 03000303 (0)
nhi0: USB3 Rx host hop: route 0 adp 1 hop 9 = 800e2008 01000303 (0)
nhi0: USB3 protocol-adapter caps: host 0x9 device 0xa
nhi0: ADP_USB3_CS_0: host 0xc0000400 device 0xc0000410
pcib5: attaching the PCI bus (ECAM 0x1c60000000)
pci5: <OFW PCI bus> on pcib5
pcib6: <PCI-PCI bridge> at device 0.0 on pci5
pci6: <PCI bus> on pcib6
pcib7: <PCI-PCI bridge> at device 0.0 on pci6
pci7: <PCI bus> on pcib7
pcib8: <PCI-PCI bridge> at device 0.0 on pci7
pci8: <PCI bus> on pcib8
pcib9: <PCI-PCI bridge> at device 1.0 on pci7
pcib5: could not route pin 2 for device 0.0
pcib9: Failed to allocate interrupt for PCI-e events
pcib10: <PCI-PCI bridge> at device 2.0 on pci7
pcib5: could not route pin 3 for device 0.0
pcib10: Failed to allocate interrupt for PCI-e events
pcib11: <PCI-PCI bridge> at device 3.0 on pci7
pcib5: could not route pin 4 for device 0.0
pcib11: Failed to allocate interrupt for PCI-e events
pcib5: PCI bus attached
ugen2.2: <Fresco Logic, Inc. USB2.0 Hub> at usbus2
uhub5 on uhub2
uhub5: <Fresco Logic, Inc. USB2.0 Hub, class 9/0, rev 2.10/1.01, addr 1> on usbus2
uhub5: MTT enabled
nhi0: poll adapter 1: LANE_ADP_CS_0/1 1c7e0116 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00f02510 00040006 CONNECTED
nhi0: poll adapter 2: LANE_ADP_CS_0/1 1c7e012a 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00000000 00000000 unread
uhub5: 6 ports with 6 removable, self powered
ugen2.3: <HOLTEK USB-HID Device> at usbus2
usbhid0 on uhub5
usbhid0: <HOLTEK USB-HID Device, class 0/0, rev 1.10/1.00, addr 2> on usbus2
hidbus0: <HID bus> on usbhid0
usbhid1 on uhub5
usbhid1: <HOLTEK USB-HID Device, class 0/0, rev 1.10/1.00, addr 2> on usbus2
hidbus1: <HID bus> on usbhid1
usbhid2 on uhub5
usbhid2: <HOLTEK USB-HID Device, class 0/0, rev 1.10/1.00, addr 2> on usbus2
hidbus2: <HID bus> on usbhid2
ugen2.4: <Generic 4-Port USB 2.0 Hub> at usbus2
uhub6 on uhub5
uhub6: <Generic 4-Port USB 2.0 Hub, class 9/0, rev 2.10/0.03, addr 3> on usbus2
uhub6: MTT enabled
uhub6: 5 ports with 4 removable, self powered
ugen2.5: <Gigabyte DMC Device> at usbus2
apple_hpm0: port 2 (back-right-middle): STATUS 0x1080b0cd DATA_STATUS 0x98800011 POWER_STATUS 0x00000f0f
apple_hpm0: port 2 (back-right-middle): plug PRESENT, conn state 6 (connected), cc1, power sink, data DFP (host)
apple_hpm0: port 2 (back-right-middle): data: USB4 USB2 cc1
apple_hpm0: port 2 (back-right-middle): cable speed field 4 gen field 1, link training mode 1
nhi0: poll adapter 1: LANE_ADP_CS_0/1 1c7e0116 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00f02510 00040006 CONNECTED
nhi0: poll adapter 2: LANE_ADP_CS_0/1 1c7e012a 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00000000 00000000 unread
nhi0: poll adapter 1: LANE_ADP_CS_0/1 1c7e0116 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00f02510 00040006 CONNECTED
nhi0: poll adapter 2: LANE_ADP_CS_0/1 1c7e012a 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00000000 00000000 unread
nhi0: poll adapter 1: LANE_ADP_CS_0/1 1c7e0116 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00f02510 00040006 CONNECTED
nhi0: poll adapter 2: LANE_ADP_CS_0/1 1c7e012a 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00000000 00000000 unread
nhi0: poll adapter 1: LANE_ADP_CS_0/1 1c7e0116 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00f02510 00040006 CONNECTED
nhi0: poll adapter 2: LANE_ADP_CS_0/1 1c7e012a 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00000000 00000000 unread
nhi0: poll adapter 1: LANE_ADP_CS_0/1 1c7e0116 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00f02510 00040006 CONNECTED
nhi0: poll adapter 2: LANE_ADP_CS_0/1 1c7e012a 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00000000 00000000 unread
nhi0: poll adapter 1: LANE_ADP_CS_0/1 1c7e0116 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00f02510 00040006 CONNECTED
nhi0: poll adapter 2: LANE_ADP_CS_0/1 1c7e012a 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00000000 00000000 unread
nhi0: poll adapter 1: LANE_ADP_CS_0/1 1c7e0116 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00f02510 00040006 CONNECTED
nhi0: poll adapter 2: LANE_ADP_CS_0/1 1c7e012a 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00000000 00000000 unread
nhi0: poll adapter 1: LANE_ADP_CS_0/1 1c7e0116 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00f02510 00040006 CONNECTED
nhi0: poll adapter 2: LANE_ADP_CS_0/1 1c7e012a 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00000000 00000000 unread
nhi0: poll adapter 1: LANE_ADP_CS_0/1 1c7e0116 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00f02510 00040006 CONNECTED
nhi0: poll adapter 2: LANE_ADP_CS_0/1 1c7e012a 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00000000 00000000 unread
nhi0: poll adapter 1: LANE_ADP_CS_0/1 1c7e0116 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00f02510 00040006 CONNECTED
nhi0: poll adapter 2: LANE_ADP_CS_0/1 1c7e012a 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00000000 00000000 unread
nhi0: poll adapter 1: LANE_ADP_CS_0/1 1c7e0116 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00f02510 00040006 CONNECTED
nhi0: poll adapter 2: LANE_ADP_CS_0/1 1c7e012a 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00000000 00000000 unread
nhi0: poll adapter 1: LANE_ADP_CS_0/1 1c7e0116 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00f02510 00040006 CONNECTED
nhi0: poll adapter 2: LANE_ADP_CS_0/1 1c7e012a 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00000000 00000000 unread
nhi0: poll adapter 1: LANE_ADP_CS_0/1 1c7e0116 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00f02510 00040006 CONNECTED
nhi0: poll adapter 2: LANE_ADP_CS_0/1 1c7e012a 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00000000 00000000 unread
nhi0: poll adapter 1: LANE_ADP_CS_0/1 1c7e0116 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00f02510 00040006 CONNECTED
nhi0: poll adapter 2: LANE_ADP_CS_0/1 1c7e012a 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00000000 00000000 unread
nhi0: poll adapter 1: LANE_ADP_CS_0/1 1c7e0116 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00f02510 00040006 CONNECTED
nhi0: poll adapter 2: LANE_ADP_CS_0/1 1c7e012a 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00000000 00000000 unread
nhi0: poll adapter 1: LANE_ADP_CS_0/1 1c7e0116 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00f02510 00040006 CONNECTED
nhi0: poll adapter 2: LANE_ADP_CS_0/1 1c7e012a 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00000000 00000000 unread
nhi0: poll adapter 1: LANE_ADP_CS_0/1 1c7e0116 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00f02510 00040006 CONNECTED
nhi0: poll adapter 2: LANE_ADP_CS_0/1 1c7e012a 4822001e state 2 (CL0) negw 2 | PORT_CS_18/19 00000000 00000000 unread
root@fbsd-m1:~ #
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