dma.diff

diff --git a/rp2040-hal/src/dma.rs b/rp2040-hal/src/dma.rs
index 84ef780..2799612 100644
--- a/rp2040-hal/src/dma.rs
+++ b/rp2040-hal/src/dma.rs
@@ -558,6 +558,10 @@ where
         cortex_m::asm::dsb();
         compiler_fence(Ordering::SeqCst);
 
+        self.release()
+    }
+
+    pub fn release(self) -> (CH, FROM, TO) {
         (self.ch, self.from, self.to)
     }
 }
diff --git a/rp2040-hal/src/pio.rs b/rp2040-hal/src/pio.rs
index fca793b..c51df62 100644
--- a/rp2040-hal/src/pio.rs
+++ b/rp2040-hal/src/pio.rs
@@ -758,11 +758,7 @@ impl<SM: ValidStateMachine> Rx<SM> {
     /// This is a value between 0 and 39. Each FIFO on each state machine on
     /// each PIO has a unique value.
     pub fn dreq_value(&self) -> u8 {
-        if self.block as usize == 0x5020_0000usize {
-            crate::dma::DREQ_PIO0_RX0 + (SM::id() as u8)
-        } else {
-            crate::dma::DREQ_PIO1_RX0 + (SM::id() as u8)
-        }
+        SM::rx_dreq()
     }
 
     /// Get the next element from RX FIFO.
@@ -844,11 +840,7 @@ impl<SM: ValidStateMachine> Tx<SM> {
     /// This is a value between 0 and 39. Each FIFO on each state machine on
     /// each PIO has a unique value.
     pub fn dreq_value(&self) -> u8 {
-        if self.block as usize == 0x5020_0000usize {
-            crate::dma::DREQ_PIO0_TX0 + (SM::id() as u8)
-        } else {
-            crate::dma::DREQ_PIO1_TX0 + (SM::id() as u8)
-        }
+        SM::tx_dreq()
     }
 
     /// Write an element to TX FIFO.
diff --git a/rp2040-hal/src/spi.rs b/rp2040-hal/src/spi.rs
index 4a85e66..bff3b09 100644
--- a/rp2040-hal/src/spi.rs
+++ b/rp2040-hal/src/spi.rs
@@ -197,6 +197,15 @@ impl<D: SpiDevice, const DS: u8> Spi<Enabled, D, DS> {
     fn is_readable(&self) -> bool {
         self.device.sspsr.read().rne().bit_is_set()
     }
+    pub fn is_tx_fifo_empty(&self) -> bool {
+        self.device.sspsr.read().tfe().bit_is_set()
+    }
+    pub fn is_rx_fifo_empty(&self) -> bool {
+        self.device.sspsr.read().rne().bit_is_clear()
+    }
+    pub fn is_busy(&self) -> bool {
+        self.device.sspsr.read().bsy().bit_is_set()
+    }
 
     /// Disable the spi to reset its configuration
     pub fn disable(self) -> Spi<Disabled, D, DS> {
diff --git a/rp2040-hal/src/uart/utils.rs b/rp2040-hal/src/uart/utils.rs
index ba6b455..257360b 100644
--- a/rp2040-hal/src/uart/utils.rs
+++ b/rp2040-hal/src/uart/utils.rs
@@ -59,7 +59,6 @@ pub enum Parity {
 }
 
 /// A struct holding the configuration for an UART device.
-#[non_exhaustive]
 pub struct UartConfig {
     /// The baudrate the uart will run at.
     pub baudrate: Baud,