sdmacro.h

/* Macros to set ADSR: i=increment, d=decrement */
enum
{
	SD_ADSR_AR_LINEARi =                  0,
	SD_ADSR_AR_EXPi =                     1,
};

enum
{
	SD_ADSR_SR_LINEARi =                 0,
	SD_ADSR_SR_LINEARd =                 2,
	SD_ADSR_SR_EXPi =                    4,
	SD_ADSR_SR_EXPd =                    6,
};

enum
{
	SD_ADSR_RR_LINEARd =                 0,
	SD_ADSR_RR_EXPd =                    1,
};


enum
{
	SD_VPARAM_VOLL =  0x0,
	SD_VPARAM_VOLR =  0x100,
	SD_VPARAM_PITCH = 0x200,
	SD_VPARAM_ADSR1 = 0x300,
	SD_VPARAM_ADSR2 = 0x400,
	SD_VPARAM_ENVX =  0x500,
	SD_VPARAM_VOLXL = 0x600,
	SD_VPARAM_VOLXR = 0x700,
	SD_PARAM_MMIX =   0x800,
	SD_PARAM_MVOLL =  0x980,
	SD_PARAM_MVOLR =  0xa80,
	SD_PARAM_EVOLL =  0xb80,
	SD_PARAM_EVOLR =  0xc80,
	SD_PARAM_AVOLL =  0xd80,
	SD_PARAM_AVOLR =  0xe80,
	SD_PARAM_BVOLL =  0xf80,
	SD_PARAM_BVOLR =  0x1080,
	SD_PARAM_MVOLXL = 0x1180,
	SD_PARAM_MVOLXR = 0x1280,
};

enum
{
	SD_TRANS_WRITE = 0,
	SD_TRANS_READ = 1,
	SD_TRANS_STOP = 2,
	SD_TRANS_WRITE_FROM = 3,
	SD_TRANS_LOOP = 0x10,
};

enum
{
	SD_TRANS_MODE_DMA = 0,
	SD_TRANS_MODE_IO = 8,
};

// Reverb
enum
{
	SD_EFFECT_MODE_OFF =      0x0,
	SD_EFFECT_MODE_ROOM =     0x1,
	SD_EFFECT_MODE_STUDIO_1 = 0x2,
	SD_EFFECT_MODE_STUDIO_2 = 0x3,
	SD_EFFECT_MODE_STUDIO_3 = 0x4,
	SD_EFFECT_MODE_HALL =     0x5,
	SD_EFFECT_MODE_SPACE =    0x6,
	SD_EFFECT_MODE_ECHO =     0x7,
	SD_EFFECT_MODE_DELAY =    0x8,
	SD_EFFECT_MODE_PIPE =     0x9,
	SD_EFFECT_MODE_CLEAR =    0x100,
};

// CoreAttr
enum
{
	SD_CORE_EFFECT_ENABLE = 0x2,
	SD_CORE_IRQ_ENABLE =    0x4,
	SD_CORE_MUTE_ENABLE =   0x6,
	SD_CORE_NOISE_CLK =     0x8,
	SD_CORE_SPDIF_MODE =    0xA,
};

/* Switches */
enum
{
	SD_SWITCH_PMON =    0x1300,
	SD_SWITCH_NON =     0x1400,
	SD_SWITCH_KON =     0x1500,
	SD_SWITCH_KOFF =    0x1600,
	SD_SWITCH_ENDX =    0x1700,
	SD_SWITCH_VMIXL =   0x1800,
	SD_SWITCH_VMIXEL =  0x1900,
	SD_SWITCH_VMIXR =   0x1a00,
	SD_SWITCH_VMIXER =  0x1b00,
};

enum
{
	SD_ADDR_ESA = 0x1c00,
	SD_ADDR_EEA = 0x1d00,
	SD_ADDR_TSA = 0x1e00,
	SD_ADDR_IRQA = 0x1f00,
	SD_VADDR_SSA = 0x2000,
	SD_VADDR_LSAX = 0x2100,
	SD_VADDR_NAX = 0x2200,
};

enum
{
	SD_SPU2_ON = 0x8000,
	SD_MUTE = 0x4000,
	SD_ENABLE_EFFECTS = 0x80,
	SD_ENABLE_IRQ = 0x40,
	SD_DMA_IO = 0x10,

	SD_ENABLE_EX_INPUT = 0x1,
	SD_IO_IN_PROCESS = 0x400,
};

enum
{
	SD_DMA_WRITE = 0x20,
	SD_DMA_READ = 0x30,
	SD_DMA_IN_PROCESS = 0x30,
	SD_CORE_DMA = 0x30,
};

#define SD_NOISE_CLOCK(c)  ((c & 0x1F) << 8) // Bits 8..13 is noise clock

enum
{
	SD_BATCH_SETPARAM =  0x1,
	SD_BATCH_SETSWITCH = 0x2,
	SD_BATCH_SETADDR =   0x3,
	SD_BATCH_SETCORE =   0x4,
	SD_BATCH_WRITEIOP =  0x5,
	SD_BATCH_WRITEEE =   0x6,
	SD_BATCH_EERETURN =  0x7,
	SD_BATCH_GETPARAM =  0x10,
	SD_BATCH_GETSWITCH = 0x12,
	SD_BATCH_GETADDR =   0x13,
	SD_BATCH_GETCORE =   0x14,
};

enum
{
	ADPCM_LOOP_START = 4,
	ADPCM_LOOP = 2,
	ADPCM_LOOP_END = 1,
};

enum
{
SD_DMA_DIR_SPU2IOP = 			0,
SD_DMA_DIR_IOP2SPU = 			1,
SD_DMA_CS = 					0x200,
SD_DMA_START = 				0x1000000,
}