Logic Gates in LaTeX using Resistor-Transistor-Logic (RTL) https://en.wikipedia.org/wiki/Resistor-transistor_logic

FullAdder.tex

\documentclass{article}

\usepackage{tikz,fouriernc}
\usepackage{circuitikz}


\begin{document}
    \begin{figure}[h!]
        \centering % It's kind of not cenered, not exactly sure why
        \begin{circuitikz}
            \draw (-2,0) node[](in1) {};
            \draw (-2,2) node[](in2) {};
            \draw (-2,-1.28) node[](in_ue) {};

            % Gates for HA1
            \draw (2,0) node[and port] (and1) {};
            \draw (2,2) node[xor port] (xor1) {};

            % HA1 Border
            \draw[draw=gray] (-1, -1) rectangle ++(3.5,4);
            \draw (0.75, 3) node[above]{$HA_1$};

            % HA1 In1
            \draw (in1|-xor1.in 2) node[left]{$IN_1$} to[short, o-*] node[](in1split){} ++(1.5, 0) to[short] (xor1.in 2);
            \draw (in1split) to[short] (in1split|-and1.in 1) to[short] (and1.in 1);
            % HA1 In2
            \draw (in2|-and1.in 2) node[left]{$IN_2$} to[short, o-*] node[](in2split){} ++(2, 0) to[short] (and1.in 2);
            \draw (in2split) to[short] (in2split|-xor1.in 1) to[short] (xor1.in 1);

            % Gates for HA2
            \draw (7,1) node[and port] (and2) {};
            \draw (7,3) node[xor port] (xor2) {};

            % HA2 Border
            \draw[draw=gray] (4.25, 0) rectangle ++(3.5, 4);
            \draw (6, 4) node[above]{$HA_2$};

            % HA2 inside 
            \draw (and2.in 2) to[short, -*] node[](in3split){} ++(-0.5, 0);
            \draw (xor2.in 2) to[short, -*] node[](in4split){} ++(-1, 0);
            \draw (in3split) to[short] (in3split|-xor2.in 1) to[short] (xor2.in 1);
            \draw (in4split) to[short] (in4split|-and2.in 1) to[short] (and2.in 1);

            % Between Gates
            \draw (xor1.out) to[short] ++(1.25, 0) node[](splitter1){} to[short] (splitter1|-in4split) to[short] (in4split);
            \draw (in3split) to[short] (splitter1|-in3split) to[short] (splitter1|-in_ue) to[short] node[left]{$IN_C$} (in_ue|-in_ue) to[short, -o] (in_ue);

            % OR
            \draw (10,-0.25) node[or port] (or1) {};

            \draw (and2.out) to[short] node[](splitter2){} ++(1,0) to[short] (splitter2|-or1.in 1) to[short] (or1.in 1);

            \draw (and1.out) to[short] node[](splitter3){} ++(1.75,0) to[short] (splitter3|-or1.in 2) to[short] (or1.in 2);

            % Output
            \draw (xor2.out) to[short, -o] node[right](sumout){$Sum$} ++(3, 0);
            \draw (or1.out) to[short, -o] node[right]{$Carry$} (sumout.west|-or1.out);
        \end{circuitikz}

        \caption{Full Adder}
    \end{figure}
\end{document}

HalfAdder.tex

\documentclass{article}

\usepackage{tikz,fouriernc}
\usepackage{circuitikz}


\begin{document}
    \begin{figure}[h!]
        \centering
        \begin{circuitikz}
            \draw (-1.5,0) node[](in1) {};
            \draw (-1.5,2) node[](in2) {};

            % Gates
            \draw (2,0) node[and port] (and) {};
            \draw (2,2) node[xor port] (xor) {};

            % In1
            \draw (in1|-xor.in 2) node[left]{$IN_1$} to[short, o-*] node[](in1split){} ++(0.5, 0) to[short] (xor.in 2);
            \draw (in1split) to[short] (in1split|-and.in 1) to[short] (and.in 1);

            % In2
            \draw (in2|-and.in 2) node[left]{$IN_2$} to[short, o-*] node[](in2split){} ++(1, 0) to[short] (and.in 2);
            \draw (in2split) to[short] (in2split|-xor.in 1) to[short] (xor.in 1);

            % Output
            \draw (xor.out) to[short, -o] node[right]{$Sum$} ++(0.25,0);
            \draw (and.out) to[short, -o] node[right]{$Carry$} ++(0.25,0);
        \end{circuitikz}

        \caption{Half Adder}
    \end{figure}
\end{document}

Inverter.tex

\documentclass{article}

\usepackage{tikz,fouriernc}
\usepackage{circuitikz}


\begin{document}
  % derived from this image: http://www.play-hookey.com/digital_experiments/rtl/images/rtl_inverter_sch.gif
  \begin{figure}[h!]
    \begin{center}
      \begin{circuitikz}
        \draw (3,3) node[npn](npn1) {} ;
        
        \draw (0,3) to[short, o-, l=$IN$] (0.5, 3) to[R=$15K$] (npn1.base) node[anchor=east]{};

        \draw (3,6) to[short,o-,l_=$5V$] (3,5.5) to[R=$1K$] node[short](outConn) {} (npn1.collector) node[anchor=south] {};
        
        \draw (npn1.emitter) node[anchor=north] {} to[short] node[ground] {} (3,2);

        \draw (outConn) to[short, *-o, l=$OUT$] ++(2, 0);
      \end{circuitikz}
      \caption{RTL Inverter}
    \end{center}
  \end{figure}
\end{document}

NAND.tex

\documentclass{article}

\usepackage{tikz,fouriernc}
\usepackage{circuitikz}


\begin{document}
  % derived from this image: http://www.play-hookey.com/digital_electronics/images/rtl-nand2.gif
  \begin{figure}[h!]
    \begin{center}
      \begin{circuitikz}
        \draw (3,3) node[npn](npn1) {};        
        \draw (3,2) node[npn](npn2) {};

        % Inputs
        \draw (0,3) to[short, o-, l=$IN_1$] (0.5, 3) to[R=$470$] (npn1.base) node[anchor=east]{};
        \draw (0,2) to[short, o-, l=$IN_2$] (0.5, 2) to[R=$470$] (npn2.base) node[anchor=east]{};

        % Voltage from above
        \draw (3,6) to[short,o-,l_=$5V$] (3,5.5) to[R=$640$] node[short](outConn) {} (npn1.collector) node[anchor=south] {};
        % ...to ground below
        \draw (npn2.emitter) node[ground] {} (3,2);
        

        % Connect npn1 E to npn2 C
        \draw (npn1.emitter) node[anchor=north] {} to[short] (npn2.collector) node[anchor=south] {};

        \draw (outConn) to[short, *-o, l=$OUT$] ++(2, 0);
      \end{circuitikz}
      \caption{RTL NAND}
    \end{center}
  \end{figure}
\end{document}

NOR.tex

\documentclass{article}

\usepackage{tikz,fouriernc}
\usepackage{circuitikz}


\begin{document}
  % derived from this image: http://www.play-hookey.com/digital_electronics/images/rtl-nor4t.gif
   \begin{figure}[h!]
    \begin{center}
      \begin{circuitikz}
        \draw (0.5,3) node[npn](npn1) {};
        \draw (3,3) node[npn](npn2) {};
        
        \draw (npn1.collector) to[short, -*] (npn2.collector);
        
        \draw (3,6) to[short,o-,l_=$3.6V$] (3,5.5) to[R=$640$] node[short](outConn) {} (npn2.collector) node[anchor=south] {};

        \draw (npn1.base) to[R, n=r1] ++(0, -1.5) to[short, -o] node[below]{$IN_1$} ++(0, -0.5);
        \draw (npn2.base) to[R, n=r2] ++(0, -1.5) to[short, -o] node[below]{$IN_2$} ++(0, -0.5);
        
        \draw (r1.s) node[left]{$470$};
        \draw (r2.s) node[left]{$470$};
        
        % Grounds
        \draw (npn1.emitter) node[anchor=north] {} to[short] node[ground] {} (0.5,2);
        \draw (npn2.emitter) node[anchor=north] {} to[short] node[ground] {} (3,2);

        \draw (outConn) to[short, *-o] node[right]{$OUT$} ++(2, 0);
      \end{circuitikz}
      \caption{RTL NOR}
    \end{center}
  \end{figure}
\end{document}

XOR.tex

\documentclass{article}

\usepackage{tikz,fouriernc}
\usepackage{circuitikz}


\begin{document}
  \begin{figure}[h!]
    \centering
    % derived from this image: https://upload.wikimedia.org/wikipedia/commons/e/ed/3_gate_XOR.svg
    \begin{circuitikz}
      % Inputs
      \draw (0, 4) node[left]{$IN_1$} to[short, -*] (0.2, 4) node[short](nodeA){};
      \draw (1, 3) node[left]{$IN_2$} to[short, -*] ++(0.2, 0) node[short](nodeB){};

      % Logic gates
      \draw (3, 3.725) node[nand port](nand){};
      \draw (3, 2) node[or port](or){};
      \draw (5, 2.95) node[and port](and){} to[short] node[right]{$OUT$} ++(0.25, 0);

      % Lines from in1
      \draw (nodeA) to[short] (nand.in 1);
      \draw (nodeA) to[short] (nodeA|-or.in 2) to[short] (or.in 2);

      % Lines from in2
      \draw (nodeB) to[short] (nodeB|-nand.in 2) to[short] (nand.in 2);
      \draw (nodeB) to[short] (nodeB|-or.in 1) to[short] (or.in 1);

      % lines from nand to and
      \draw (nand.out) to[short] (nand.out|-and.in) to[short] (and.in);
      \draw (or.out) to[short] (or.out|-and.in 2) to[short] (and.in 2);

    \end{circuitikz}
    \caption{XOR-Gate}
  \end{figure}
\end{document}