GaryLee · May 13, 2025 06:52
diff --git a/ece241_2014_q1c.sv b/ece241_2014_q1c.sv
 module top_module (
    input [7:0] a,
    input [7:0] b,
    output [7:0] s,
    output overflow
 );
    logic c;
    assign {c, s} = a + b;
    assign overflow = ~(a[7] ^ b[7]) & (c ^ s[7]);
 endmodule
	module top_module (
	input [7:0] a,
	input [7:0] b,
	output [7:0] s,
	output overflow
	);
	logic c;
	assign {c, s} = a + b;
	assign overflow = ~(a[7] ^ b[7]) & (c ^ s[7]);
	endmodule