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Created April 28, 2026 01:43
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AMD EPYC 7F72 24-Core Processor
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AMD EPYC 7F72 24-Core Processor
@cyring

cyring commented Apr 28, 2026 •
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./build/corefreq-cli -s -n -m -n -M -n -C 1
Processor                                      [AMD EPYC 7F72 24-Core Processor]
|- PPIN#                                                      [ 262185db68cc040]
|- Architecture                                     [Zen2/EPYC/Rome/Six Thermal]
|- Vendor ID                                                      [AuthenticAMD]
|- Firmware                                                        [ 36.119.0-2]
|- Microcode                                                        [0x0830107d]
|- Signature                                                           [  8F_31]
|- Stepping                                                            [      0]
|- Online CPU                                                          [ 48/ 48]
|- Base Clock                                                          [ 99.963]
|- Frequency            (MHz)                      Ratio                        
                 Min   2499.08                    <  25 >                       
                 Max   3198.82                    <  32 >                       
|- Factory                                                             [100.000]
                       3200                       [  32 ]                       
|- Performance                                                                  
                 TGT   2499.08                    <  25 >                       
   |- CPPC                                                                      
                 Min    399.85                    <   4 >                       
                 Max   3698.63                    <  37 >                       
                 TGT   3698.63                    <  37 >                       
   |- Boost                                                            [   LOCK]
                 XFR   3698.63                    [  37 ]                       
                 CPB   3698.63                    [  37 ]                       
   |- P-State                                                                   
                 P1    2998.89                    <  30 >                       
                 P2    2499.08                    <  25 >                       
|- Uncore                                                              [   LOCK]
                 CLK   1299.52                    [  13 ]                       
                 MEM   3998.52                    [  40 ]                       
                                                                                
Instruction Set Extensions                                                      
|- 3DNow!/Ext [N/N]          ADX [Y]          AES [Y]  AVX/AVX2 [Y/Y] 
|- AVX512-F     [N]    AVX512-DQ [N]  AVX512-IFMA [N]   AVX512-PF [N] 
|- AVX512-ER    [N]    AVX512-CD [N]    AVX512-BW [N]   AVX512-VL [N] 
|- AVX512-VBMI  [N] AVX512-VBMI2 [N]  AVX512-VNNI [N]  AVX512-ALG [N] 
|- AVX512-VPOP  [N] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N] 
|- AVX512-BF16  [N] AVX-VNNI-VEX [N]    AVX-FP128 [N]   AVX-FP256 [Y] 
|- BMI1/BMI2  [Y/Y]         CLWB [Y]      CLFLUSH [Y] CLFLUSH-OPT [Y] 
|- CLAC-STAC    [Y]         CMOV [Y]    CMPXCHG8B [Y]  CMPXCHG16B [Y] 
|- F16C         [Y]          FPU [Y]         FXSR [Y]   LAHF-SAHF [Y] 
|- MMX/Ext    [Y/Y] MON/MWAITX [Y/Y]        MOVBE [Y]   PCLMULQDQ [Y] 
|- POPCNT       [Y]       RDRAND [Y]       RDSEED [Y]      RDTSCP [Y] 
|- SEP          [Y]          SHA [Y]          SSE [Y]        SSE2 [Y] 
|- SSE3         [Y]        SSSE3 [Y]  SSE4.1/4A [Y/Y]      SSE4.2 [Y] 
|- SERIALIZE    [N]      SYSCALL [Y]        RDPID [Y]        UMIP [Y] 
|- VAES         [N]   VPCLMULQDQ [N]   PREFETCH/W [Y]       LZCNT [Y] 
                                                                                
Features                                                                        
|- 1 GB Pages Support                                      1GB-PAGES   [Capable]
|- 100 MHz multiplier Control                            100MHzSteps   [Missing]
|- Advanced Configuration & Power Interface                     ACPI   [Capable]
|- Advanced Programmable Interrupt Controller                   APIC   [Capable]
|- Advanced Virtual Interrupt Controller                        AVIC   [Capable]
|- APIC Timer Invariance                                        ARAT   [Capable]
|- LOCK prefix to read CR8                                    AltMov   [Capable]
|- Clear Zero Instruction                                     CLZERO   [Capable]
|- Core Multi-Processing                                  CMP Legacy   [Capable]
|- L1 Data Cache Context ID                                  CNXT-ID   [Missing]
|- Collaborative Processor Performance Control                  CPPC   [Capable]
|- Direct Cache Access                                           DCA   [Missing]
|- Debugging Extension                                            DE   [Capable]
|- Debug Store & Precise Event Based Sampling               DS, PEBS   [Missing]
|- CPL Qualified Debug Store                                  DS-CPL   [Missing]
|- 64-Bit Debug Store                                         DTES64   [Missing]
|- Fast Short REP CMPSB|SCASB                                   FSRC   [Missing]
|- Fast Short REP MOVSB                                         FSRM   [Missing]
|- Fast Short REP STOSB                                         FSRS   [Missing]
|- Fast-String Operation                                        ERMS   [Missing]
|- Fused Multiply Add                                           FMA4   [Missing]
|- Fused Multiply Add                                            FMA   [Capable]
|- Hardware Lock Elision                                         HLE   [Missing]
|- Hyper-Threading Technology                                    HTT   [Capable]
|- Hardware P-state control                                      HwP   [Capable]
|- Instruction Based Sampling                                    IBS   [Capable]
|- Instruction INVLPGB                                       INVLPGB   [Missing]
|- Instruction INVPCID                                       INVPCID   [Missing]
|- Long Mode 64 bits                                       IA64 | LM   [Capable]
|- LightWeight Profiling                                         LWP   [Missing]
|- Memory Bandwidth Enforcement                                  MBE   [Capable]
|- Machine-Check Architecture                                    MCA   [Capable]
|- Instruction MCOMMIT                                       MCOMMIT   [Capable]
|- Model Specific Registers                                      MSR   [Capable]
|- Memory Type Range Registers                                  MTRR   [Capable]
|- No-Execute Page Protection                                     NX   [Capable]
|- OS-Enabled Ext. State Management                          OSXSAVE   [Capable]
|- OS Visible Work-around                                       OSVW   [Capable]
|- Physical Address Extension                                    PAE   [Capable]
|- Page Attribute Table                                          PAT   [Capable]
|- Pending Break Enable                                          PBE   [Missing]
|- Process Context Identifiers                                  PCID   [Missing]
|- Perfmon and Debug Capability                                 PDCM   [Missing]
|- Page Global Enable                                            PGE   [Capable]
|- Page Size Extension                                           PSE   [Capable]
|- 36-bit Page Size Extension                                  PSE36   [Capable]
|- Processor Serial Number                                       PSN   [Missing]
|- PREFETCHIT0/1 Instructions                              PREFETCHI   [Missing]
|- Resource Director Technology/PQE                      RDT-A | PQE   [Capable]
|- Resource Director Technology/PQM                      RDT-M | PQM   [Capable]
|- Read Processor Register at User level                       RDPRU   [Capable]
|- Restricted Transactional Memory                               RTM   [Missing]
|- Safer Mode Extensions                                         SMX   [Missing]
|- Self-Snoop                                                     SS   [Missing]
|- Supervisor-Mode Access Prevention                            SMAP   [Capable]
|- Supervisor-Mode Execution Prevention                         SMEP   [Capable]
|- Trailing Bit Manipulation                                     TBM   [Missing]
|- Translation Cache Extension                                   TCE   [Capable]
|- Time Stamp Counter                                            TSC [Invariant]
|- Time Stamp Counter Deadline                          TSC-DEADLINE   [Missing]
|- TSX Force Abort MSR Register                            TSX-ABORT   [Missing]
|- TSX Suspend Load Address Tracking                       TSX-LDTRK   [Missing]
|- User-Mode Instruction Prevention                             UMIP   [Capable]
|- Virtual Mode Extension                                        VME   [Capable]
|- Virtual Machine Extensions                                    VMX   [Missing]
|- Write Back & Do Not Invalidate Cache                     WBNOINVD   [Capable]
|- Extended xAPIC Support                                     x2APIC   [ x2APIC]
|- AVIC controller for x2APIC                                 x2AVIC   [Missing]
|- XSAVE/XSTOR States                                          XSAVE   [Capable]
|- xTPR Update Control                                          xTPR   [Missing]
|- Extended Operation Support                                    XOP   [Missing]
Mitigation mechanisms                                                           
|- Indirect Branch Restricted Speculation                       IBRS   [Capable]
   |- IBRS Always-On preferred by processor                            [ Unable]
   |- IBRS preferred over software solution                            [Capable]
   |- IBRS provides same speculation limits                            [Capable]
|- Indirect Branch Prediction Barrier                           IBPB   [Capable]
|- Selective Branch Predictor Barrier                           SBPB   [ Unable]
|- Single Thread Indirect Branch Predictor                     STIBP   [Capable]
|- Speculative Store Bypass Disable                             SSBD   [Capable]
   |- SSBD use VIRT_SPEC_CTRL register                                 [ Unable]
   |- SSBD not needed on this processor                                [ Unable]
|- No Speculative Return Stack Overflow                      SRSO_NO   [ Unable]
   |- No SRSO at the User-Kernel boundary                              [ Unable]
|- No Branch Type Confusion                                   BTC_NO   [ Unable]
|- BTC on Non-Branch instruction                            BTC-NOBR   [ Enable]
|- Limited Early Redirect Window                            AGENPICK   [Disable]
|- Arch - No Fast Predictive Store Forwarding                   PSFD   [ Unable]
|- Arch - Enhanced Predictive Store Forwarding                  EPSF   [Missing]
|- Arch - Cross Processor Information Leak                XPROC_LEAK   [Disable]
Security Features                                                               
|- CET Shadow Stack features                                  CET-SS   [Missing]
|- Secure Init and Jump with Attestation                      SKINIT   [Capable]
|- Secure Encrypted Virtualization                               SEV   [Capable]
|- SEV - Encrypted State                                      SEV-ES   [Capable]
|- SEV - Secure Nested Paging                                SEV-SNP   [Missing]
|- Guest Mode Execute Trap                                      GMET   [Capable]
|- Supervisor Shadow Stack                                       SSS   [Missing]
|- VM Permission Levels                                         VMPL   [Missing]
|- VMPL Supervisor Shadow Stack                             VMPL-SSS   [Missing]
|- Secure Memory Encryption                                      SME   [Capable]
|- Transparent SME                                              TSME   [ Enable]
|- Secure Multi-Key Memory Encryption                         SME-MK   [Missing]
|- DRAM Data Scrambling                                    Scrambler   [ Enable]
                                                                                
Technologies                                                                    
|- Instruction Cache Unit                                                       
   |- L1 IP Prefetcher                                          L1 HW IP   < ON>
|- Data Cache Unit                                                              
   |- L1 Prefetcher                                                L1 HW   < ON>
|- Cache Prefetchers                                                            
   |- L2 Prefetcher                                                L2 HW   < ON>
   |- L1 Stride Prefetcher                                     L1 Stride   <OFF>
   |- L1 Region Prefetcher                                     L1 Region   <OFF>
   |- L1 Burst Prefetch Mode                                    L1 Burst   <OFF>
   |- L2 Stream HW Prefetcher                                  L2 Stream   <OFF>
   |- L2 Up/Down Prefetcher                                   L2 Up/Down   <OFF>
|- System Management Mode                                       SMM-Lock   [ ON]
|- Simultaneous Multithreading                                       SMT   [ ON]
|- PowerNow!                                                         CnQ   [ ON]
|- Core C-States                                                     CCx   [ ON]
|- Core Performance Boost                                            CPB   < ON>
|- Watchdog Timer                                                    WDT   < ON>
|- Virtualization                                                    SVM   [ ON]
   |- I/O MMU                                                      AMD-V   [ ON]
   |- Version                                                     [         0.1]
   |- Hypervisor                                                           [OFF]
   |- Vendor ID                                                   [         N/A]
                                                                                
Performance Monitoring                                                          
|- Version                                                        PM       [  1]
|- Counters:          General                   Fixed                           
|           {  6,  6,  4 } x 48 bits            3 x 64 bits                     
|- Enhanced Halt State                                           C1E       <OFF>
|- C2 UnDemotion                                                 C2U       <OFF>
|- C3 UnDemotion                                                 C3U       < ON>
|- Core C6 State                                                 CC6       < ON>
|- Package C6 State                                              PC6       <OFF>
|- Legacy Frequency ID control                                   FID       [OFF]
|- Legacy Voltage ID control                                     VID       [OFF]
|- P-State Hardware Coordination Feedback                MPERF/APERF       [ ON]
|- Core C-States                                                                
   |- C-States Base Address                                      BAR   [ 0x813 ]
|- ACPI Processor C-States                                      _CST   [      2]
|- MONITOR/MWAIT                                                                
   |- State index:    #0    #1    #2    #3    #4    #5    #6    #7              
   |- Sub C-State:     1     1     0     0     0     0     0     0              
   |- Monitor-Mwait Extensions                                   EMX   [Capable]
   |- Interrupt Break-Event                                      IBE   [Capable]
|- Core Cycles                                                         [Capable]
|- Instructions Retired                                                [Capable]
|- Reference Cycles                                                    [Capable]
|- Last Level Cache References                                         [Capable]
|- TSC for Performance Profiling                                       [Missing]
|- Data Fabric Performance Counter                                     [Capable]
|- Core Performance Counter                                            [Capable]
|- Processor Performance Control                                _PCT   [ Enable]
|- Performance Supported States                                 _PSS   [      3]
|- Performance Present Capabilities                             _PPC   [      0]
|- Continuous Performance Control                               _CPC   [ Enable]
                                                                                
Power, Current & Thermal                                                        
|- Temperature Offset:Junction                                 TjMax [ 49: 95 C]
|- CPPC Energy Preference                                        EPP   <      0>
|- Digital Thermal Sensor                                        DTS   [Capable]
|- Power Limit Notification                                      PLN   [Missing]
|- Package Thermal Management                                    PTM   [Missing]
|- Thermal Monitor 1                                             TTP   [ Enable]
|- Thermal Monitor 2                                             HTC   [ Enable]
|- Thermal Design Power                                          TDP   [  480 W]
   |- Minimum Power                                              Min   [  104 W]
   |- Maximum Power                                              Max   [  402 W]
|- Thermal Design Power                                      Package   < Enable>
   |- Power Limit                                                PL1   <  240 W>
   |- Time Window                                                TW1   <   0 ns>
   |- Power Limit                                                PL2   <  240 W>
   |- Time Window                                                TW2   <   0 ns>
|- Thermal Design Power                                         Core   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                       Uncore   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                         DRAM   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                     Platform   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Package Power Tracking                                        PPT   [    4 W]
|- Electrical Design Current                                     EDC   [  452 A]
|- Thermal Design Current                                        TDC   [  111 A]
|- Core Thermal Point                                                           
|- Package Thermal Point                                                        
   |- Thermal Monitor Trip                                     Limit   [  115 C]
   |- HTC Temperature Limit                                    Limit   [  106 C]
   |- HTC Temperature Hysteresis                           Threshold   [    2 C]
|- Units                                                                        
   |- Power                                               watt   [  0.125000000]
   |- Energy                                             joule   [  0.000015259]
   |- Window                                            second   [  0.000976562]

CPU Pkg  Apic  Core/Thread  Caches      (w)rite-Back (i)nclusive              
 #   ID   ID CCD CCX ID/ID L1-Inst Way  L1-Data Way      L2  Way      L3  Way 
000:BSP    0   0  0   0  0      32  8        32  8       512  8 i  196608 16w 
001:  0    2   0  0   1  0      32  8        32  8       512  8 i  196608 16w 
002:  0    8   0  1   4  0      32  8        32  8       512  8 i  196608 16w 
003:  0   10   0  1   5  0      32  8        32  8       512  8 i  196608 16w 
004:  0   16   1  2   8  0      32  8        32  8       512  8 i  196608 16w 
005:  0   18   1  2   9  0      32  8        32  8       512  8 i  196608 16w 
006:  0   24   1  3  12  0      32  8        32  8       512  8 i  196608 16w 
007:  0   26   1  3  13  0      32  8        32  8       512  8 i  196608 16w 
008:  0   32   2  4  16  0      32  8        32  8       512  8 i  196608 16w 
009:  0   34   2  4  17  0      32  8        32  8       512  8 i  196608 16w 
010:  0   40   2  5  20  0      32  8        32  8       512  8 i  196608 16w 
011:  0   42   2  5  21  0      32  8        32  8       512  8 i  196608 16w 
012:  0   48   3  6  24  0      32  8        32  8       512  8 i  196608 16w 
013:  0   50   3  6  25  0      32  8        32  8       512  8 i  196608 16w 
014:  0   56   3  7  28  0      32  8        32  8       512  8 i  196608 16w 
015:  0   58   3  7  29  0      32  8        32  8       512  8 i  196608 16w 
016:  0   64   4  8  32  0      32  8        32  8       512  8 i  196608 16w 
017:  0   66   4  8  33  0      32  8        32  8       512  8 i  196608 16w 
018:  0   72   4  9  36  0      32  8        32  8       512  8 i  196608 16w 
019:  0   74   4  9  37  0      32  8        32  8       512  8 i  196608 16w 
020:  0   80   5 10  40  0      32  8        32  8       512  8 i  196608 16w 
021:  0   82   5 10  41  0      32  8        32  8       512  8 i  196608 16w 
022:  0   88   5 11  44  0      32  8        32  8       512  8 i  196608 16w 
023:  0   90   5 11  45  0      32  8        32  8       512  8 i  196608 16w 
024:  0    1   0  0   0  1      32  8        32  8       512  8 i  196608 16w 
025:  0    3   0  0   1  1      32  8        32  8       512  8 i  196608 16w 
026:  0    9   0  1   4  1      32  8        32  8       512  8 i  196608 16w 
027:  0   11   0  1   5  1      32  8        32  8       512  8 i  196608 16w 
028:  0   17   1  2   8  1      32  8        32  8       512  8 i  196608 16w 
029:  0   19   1  2   9  1      32  8        32  8       512  8 i  196608 16w 
030:  0   25   1  3  12  1      32  8        32  8       512  8 i  196608 16w 
031:  0   27   1  3  13  1      32  8        32  8       512  8 i  196608 16w 
032:  0   33   2  4  16  1      32  8        32  8       512  8 i  196608 16w 
033:  0   35   2  4  17  1      32  8        32  8       512  8 i  196608 16w 
034:  0   41   2  5  20  1      32  8        32  8       512  8 i  196608 16w 
035:  0   43   2  5  21  1      32  8        32  8       512  8 i  196608 16w 
036:  0   49   3  6  24  1      32  8        32  8       512  8 i  196608 16w 
037:  0   51   3  6  25  1      32  8        32  8       512  8 i  196608 16w 
038:  0   57   3  7  28  1      32  8        32  8       512  8 i  196608 16w 
039:  0   59   3  7  29  1      32  8        32  8       512  8 i  196608 16w 
040:  0   65   4  8  32  1      32  8        32  8       512  8 i  196608 16w 
041:  0   67   4  8  33  1      32  8        32  8       512  8 i  196608 16w 
042:  0   73   4  9  36  1      32  8        32  8       512  8 i  196608 16w 
043:  0   75   4  9  37  1      32  8        32  8       512  8 i  196608 16w 
044:  0   81   5 10  40  1      32  8        32  8       512  8 i  196608 16w 
045:  0   83   5 10  41  1      32  8        32  8       512  8 i  196608 16w 
046:  0   89   5 11  44  1      32  8        32  8       512  8 i  196608 16w 
047:  0   91   5 11  45  1      32  8        32  8       512  8 i  196608 16w 

                              Zen UMC  [1490]                              
Controller #0                                               Eight Channel  
 Bus Rate  1333 MHz       Bus Speed 1333 MHz       REG DDR4 Speed 2666 MT/s
                                                                           
 Cha   CL  RCDr RCDw  RP  RAS   RC  RRDs RRDl FAW  WTRs WTRl  WR  clRR clWW
  #0   21   19   19   19   43   62    4    7   16    4   10   20    4    4 
  #1   21   19   19   19   43   62    4    7   16    4   10   20    4    4 
  #2   21   19   19   19   43   62    4    7   16    4   10   20    4    4 
  #3   21   19   19   19   43   62    4    7   16    4   10   20    4    4 
  #4   21   19   19   19   43   62    4    7   16    4   10   20    4    4 
  #5   21   19   19   19   43   62    4    7   16    4   10   20    4    4 
  #6   21   19   19   19   43   62    4    7   16    4   10   20    4    4 
  #7   21   19   19   19   43   62    4    7   16    4   10   20    4    4 
      CWL  RTP RdWr WrRd scWW sdWW ddWW scRR sdRR ddRR drRR drWW drWR drRRD
  #0   18   10   10    3    1    7    6    1    5    4    0    0    0    0 
  #1   18   10   11    3    1    7    6    1    5    4    0    0    0    0 
  #2   18   10   11    3    1    7    6    1    5    4    0    0    0    0 
  #3   18   10   11    3    1    7    6    1    5    4    0    0    0    0 
  #4   18   10   11    3    1    7    6    1    5    4    0    0    0    0 
  #5   18   10   11    3    1    7    6    1    5    4    0    0    0    0 
  #6   18   10   10    3    1    7    6    1    5    4    0    0    0    0 
  #7   18   10   11    3    1    7    6    1    5    4    0    0    0    0 
      REFI RFC1 RFC2 RFC4 RCPB RPPB  BGS:Alt  Ban  Page  CKE  CMD  GDM  ECC
  #0 10400  467  347  214   0    0   OFF  ON  R1W1   0    7   1T   OFF   1 
  #1 10400  467  347  214   0    0   OFF  ON  R1W1   0    7   1T   OFF   1 
  #2 10400  467  347  214   0    0   OFF  ON  R1W1   0    7   1T   OFF   1 
  #3 10400  467  347  214   0    0   OFF  ON  R1W1   0    7   1T   OFF   1 
  #4 10400  467  347  214   0    0   OFF  ON  R1W1   0    7   1T   OFF   1 
  #5 10400  467  347  214   0    0   OFF  ON  R1W1   0    7   1T   OFF   1 
  #6 10400  467  347  214   0    0   OFF  ON  R1W1   0    7   1T   OFF   1 
  #7 10400  467  347  214   0    0   OFF  ON  R1W1   0    7   1T   OFF   1 
      MRD:PDA   MOD:PDA  WRMPR STAG PDM RDDATA WRD  WRL  RDL  XS   XP CPDED
  #0   32  16    25  25     0  156 0:F:1   16   2   13   24  480    8    4 
  #1   32  16    25  25     0  156 0:F:1   16   2   13   24  480    8    4 
  #2   32  16    25  25     0  156 0:F:1   16   2   13   24  480    8    4 
  #3   32  16    25  25     0  156 0:F:1   16   2   13   24  480    8    4 
  #4   32  16    25  25     0  156 0:F:1   16   2   13   24  480    8    4 
  #5   32  16    25  25     0  156 0:F:1   16   2   13   24  480    8    4 
  #6   32  16    25  25     0  156 0:F:1   16   2   13   24  480    8    4 
  #7   32  16    25  25     0  156 0:F:1   16   2   13   24  480    8    4 
                                                                           
 DIMM Geometry for channel #0                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0    16    2    131072      1024          32768    M393A4K40CB2-CTD
       #1                                                                  
 DIMM Geometry for channel #1                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0    16    2    131072      1024          32768    M393A4K40CB2-CTD
       #1                                                                  
 DIMM Geometry for channel #2                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0    16    2    131072      1024          32768    M393A4K40CB2-CTD
       #1                                                                  
 DIMM Geometry for channel #3                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0    16    2    131072      1024          32768    M393A4K40CB2-CTD
       #1                                                                  
 DIMM Geometry for channel #4                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0    16    2    131072      1024          32768    M393A4K40CB2-CTD
       #1                                                                  
 DIMM Geometry for channel #5                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0    16    2    131072      1024          32768    M393A4K40CB2-CTD
       #1                                                                  
 DIMM Geometry for channel #6                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0    16    2    131072      1024          32768    M393A4K40CB2-CTD
       #1                                                                  
 DIMM Geometry for channel #7                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0    16    2    131072      1024          32768    M393A4K40CB2-CTD
       #1                                                                  

CPU Freq(MHz) VID  Vcore  TMP(C)    Accumulator       Energy(J)     Power(W)
000   36.40   121  0.7937   33  000000000000001247    0.019027710   0.019027710
001    2.94   121  0.7937   33  000000000000000986    0.015045166   0.015045166
002   20.29   121  0.7937   33  000000000000001270    0.019378662   0.019378662
003   16.87   122  0.7875   33  000000000000000804    0.012268066   0.012268066
004   10.02   122  0.7875   33  000000000000017540    0.267639160   0.267639160
005    4.37   121  0.7937   33  000000000000001058    0.016143799   0.016143799
006   63.60   122  0.7875   33  000000000000004988    0.076110840   0.076110840
007    2.29   122  0.7875   33  000000000000000302    0.004608154   0.004608154
008   21.24   123  0.7812   34  000000000000002193    0.033462524   0.033462524
009   12.84   122  0.7875   34  000000000000001377    0.021011353   0.021011353
010    1.62   122  0.7875   34  000000000000000146    0.002227783   0.002227783
011    1.54   122  0.7875   34  000000000000000144    0.002197266   0.002197266
012    1.54   120  0.8000   33  000000000000000098    0.001495361   0.001495361
013    1.07   120  0.8000   33  000000000000000097    0.001480103   0.001480103
014   37.06   120  0.8000   33  000000000000002814    0.042938232   0.042938232
015   33.95   121  0.7937   33  000000000000002722    0.041534424   0.041534424
016    1.98   121  0.7937   34  000000000000000152    0.002319336   0.002319336
017    1.08   121  0.7937   34  000000000000000082    0.001251221   0.001251221
018   81.05   121  0.7937   34  000000000000007482    0.114166260   0.114166260
019   83.96   121  0.7937   34  000000000000006683    0.101974487   0.101974487
020    7.49   121  0.7937   33  000000000000003318    0.050628662   0.050628662
021    5.42   122  0.7875   33  000000000000000845    0.012893677   0.012893677
022    9.12   121  0.7937   33  000000000000000575    0.008773804   0.008773804
023   27.97    86  1.0125   33  000000000000003307    0.050460815   0.050460815
024    1.37    86  1.0125   33  000000000000000000    0.000000000   0.000000000
025   17.16    56  1.2000   33  000000000000000000    0.000000000   0.000000000
026    0.89    86  1.0125   33  000000000000000000    0.000000000   0.000000000
027    2.28    86  1.0125   33  000000000000000000    0.000000000   0.000000000
028  136.23    85  1.0188   33  000000000000000000    0.000000000   0.000000000
029   15.87    85  1.0188   33  000000000000000000    0.000000000   0.000000000
030   23.99    85  1.0188   33  000000000000000000    0.000000000   0.000000000
031    2.66    85  1.0188   33  000000000000000000    0.000000000   0.000000000
032   29.96    86  1.0125   34  000000000000000000    0.000000000   0.000000000
033    8.09    86  1.0125   34  000000000000000000    0.000000000   0.000000000
034    1.13    86  1.0125   34  000000000000000000    0.000000000   0.000000000
035    0.46    86  1.0125   34  000000000000000000    0.000000000   0.000000000
036    1.20    87  1.0063   33  000000000000000000    0.000000000   0.000000000
037    1.37    87  1.0063   33  000000000000000000    0.000000000   0.000000000
038   19.91    87  1.0063   33  000000000000000000    0.000000000   0.000000000
039   30.69    87  1.0063   33  000000000000000000    0.000000000   0.000000000
040    1.13    85  1.0188   34  000000000000000000    0.000000000   0.000000000
041    0.88    85  1.0188   34  000000000000000000    0.000000000   0.000000000
042    4.35    86  1.0125   34  000000000000000000    0.000000000   0.000000000
043    8.38    85  1.0188   34  000000000000000000    0.000000000   0.000000000
044   71.73    86  1.0125   33  000000000000000000    0.000000000   0.000000000
045   11.28    85  1.0188   33  000000000000000000    0.000000000   0.000000000
046    1.25    85  1.0188   33  000000000000000000    0.000000000   0.000000000
047   16.30    86  1.0125   33  000000000000000000    0.000000000   0.000000000

             Package[0]    Cores         Uncore        Memory        Platform
Energy(J):  61.450744629   0.919036865   9.336654663   0.000000000   0.000000000
Power(W) :  61.450744629   0.919036865   9.336654663   0.000000000   0.000000000

@cyring

cyring commented Apr 28, 2026

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  • SMT [disabled]
CPU Pkg  Apic  Core/Thread  Caches      (w)rite-Back (i)nclusive              
 #   ID   ID CCD CCX ID/ID L1-Inst Way  L1-Data Way      L2  Way      L3  Way 
000:BSP    0   0  0   0  0      32  8        32  8       512  8 i  196608 16w 
001:  0    1   0  0   1  0      32  8        32  8       512  8 i  196608 16w 
002:  0    4   0  1   4  0      32  8        32  8       512  8 i  196608 16w 
003:  0    5   0  1   5  0      32  8        32  8       512  8 i  196608 16w 
004:  0    8   1  2   8  0      32  8        32  8       512  8 i  196608 16w 
005:  0    9   1  2   9  0      32  8        32  8       512  8 i  196608 16w 
006:  0   12   1  3  12  0      32  8        32  8       512  8 i  196608 16w 
007:  0   13   1  3  13  0      32  8        32  8       512  8 i  196608 16w 
008:  0   16   2  4  16  0      32  8        32  8       512  8 i  196608 16w 
009:  0   17   2  4  17  0      32  8        32  8       512  8 i  196608 16w 
010:  0   20   2  5  20  0      32  8        32  8       512  8 i  196608 16w 
011:  0   21   2  5  21  0      32  8        32  8       512  8 i  196608 16w 
012:  0   24   3  6  24  0      32  8        32  8       512  8 i  196608 16w 
013:  0   25   3  6  25  0      32  8        32  8       512  8 i  196608 16w 
014:  0   28   3  7  28  0      32  8        32  8       512  8 i  196608 16w 
015:  0   29   3  7  29  0      32  8        32  8       512  8 i  196608 16w 
016:  0   32   4  8  32  0      32  8        32  8       512  8 i  196608 16w 
017:  0   33   4  8  33  0      32  8        32  8       512  8 i  196608 16w 
018:  0   36   4  9  36  0      32  8        32  8       512  8 i  196608 16w 
019:  0   37   4  9  37  0      32  8        32  8       512  8 i  196608 16w 
020:  0   40   5 10  40  0      32  8        32  8       512  8 i  196608 16w 
021:  0   41   5 10  41  0      32  8        32  8       512  8 i  196608 16w 
022:  0   44   5 11  44  0      32  8        32  8       512  8 i  196608 16w 
023:  0   45   5 11  45  0      32  8        32  8       512  8 i  196608 16w 

CPU Freq(MHz) VID  Vcore  TMP(C)    Accumulator       Energy(J)     Power(W)
000   14.85   121  0.7937   37  000000000000000466    0.007110596   0.007110596
001    0.75   121  0.7937   37  000000000000000035    0.000534058   0.000534058
002    8.38   122  0.7875   37  000000000000000453    0.006912231   0.006912231
003    2.99   122  0.7875   37  000000000000000187    0.002853394   0.002853394
004  154.68   122  0.7875   37  000000000000017902    0.273162842   0.273162842
005   23.40   121  0.7937   37  000000000000001636    0.024963379   0.024963379
006   10.89   122  0.7875   37  000000000000000719    0.010971069   0.010971069
007   17.81   122  0.7875   37  000000000000001067    0.016281128   0.016281128
008  114.30   123  0.7812   38  000000000000010473    0.159805298   0.159805298
009   98.50   122  0.7875   38  000000000000008689    0.132583618   0.132583618
010    1.29   122  0.7875   38  000000000000000060    0.000915527   0.000915527
011   29.76   122  0.7875   38  000000000000001532    0.023376465   0.023376465
012   13.62   121  0.7937   37  000000000000001071    0.016342163   0.016342163
013   27.43   121  0.7937   37  000000000000002588    0.039489746   0.039489746
014   35.44   121  0.7937   37  000000000000002301    0.035110474   0.035110474
015    3.23   121  0.7937   37  000000000000000104    0.001586914   0.001586914
016    6.23   121  0.7937   38  000000000000000406    0.006195068   0.006195068
017    5.39   121  0.7937   38  000000000000000274    0.004180908   0.004180908
018    2.65   121  0.7937   38  000000000000000133    0.002029419   0.002029419
019    0.96   121  0.7937   38  000000000000000006    0.000091553   0.000091553
020  130.19   122  0.7875   37  000000000000009764    0.148986816   0.148986816
021   18.89   122  0.7875   37  000000000000000835    0.012741089   0.012741089
022   13.03   121  0.7937   37  000000000000000868    0.013244629   0.013244629
023  107.78   122  0.7875   37  000000000000007947    0.121261597   0.121261597

             Package[0]    Cores         Uncore        Memory        Platform
Energy(J):  62.785934448   1.060729980   9.077301025   0.000000000   0.000000000
Power(W) :  62.785934448   1.060729980   9.077301025   0.000000000   0.000000000

@cyring

cyring commented Apr 28, 2026

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  • Single Core stressed
17773420794844959386641136966879

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