An online meetup hosted by the RISC-V International China community on April 10, 2026. Presented by:
- Jian Zhang — Open-Source RISC-V CPU Product Manager
- Guodong Xu — SW Director, RISCstar; RISC-V Ecosystem Practitioner
RVA23 is ready — for the first time, both hardware (SpacemiT K3/V100, T-Head C950, Tenstorrent Atlantis, SiFive P870) and software (openEuler, Ubuntu 26.04, Linux kernel hwprobe) are targeting RVA23 support simultaneously.
The problem: LLMs hallucinate on RISC-V specs. Ask one about the B extension and it'll say "3 instructions" — it's actually Zba + Zbb + Zbs, dozens of instructions across three sub-extensions.
Our solution: Two AI-assisted workflows for daily RISC-V development:
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Spec lookup without hallucinations — An Agent Skill built on riscv-unified-db (UDB), a machine-readable YAML database of 2000+ instructions and 400+ extensions. The AI queries structured data instead of guessing.
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AI-driven Linux kernel review — Combining three tools to review real kernel patchsets end-to-end:
- semcode — Tree-sitter semantic code search + lore.kernel.org mail search via MCP
- review-prompts — Kernel coding conventions encoded as AI skills (/kreview, /kdebug)
- riscv-spec Skill — Architecture correctness verification against UDB
Demo scenario: reviewing Qualcomm's RVA23 RFC patchset — searching 34 emails, analyzing 10 call sites via AST, and catching an ISA_EXT vs HWPROBE_EXT discrepancy.