hansemro

JEDEC Programming File for ml50x/xc95144xl.jed
Date: Fri Dec  6 01:45:24 2024

QF93312*
QP0*
F0*
X0*
N DEVICE xc95144xl-XXXXX*
L0000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
L0000064 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*

hansemro

# Copyright (C) 2025 Hansem Ro <[email protected]>
# SPDX-License-Identifier: 0BSD
# Version: 1.0

# Required TAP-specific parameters
#set g_tap               xc3s.tap
#set g_boundary_length   637
#set g_extest_instr      0b001111
#set g_sample_instr      0b000001

hansemro

#!/usr/bin/env sh

# ATX Power Control Extension Board Peripheral
SERIAL_DEV=/dev/ttyS3

# Since the extension board provides power to the jetkvm,
# we can assume the extension is connected over serial.

check_atx_status() {
    ATX_STATUS=$((2#$(head -n1 $SERIAL_DEV)))

hansemro

\chapter{Legal Notices}
\label{ch:legal}

\section{Introduction}

ngscopeclient, libscopehal, and the remainder of the project are all released under the 3-clause BSD license
(reproduced below). This is a permissive license, explicitly chosen to encourage integration with third-party open
source and commercial projects.

\section{License Agreement}

hansemro

{
  "creator": "Next Generation Place and Route (Version 4436e38)",
  "modules": {
    "top": {
      "settings": {
        "route": "00000000000000000000000000000001",
        "router1/useEstimate": "1 ",
        "router1/fullCleanupReroute": "1 ",
        "router1/cleanupReroute": "1 ",
        "router1/maxIterCnt": "200",

hansemro

import rapidwright
from com.xilinx.rapidwright.design import Cell, Design, Net, NetType, PinType, SiteInst, SitePinInst, Unisim
from com.xilinx.rapidwright.device import Node, PIP, Series, Site, Wire
from com.xilinx.rapidwright.edif import EDIFDirection, EDIFHierNet, EDIFNet, EDIFNetlist, EDIFPortInst, EDIFTools
from com.xilinx.rapidwright.router import Router

# Uncomment one part or the other to test IBUFDS placement at HP IOB or HR IOB site.
part = "xc7k325tffg900-2" # HP IOB
# part = "xc7a200tfbg484-3" # HR IOB
des = Design("top", part)

hansemro

#!/usr/bin/env bash

# scopehal-docs LaTeX (*.tex) to AsciiDoc (*.adoc) converter
# TODO: learn awk

set -euo pipefail

TEX=$(basename $1)
ADOC=modules/ROOT/pages/${TEX%.tex}.adoc

hansemro

PROJECT = top
TOP = top
TOP_VERILOG = top.v
ADDITIONAL_SOURCES =

# Target Platform
FAMILY  = kintex7
PART    = xc7k325tffg900-2
BOARD   = kc705
XDC    ?= kc705.xdc

hansemro

PROJECT = top
TOP = top
TOP_VERILOG = top.v
ADDITIONAL_SOURCES =

# Target Platform
FAMILY  = kintex7
PART    = xc7k325tffg900-2
BOARD   = kc705
XDC    ?= kc705.xdc

hansemro

$ litex_term --images=images/boot.json /dev/ttyUSB2 

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